  ,   8     (            
d                                                        K   google,veyron-brain-rev0 google,veyron-brain google,veyron rockchip,rk3288           &            7Google Brain       aliases          =/ethernet@ff290000           G/i2c@ff650000            L/i2c@ff140000            Q/i2c@ff660000            V/i2c@ff150000            [/i2c@ff160000            `/i2c@ff170000            e/mmc@ff0f0000            k/mmc@ff0c0000            q/mmc@ff0d0000            w/mmc@ff0e0000            }/serial@ff180000             /serial@ff190000             /serial@ff690000             /serial@ff1b0000             /serial@ff1c0000             /spi@ff110000            /spi@ff120000            /spi@ff130000            /mmc@ff0f0000         arm-pmu          arm,cortex-a12-pmu        0                                                                      cpus                                       rockchip,rk3066-smp                cpu@500          cpu          arm,cortex-a12                                     	                      ,  @        :              A  r        [   	        g         cpu@501          cpu          arm,cortex-a12                                   	                      ,  @        :              A  r        g         cpu@502          cpu          arm,cortex-a12                                   	                      ,  @        :              A  r        g         cpu@503          cpu          arm,cortex-a12                                   	                      ,  @        :              A  r        g            opp-table-0          operating-points-v2          o        g      opp-126000000           z                   opp-216000000           z                    opp-408000000           z    Q                opp-600000000           z    #F                opp-696000000           z    )|          ~      opp-816000000           z    0,          B@      opp-1008000000          z    <                opp-1200000000          z    G                opp-1416000000          z    Tfr          O      opp-1512000000          z    ZJ                opp-1608000000          z    _"                 opp-1704000000          z    e          p      opp-1800000000          z    kI          \         reserved-memory                                      dma-unusable@fe000000                                   oscillator           fixed-clock         n6         xin24m                      g   
      timer            arm,armv7-timer                0                                 
          n6                timer@ff810000           rockchip,rk3288-timer                                          H           :     a   
        pclk timer        display-subsystem            rockchip,display-subsystem                      mmc@ff0c0000             rockchip,rk3288-dw-mshc         р         :           D      r      v        biu ciu ciu-drive ciu-sample            !                                            @                       ,reset         	  8disabled          mmc@ff0d0000             rockchip,rk3288-dw-mshc         р         :           E      s      w        biu ciu ciu-drive ciu-sample            !                   !                        @                       ,reset           8okay            ?            I         Z         g        }                    default                                                                                  mmc@ff0e0000             rockchip,rk3288-dw-mshc         р         :           F      t      x        biu ciu ciu-drive ciu-sample            !                   "                        @                       ,reset         	  8disabled          mmc@ff0f0000             rockchip,rk3288-dw-mshc         р         :           G      u      y        biu ciu ciu-drive ciu-sample            !                   #                        @                       ,reset           8okay            ?                                ,         7        }                    default                        saradc@ff100000          rockchip,saradc                                       $           F           :      I     [        saradc apb_pclk               W        ,saradc-apb        	  8disabled          spi@ff110000          (   rockchip,rk3288-spi rockchip,rk3066-spi         :      A     R        spiclk apb_pclk         X                    ]tx rx                   ,           default                                                                           	  8disabled          spi@ff120000          (   rockchip,rk3288-spi rockchip,rk3066-spi         :      B     S        spiclk apb_pclk         X                    ]tx rx                   -           default                                                                           	  8disabled          spi@ff130000          (   rockchip,rk3288-spi rockchip,rk3066-spi         :      C     T        spiclk apb_pclk         X                    ]tx rx                   .           default                !   "   #                                                        8okay            g      flash@0          jedec,spi-nor           z                      i2c@ff140000             rockchip,rk3288-i2c                                       >                                     i2c         :     M        default            $        8okay                        2           d   tpm@20           infineon,slb9645tt                                 i2c@ff150000             rockchip,rk3288-i2c                                       ?                                     i2c         :     O        default            %      	  8disabled          i2c@ff160000             rockchip,rk3288-i2c                                       @                                     i2c         :     P        default            &        8okay                        2          ,      i2c@ff170000             rockchip,rk3288-i2c                                       A                                     i2c         :     Q        default            '      	  8disabled          serial@ff180000       &   rockchip,rk3288-uart snps,dw-apb-uart                                         7                                 :      M     U        baudclk apb_pclk            X                    ]tx rx           default            (   )   *        8okay       bluetooth           default            +   ,   -         brcm,bcm43540-bt               .                  .                  .                -        )             serial@ff190000       &   rockchip,rk3288-uart snps,dw-apb-uart                                         8                                 :      N     V        baudclk apb_pclk            X                    ]tx rx           default            /        8okay          serial@ff690000       &   rockchip,rk3288-uart snps,dw-apb-uart                i                         9                                 :      O     W        baudclk apb_pclk            default            0        8okay          serial@ff1b0000       &   rockchip,rk3288-uart snps,dw-apb-uart                                         :                                 :      P     X        baudclk apb_pclk            X                    ]tx rx           default            1      	  8disabled          serial@ff1c0000       &   rockchip,rk3288-uart snps,dw-apb-uart                                         ;                                 :      Q     Y        baudclk apb_pclk            X      	      
        ]tx rx           default            2      	  8disabled          dma-controller@ff250000          arm,pl330 arm,primecell              %        @                                      @            K         f        :            	  apb_pclk            g         thermal-zones      reserve-thermal         }                       3          cpu-thermal         }   d                     3      trips      cpu_alert0           p                   passive         g   4      cpu_alert1           $                   passive         g   5      cpu_crit                             	   critical             cooling-maps       map0               4      0                                map1               5      0                          gpu-thermal         }   d                     3      trips      gpu_alert0           4                   passive         g   6      gpu_crit                             	   critical             cooling-maps       map0               6           7               tsadc@ff280000           rockchip,rk3288-tsadc                (                         %           :      H     Z        tsadc apb_pclk                      
  ,tsadc-apb           init default sleep             8           9           8                      :         H        8okay            *           A           g   3      ethernet@ff290000            rockchip,rk3288-gmac                 )                                              \macirq eth_wake_irq            :      8  :            f      g      c                 ]      M  stmmaceth mac_clk_rx mac_clk_tx clk_mac_ref clk_mac_refout aclk_mac pclk_mac                  B      
  ,stmmaceth         	  8disabled          usb@ff500000             generic-ehci                 P                                    :             l   ;        qusb         8okay             {      usb@ff520000             generic-ohci                 R                         )           :             l   ;        qusb       	  8disabled          usb@ff540000          2   rockchip,rk3288-usb rockchip,rk3066-usb snps,dwc2                T                                    :             otg         host            l   <      	  qusb2-phy                     8okay                   usb@ff580000          2   rockchip,rk3288-usb rockchip,rk3066-usb snps,dwc2                X                                    :             otg         host                                             @   @            l   =      	  qusb2-phy            8okay                  z           =               usb@ff5c0000             generic-ehci                 \                                    :           	  8disabled          dma-controller@ff600000          arm,pl330 arm,primecell              `        @                                       @            K         f        :            	  apb_pclk          	  8disabled          i2c@ff650000             rockchip,rk3288-i2c              e                         <                                     i2c         :     L        default            >        8okay                        2           d   pmic@1b          rockchip,rk808                      xin32k wifibt_32kin          &   ?                       default            @   A   B                  ?                   M           Y           e           q           }                                    C           D          D               g      regulators     DCDC_REG1           vdd_arm                            q                    q        g   	   regulator-state-mem          3         DCDC_REG2           vdd_gpu                            5                    q        g   u   regulator-state-mem          3         DCDC_REG3           vcc135_ddr                       regulator-state-mem          L         DCDC_REG4           vcc_18                             w@         w@        g      regulator-state-mem          L        d w@         LDO_REG3            vdd_10                             B@         B@   regulator-state-mem          L        d B@         LDO_REG7          
  vdd10_lcd                              B@         B@            regulator-state-mem          3         SWITCH_REG1       
  vcc33_lcd                             g   X   regulator-state-mem          3         SWITCH_REG2                           vcc18_hdmi                          i2c@ff660000             rockchip,rk3288-i2c              f                         =                                     i2c         :     N        default            E        8okay                        2                 pwm@ff680000             rockchip,rk3288-pwm              h                            default            F        :     _      	  8disabled          pwm@ff680010             rockchip,rk3288-pwm              h                           default            G        :     _        8okay            g         pwm@ff680020             rockchip,rk3288-pwm              h                            default            H        :     _      	  8disabled          pwm@ff680030             rockchip,rk3288-pwm              h 0                          default            I        :     _      	  8disabled          sram@ff700000         
   mmio-sram                p                                                 p       smp-sram@0           rockchip,rk3066-smp-sram                             sram@ff720000         #   rockchip,rk3288-pmu-sram mmio-sram               r               power-management@ff730000         &   rockchip,rk3288-pmu syscon simple-mfd                s                 g      power-controller          !   rockchip,rk3288-power-controller                                                       h           
        g   \   power-domain@9              	        :                                                                                   c     h     g     f     d     e      h      i      l      k      j      $     J   K   L   M   N   O   P   Q   R                  power-domain@11                     :            o      p           S   T                  power-domain@12                     :                      U                  power-domain@13                     :                 V   W                     reboot-mode          syscon-reboot-mode                     RB         RB        RB	        RB         syscon@ff740000          rockchip,rk3288-sgrf syscon              t               clock-controller@ff760000            rockchip,rk3288-cru              v                 :   
        xin24m             :                            H                                    j                k      $  #gׄ e  рxh рxh        g         syscon@ff770000       &   rockchip,rk3288-grf syscon simple-mfd                w                 g   :   edp-phy          rockchip,rk3288-dp-phy          :      h        24m         $          	  8disabled            g   l      io-domains        "   rockchip,rk3288-io-voltage-domain           8okay            /   C        9           D           R   C        b   C        p   X        |         usbphy           rockchip,rk3288-usb-phy                                   8okay       usb-phy@320         $                        :      ]        phyclk                                  
  ,phy-reset           g   =      usb-phy@334         $               4        :      ^        phyclk                                  
  ,phy-reset           g   ;      usb-phy@348         $               H        :      _        phyclk                                  
  ,phy-reset           g   <            watchdog@ff800000             rockchip,rk3288-wdt snps,dw-wdt                               :     p                O           8okay          sound@ff8b0000        ,   rockchip,rk3288-spdif rockchip,rk3066-spdif                                           :      T           
  mclk hclk           X   Y           ]tx                  6           default            Z           :      	  8disabled          i2s@ff890000          (   rockchip,rk3288-i2s rockchip,rk3066-i2s                                                   5           :      R             i2s_clk i2s_hclk            X   Y       Y           ]tx rx           default            [                            	  8disabled          crypto@ff8a0000          rockchip,rk3288-crypto                       @                 0            :                 }              aclk hclk sclk apb_pclk                       ,crypto-rst        iommu@ff900800           rockchip,iommu                       @                           :                   aclk iface                    	  8disabled          iommu@ff914000           rockchip,iommu                @            P                                   :                   aclk iface                             	  8disabled          rga@ff920000             rockchip,rk3288-rga                                                 :                 j        aclk hclk sclk             \   	              i      l      m        ,core axi ahb          vop@ff930000             rockchip,rk3288-vop                                                              :                         aclk_vop dclk_vop hclk_vop             \   	              d      e      f        ,axi ahb dclk            	   ]        8okay       port                                      g      endpoint@0                       	   ^        g   q      endpoint@1                      	   _        g   m      endpoint@2                      	   `        g   g      endpoint@3                      	   a        g   j            iommu@ff930300           rockchip,iommu                                                  :                   aclk iface             \   	                    8okay            g   ]      vop@ff940000             rockchip,rk3288-vop                                                              :                         aclk_vop dclk_vop hclk_vop             \   	                                  ,axi ahb dclk            	   b      	  8disabled       port                                      g      endpoint@0                       	   c        g   r      endpoint@1                      	   d        g   n      endpoint@2                      	   e        g   h      endpoint@3                      	   f        g   k            iommu@ff940300           rockchip,iommu                                                  :                   aclk iface             \   	                  	  8disabled            g   b      dsi@ff960000          *   rockchip,rk3288-mipi-dsi snps,dw-mipi-dsi                        @                            :      ~     d      	  ref pclk               \   	           :      	  8disabled       ports                                port@0                                            endpoint@0                       	   g        g   `      endpoint@1                      	   h        g   e         port@1                          lvds@ff96c000            rockchip,rk3288-lvds                        @         :     g      
  pclk_lvds           lcdc               i           \   	           :      	  8disabled       ports                                port@0                                            endpoint@0                       	   j        g   a      endpoint@1                      	   k        g   f         port@1                          dp@ff970000          rockchip,rk3288-dp                       @                 b           :      i     c        dp pclk         l   l        qdp             \   	              o        ,dp             :      	  8disabled       ports                                port@0                                            endpoint@0                       	   m        g   _      endpoint@1                      	   n        g   d         port@1                          hdmi@ff980000            rockchip,rk3288-dw-hdmi                                                         :                g           :     h      m      n        iahb isfr cec              \   	        8okay            default unwedge            o           p   ports      port                                 endpoint@0                       	   q        g   ^      endpoint@1                      	   r        g   c               video-codec@ff9a0000             rockchip,rk3288-vpu                                       	          
         
  \vepu vdpu           :                 
  aclk hclk           	   s           \         iommu@ff9a0800           rockchip,iommu                                                  :                   aclk iface                         \           g   s      iommu@ff9c0440           rockchip,iommu                @       @           @                o           :                   aclk iface                    	  8disabled          gpu@ffa30000          #   rockchip,rk3288-mali arm,mali-t760                              $                                         \job mmu gpu         :              	   t                      \           8okay            	   u        g   7      opp-table-1          operating-points-v2         g   t   opp-100000000           z              ~      opp-200000000           z              ~      opp-300000000           z              B@      opp-400000000           z    ׄ                opp-600000000           z    #F                   qos@ffaa0000             rockchip,rk3288-qos syscon                                 g   V      qos@ffaa0080             rockchip,rk3288-qos syscon                                g   W      qos@ffad0000             rockchip,rk3288-qos syscon                                 g   K      qos@ffad0100             rockchip,rk3288-qos syscon                                g   L      qos@ffad0180             rockchip,rk3288-qos syscon                               g   M      qos@ffad0400             rockchip,rk3288-qos syscon                                g   N      qos@ffad0480             rockchip,rk3288-qos syscon                               g   O      qos@ffad0500             rockchip,rk3288-qos syscon                                g   J      qos@ffad0800             rockchip,rk3288-qos syscon                                g   P      qos@ffad0880             rockchip,rk3288-qos syscon                               g   Q      qos@ffad0900             rockchip,rk3288-qos syscon               	                 g   R      qos@ffae0000             rockchip,rk3288-qos syscon                                 g   U      qos@ffaf0000             rockchip,rk3288-qos syscon                                 g   S      qos@ffaf0080             rockchip,rk3288-qos syscon                                g   T      dma-controller@ffb20000          arm,pl330 arm,primecell                      @                                       @            K         f        :            	  apb_pclk            g   Y      efuse@ffb40000           rockchip,rk3288-efuse                                                           :     q        pclk_efuse     cpu-id@7                         cpu_leakage@17                          interrupt-controller@ffc01000            arm,gic-400          	'        	<                       @                                 @             `                        	          g         pinctrl          rockchip,rk3288-pinctrl            :                                                      default            v   w   x   gpio@ff750000            rockchip,gpio-bank               u                         Q           :     @         	M        	]            	'        	<           g   ?      gpio@ff780000            rockchip,gpio-bank               x                         R           :     A         	M        	]            	'        	<         gpio@ff790000            rockchip,gpio-bank               y                         S           :     B         	M        	]            	'        	<           g         gpio@ff7a0000            rockchip,gpio-bank               z                         T           :     C         	M        	]            	'        	<         gpio@ff7b0000            rockchip,gpio-bank               {                         U           :     D         	M        	]            	'        	<           g   .      gpio@ff7c0000            rockchip,gpio-bank               |                         V           :     E         	M        	]            	'        	<         gpio@ff7d0000            rockchip,gpio-bank               }                         W           :     F         	M        	]            	'        	<         gpio@ff7e0000            rockchip,gpio-bank               ~                         X           :     G         	M        	]            	'        	<           g   D      gpio@ff7f0000            rockchip,gpio-bank                                        Y           :     H         	M        	]            	'        	<         hdmi       hdmi-cec-c0         	i            y      hdmi-cec-c7         	i            y      hdmi-ddc             	i            y            y        g   o      hdmi-ddc-unwedge             	i             z            y        g   p      vcc50-hdmi-en           	i             y        g            pcfg-output-low          	w        g   z      pcfg-pull-up             	        g   {      pcfg-pull-down           	        g   |      pcfg-pull-none           	        g   y      pcfg-pull-none-12ma          	        	           g         suspend    global-pwroff           	i              y        g   x      ddrio-pwroff            	i             y        g   w      ddr0-retention          	i             {        g   v      ddr1-retention          	i             {         edp    edp-hpd         	i            |         i2c0       i2c0-xfer            	i             y             y        g   >         i2c1       i2c1-xfer            	i            y            y        g   $         i2c2       i2c2-xfer            	i      	      y      
      y        g   E         i2c3       i2c3-xfer            	i            y            y        g   %         i2c4       i2c4-xfer            	i            y            y        g   &         i2c5       i2c5-xfer            	i            y            y        g   '         i2s0       i2s0-bus          `  	i             y            y            y            y            y            y        g   [         lcdc       lcdc-ctl          @  	i            y            y            y            y        g   i         sdmmc      sdmmc-clk           	i            y      sdmmc-cmd           	i            {      sdmmc-cd            	i            {      sdmmc-bus1          	i            {      sdmmc-bus4        @  	i            {            {            {            {         sdio0      sdio0-bus1          	i            {      sdio0-bus4        @  	i            }            }            }            }        g         sdio0-cmd           	i            }        g         sdio0-clk           	i            }        g         sdio0-cd            	i            {      sdio0-wp            	i            {      sdio0-pwr           	i            {      sdio0-bkpwr         	i            {      sdio0-int           	i            {      wifienable-h            	i             y        g         bt-enable-l         	i             y        g   ,      bt-host-wake            	i             |      bt-host-wake-l          	i             y        g   +      bt-dev-wake-sleep           	i             z      bt-dev-wake-awake           	i             ~      bt-dev-wake         	i             y        g   -         sdio1      sdio1-bus1          	i            {      sdio1-bus4        @  	i            {            {            {            {      sdio1-cd            	i            {      sdio1-wp            	i            {      sdio1-bkpwr         	i            {      sdio1-int           	i            {      sdio1-cmd           	i            {      sdio1-clk           	i            y      sdio1-pwr           	i      	      {         emmc       emmc-clk            	i            }        g         emmc-cmd            	i            }        g         emmc-pwr            	i      	      {      emmc-bus1           	i             {      emmc-bus4         @  	i             {            {            {            {      emmc-bus8           	i             }            }            }            }            }            }            }            }        g         emmc-reset          	i      	       y        g            spi0       spi0-clk            	i            {        g         spi0-cs0            	i            {        g         spi0-tx         	i            {        g         spi0-rx         	i            {        g         spi0-cs1            	i            {         spi1       spi1-clk            	i            {        g         spi1-cs0            	i            {        g         spi1-rx         	i            {        g         spi1-tx         	i            {        g            spi2       spi2-cs1            	i            {      spi2-clk            	i            {        g          spi2-cs0            	i            {        g   #      spi2-rx         	i            {        g   "      spi2-tx         	i      	      {        g   !         uart0      uart0-xfer           	i            {            y        g   (      uart0-cts           	i            {        g   )      uart0-rts           	i            y        g   *         uart1      uart1-xfer           	i            {      	      y        g   /      uart1-cts           	i      
      {      uart1-rts           	i            y         uart2      uart2-xfer           	i            {            y        g   0         uart3      uart3-xfer           	i            {            y        g   1      uart3-cts           	i      	      {      uart3-rts           	i      
      y         uart4      uart4-xfer           	i            {            y        g   2      uart4-cts           	i            {      uart4-rts           	i            y         tsadc      otp-pin         	i       
       y        g   8      otp-out         	i       
      y        g   9         pwm0       pwm0-pin            	i             y        g   F         pwm1       pwm1-pin            	i            y        g   G         pwm2       pwm2-pin            	i            y        g   H         pwm3       pwm3-pin            	i            y        g   I         gmac       rgmii-pins          	i            y            y            y            y                                                             y            y            y      	                              y            y      rmii-pins           	i            y            y            y            y             y            y            y            y            y            y         spdif      spdif-tx            	i            y        g   Z         pcfg-pull-none-drv-8ma           	        	           g   }      pcfg-pull-up-drv-8ma             	        	         pcfg-output-high             	        g   ~      buttons    pwr-key-l           	i              {        g            pmic       pmic-int-l          	i              {        g   @      dvs-1           	i             |        g   A      dvs-2           	i             |        g   B         reboot     ap-warm-reset-h         	i              y        g            recovery-switch    rec-mode-l          	i       	       {         tpm    tpm-int-h           	i             y         write-protect      fw-wp-ap            	i             y         usb-host       usb2-pwr-en         	i              y        g               chosen          	serial2:115200n8          memory           memory                                power-button          
   gpio-keys           default               key-power           	Power              ?              	   t        	   d         ?         gpio-restart             gpio-restart               ?               default                    	         emmc-pwrseq          mmc-pwrseq-emmc                    default         	      	            g         sdio-pwrseq          mmc-pwrseq-simple           :            
  ext_clock           default                    	   .              g         vcc-5v           regulator-fixed         vcc_5v                             LK@         LK@        g         vcc33-sys            regulator-fixed       
  vcc33_sys                              2Z         2Z        

           g         vcc50-hdmi           regulator-fixed         vcc50_hdmi                            

            
        
(   D               default                  vdd-logic            pwm-regulator         
  vdd_logic           
-                     
2           
=   {            
Q                              ~         p                vcc33_io             regulator-fixed       	  vcc33_io                              

           g   C      vcc5-host2-regulator             regulator-fixed          
        
(   ?               default                    vcc5_host2                             	#address-cells #size-cells compatible interrupt-parent model ethernet0 i2c0 i2c1 i2c2 i2c3 i2c4 i2c5 mshc0 mshc1 mshc2 mshc3 serial0 serial1 serial2 serial3 serial4 spi0 spi1 spi2 mmc0 interrupts interrupt-affinity enable-method rockchip,pmu device_type reg resets operating-points-v2 #cooling-cells clock-latency clocks dynamic-power-coefficient cpu0-supply phandle opp-shared opp-hz opp-microvolt ranges clock-frequency clock-output-names #clock-cells arm,cpu-registers-not-fw-configured arm,no-tick-in-suspend clock-names ports max-frequency fifo-depth reset-names status bus-width cap-sd-highspeed cap-sdio-irq keep-power-in-suspend mmc-pwrseq non-removable pinctrl-names pinctrl-0 sd-uhs-sdr12 sd-uhs-sdr25 sd-uhs-sdr50 sd-uhs-sdr104 vmmc-supply vqmmc-supply cap-mmc-highspeed rockchip,default-sample-phase disable-wp mmc-hs200-1_8v #io-channel-cells dmas dma-names rx-sample-delay-ns spi-max-frequency i2c-scl-falling-time-ns i2c-scl-rising-time-ns powered-while-suspended reg-shift reg-io-width host-wakeup-gpios shutdown-gpios device-wakeup-gpios max-speed brcm,bt-pcm-int-params #dma-cells arm,pl330-broken-no-flushp arm,pl330-periph-burst polling-delay-passive polling-delay thermal-sensors temperature hysteresis trip cooling-device pinctrl-1 pinctrl-2 #thermal-sensor-cells rockchip,grf rockchip,hw-tshut-temp rockchip,hw-tshut-mode rockchip,hw-tshut-polarity interrupt-names phys phy-names needs-reset-on-resume dr_mode snps,reset-phy-on-wake snps,need-phy-for-wake g-np-tx-fifo-size g-rx-fifo-size g-tx-fifo-size assigned-clocks assigned-clock-parents rockchip,system-power-controller wakeup-source vcc1-supply vcc2-supply vcc3-supply vcc4-supply vcc7-supply vcc8-supply vcc12-supply vddio-supply dvs-gpios regulator-name regulator-always-on regulator-boot-on regulator-min-microvolt regulator-max-microvolt regulator-ramp-delay regulator-off-in-suspend regulator-on-in-suspend regulator-suspend-microvolt regulator-suspend-mem-disabled #pwm-cells #power-domain-cells pm_qos offset mode-normal mode-recovery mode-bootloader mode-loader #reset-cells assigned-clock-rates #phy-cells bb-supply dvp-supply flash0-supply gpio1830-supply gpio30-supply lcdc-supply wifi-supply #sound-dai-cells rockchip,playback-channels rockchip,capture-channels #iommu-cells rockchip,disable-mmu-reset power-domains iommus remote-endpoint mali-supply interrupt-controller #interrupt-cells gpio-controller #gpio-cells rockchip,pins output-low bias-pull-up bias-pull-down bias-disable drive-strength output-high stdout-path label linux,code debounce-interval priority reset-gpios vin-supply enable-active-high gpio pwms pwm-supply pwm-dutycycle-range pwm-dutycycle-unit 