     8     (                                               khadas,edge2 rockchip,rk3588s                                    +            7Khadas Edge2       cpus                         +       cpu-map    cluster0       core0            =         core1            =         core2            =         core3            =            cluster1       core0            =         core1            =            cluster2       core0            =         core1            =   	            cpu@0            Acpu           arm,cortex-a55           M             Qpsci             _           r   
             y   
             0,                                     @                                    @                                          1           @         cpu@100          Acpu           arm,cortex-a55           M            Qpsci             _           r   
                                        @                                    @                                          1           @         cpu@200          Acpu           arm,cortex-a55           M            Qpsci             _           r   
                                        @                                    @                                          1           @         cpu@300          Acpu           arm,cortex-a55           M            Qpsci             _           r   
                                        @                                    @                                          1           @         cpu@400          Acpu           arm,cortex-a76           M            Qpsci             _            r   
            y   
            0,                                     @                                    @                                         1           @         cpu@500          Acpu           arm,cortex-a76           M            Qpsci             _            r   
                                       @                                    @                                         1           @         cpu@600          Acpu           arm,cortex-a76           M            Qpsci             _            r   
            y   
            0,                                     @                                    @                                         1           @         cpu@700          Acpu           arm,cortex-a76           M            Qpsci             _            r   
                                       @                                    @                                         1           @   	      idle-states         Hpsci       cpu-sleep             arm,idle-state           U        f           }   d           x                  @            l2-cache-l0           cache                           @                                                   @         l2-cache-l1           cache                           @                                                   @         l2-cache-l2           cache                           @                                                   @         l2-cache-l3           cache                           @                                                   @         l2-cache-b0           cache                           @                                                   @         l2-cache-b1           cache                           @                                                   @         l2-cache-b2           cache                           @                                                   @         l2-cache-b3           cache                           @                                                   @         l3-cache              cache             0              @                                        @            firmware       optee             linaro,optee-tz          Xsmc       scmi              arm,scmi-smc            ɂ                                  +       protocol@14          M                      @   
      protocol@16          M                          pmu-a55           arm,cortex-a55-pmu                            pmu-a76           arm,cortex-a76-pmu                            psci              arm,psci-1.0             Xsmc       clock-0           fixed-clock         )׫        spll                      timer             arm,armv8-timer       P                                               
                          %  "sec-phys phys virt hyp-phys hyp-virt          clock-1           fixed-clock         n6         xin24m                    clock-2           fixed-clock                    xin32k                    sram@10f000       
    mmio-sram            M                     2                                  +      sram@0            arm,scmi-shmem           M               @            syscon@fd58c000           rockchip,rk3588-sys-grf syscon           M    X                @   R      syscon@fd5b0000           rockchip,rk3588-php-grf syscon           M    [                 @         syscon@fd5f0000           rockchip,rk3588-ioc syscon           M    _                 @         sram@fd600000         
    mmio-sram            M    `                 2        `                          +         clock-controller@fd7c0000             rockchip,rk3588-cru          M    |                 y                                                                         ]      q                 @   A .  2Fq )׫ׄ e /  ׄ   e Zр         9                                 @         i2c@fd880000          (    rockchip,rk3588-i2c rockchip,rk3399-i2c          M                           =                r     t     s      	  Fi2c pclk            R           \default                      +          	  jdisabled          serial@fd890000       &    rockchip,rk3588-uart snps,dw-apb-uart            M                           K                r                  Fbaudclk apb_pclk            q                    vtx rx           R           \default                             	  jdisabled          pwm@fd8b0000          (    rockchip,rk3588-pwm rockchip,rk3328-pwm          M                      r                	  Fpwm pclk            R           \default                  	  jdisabled          pwm@fd8b0010          (    rockchip,rk3588-pwm rockchip,rk3328-pwm          M                     r                	  Fpwm pclk            R           \default                  	  jdisabled          pwm@fd8b0020          (    rockchip,rk3588-pwm rockchip,rk3328-pwm          M                      r                	  Fpwm pclk            R           \default                  	  jdisabled          pwm@fd8b0030          (    rockchip,rk3588-pwm rockchip,rk3328-pwm          M     0                r                	  Fpwm pclk            R            \default                  	  jdisabled          power-management@fd8d8000         &    rockchip,rk3588-pmu syscon simple-mfd            M               power-controller          !    rockchip,rk3588-power-controller                                    +            jokay            @   Q   power-domain@8           M                                    +       power-domain@9           M   	          r     !     #     "                !   "   #                                 +       power-domain@10          M   
         r     !     #     "           $                  power-domain@11          M            r     !     #     "           %                        power-domain@12          M            r                          &   '   (   )                  power-domain@13          M                        +                   power-domain@14          M         (   r                                    *                  power-domain@15          M             r                               +                  power-domain@16          M            r                     ,   -   .                     +                   power-domain@17          M             r                               /   0   1                        power-domain@21          M            r                                                                                                      2   3   4   5   6   7   8   9                     +                   power-domain@23          M            r      C      A                :                  power-domain@14          M             r                               *                  power-domain@15          M            r                          +                  power-domain@22          M            r                     ;                     power-domain@24          M            r     [     Z     ]           <   =                     +                   power-domain@25          M         8   r                                   Z           >                     power-domain@26          M         8   r                                   Q           ?   @                  power-domain@27          M         0   r                                         A   B   C   D                     +                   power-domain@28          M             r                               E   F                  power-domain@29          M         (   r                                    G   H                     power-domain@30          M            r     z     {           I                  power-domain@31          M         8   r     W                                         J   K   L   M                  power-domain@33          M   !         r     W     Z     [                  power-domain@34          M   "         r     W     Z     [                  power-domain@37          M   %         r          2           N                  power-domain@38          M   &         r      4      5                  power-domain@40          M   (           O                        i2s@fddc0000              rockchip,rk3588-i2s-tdm          M                                            r                       Fmclk_tx mclk_rx hclk             y                           q   P            vtx             Q                        tx-m                      	  jdisabled          i2s@fddf0000              rockchip,rk3588-i2s-tdm          M                                            r     4     4     5        Fmclk_tx mclk_rx hclk             y     1                      q   P           vtx             Q                        tx-m                      	  jdisabled          i2s@fddfc000              rockchip,rk3588-i2s-tdm          M                                           r     0     0     ,        Fmclk_tx mclk_rx hclk             y     -                      q   P           vrx             Q                        rx-m                      	  jdisabled          qos@fdf35000              rockchip,rk3588-qos syscon           M    P                 @   &      qos@fdf35200              rockchip,rk3588-qos syscon           M    R                 @   '      qos@fdf35400              rockchip,rk3588-qos syscon           M    T                 @   (      qos@fdf35600              rockchip,rk3588-qos syscon           M    V                 @   )      qos@fdf36000              rockchip,rk3588-qos syscon           M    `                 @   I      qos@fdf39000              rockchip,rk3588-qos syscon           M                     @   N      qos@fdf3d800              rockchip,rk3588-qos syscon           M                     @   O      qos@fdf3e000              rockchip,rk3588-qos syscon           M                     @   K      qos@fdf3e200              rockchip,rk3588-qos syscon           M                     @   J      qos@fdf3e400              rockchip,rk3588-qos syscon           M                     @   L      qos@fdf3e600              rockchip,rk3588-qos syscon           M                     @   M      qos@fdf40000              rockchip,rk3588-qos syscon           M                      @   G      qos@fdf40200              rockchip,rk3588-qos syscon           M                     @   H      qos@fdf40400              rockchip,rk3588-qos syscon           M                     @   A      qos@fdf40500              rockchip,rk3588-qos syscon           M                     @   B      qos@fdf40600              rockchip,rk3588-qos syscon           M                     @   C      qos@fdf40800              rockchip,rk3588-qos syscon           M                     @   D      qos@fdf41000              rockchip,rk3588-qos syscon           M                     @   E      qos@fdf41100              rockchip,rk3588-qos syscon           M                     @   F      qos@fdf60000              rockchip,rk3588-qos syscon           M                      @   ,      qos@fdf60200              rockchip,rk3588-qos syscon           M                     @   -      qos@fdf60400              rockchip,rk3588-qos syscon           M                     @   .      qos@fdf61000              rockchip,rk3588-qos syscon           M                     @   /      qos@fdf61200              rockchip,rk3588-qos syscon           M                     @   0      qos@fdf61400              rockchip,rk3588-qos syscon           M                     @   1      qos@fdf62000              rockchip,rk3588-qos syscon           M                      @   *      qos@fdf63000              rockchip,rk3588-qos syscon           M    0                 @   +      qos@fdf64000              rockchip,rk3588-qos syscon           M    @                 @   :      qos@fdf66000              rockchip,rk3588-qos syscon           M    `                 @   2      qos@fdf66200              rockchip,rk3588-qos syscon           M    b                 @   3      qos@fdf66400              rockchip,rk3588-qos syscon           M    d                 @   4      qos@fdf66600              rockchip,rk3588-qos syscon           M    f                 @   5      qos@fdf66800              rockchip,rk3588-qos syscon           M    h                 @   6      qos@fdf66a00              rockchip,rk3588-qos syscon           M    j                 @   7      qos@fdf66c00              rockchip,rk3588-qos syscon           M    l                 @   8      qos@fdf66e00              rockchip,rk3588-qos syscon           M    n                 @   9      qos@fdf67000              rockchip,rk3588-qos syscon           M    p                 @   ;      qos@fdf67200              rockchip,rk3588-qos syscon           M    r               qos@fdf70000              rockchip,rk3588-qos syscon           M                      @   $      qos@fdf71000              rockchip,rk3588-qos syscon           M                     @   %      qos@fdf72000              rockchip,rk3588-qos syscon           M                      @   !      qos@fdf72200              rockchip,rk3588-qos syscon           M    "                 @   "      qos@fdf72400              rockchip,rk3588-qos syscon           M    $                 @   #      qos@fdf80000              rockchip,rk3588-qos syscon           M                      @   >      qos@fdf81000              rockchip,rk3588-qos syscon           M                     @   ?      qos@fdf81200              rockchip,rk3588-qos syscon           M                     @   @      qos@fdf82000              rockchip,rk3588-qos syscon           M                      @   <      qos@fdf82200              rockchip,rk3588-qos syscon           M    "                 @   =      ethernet@fe1c0000         &    rockchip,rk3588-gmac snps,dwmac-4.20a            M                                                          "macirq eth_wake_irq       (   r     6     7     Y     ^     5      0  Fstmmaceth clk_mac_ref pclk_mac aclk_mac ptp_ref            Q   !             $      
  stmmaceth           9   R                      S         '        8   T        K   U         ^      	  jdisabled       mdio              snps,dwmac-mdio                      +          stmmac-axi-config           g                                 q                      @   S      rx-queues-config                       @   T   queue0        queue1           tx-queues-config                       @   U   queue0        queue1              mmc@fe2c0000          0    rockchip,rk3588-dw-mshc rockchip,rk3288-dw-mshc          M    ,        @                                 r   
      
   	                  Fbiu ciu ciu-drive ciu-sample                                \default         R   V   W   X   Y           Q   (      	  jdisabled          mmc@fe2d0000          0    rockchip,rk3588-dw-mshc rockchip,rk3288-dw-mshc          M    -        @                                 r                            Fbiu ciu ciu-drive ciu-sample                                \default         R   Z           Q   %      	  jdisabled          mmc@fe2e0000              rockchip,rk3588-dwcmshc          M    .                                        y     -     .     ,          n6        (   r     ,     *     +     -     .        Fcore bus axi block timer                     R   [   \   ]   ^   _        \default       (                                   core bus axi block timer            jokay                                                                  i2s@fe470000              rockchip,rk3588-i2s-tdm          M    G                                        r      +      /      (        Fmclk_tx mclk_rx hclk             y      )      -                            q                     vtx rx              Q   &              *      +      
  tx-m rx-m            %        \default       (  R   `   a   b   c   d   e   f   g   h   i                  	  jdisabled          i2s@fe480000              rockchip,rk3588-i2s-tdm          M    H                                        r     y     }     u        Fmclk_tx mclk_rx hclk            q                    vtx rx                ^     _      
  tx-m rx-m            %        \default       (  R   j   k   l   m   n   o   p   q   r   s                  	  jdisabled          i2s@fe490000          (    rockchip,rk3588-i2s rockchip,rk3066-i2s          M    I                                        r                    Fi2s_clk i2s_hclk             y                            q   t       t           vtx rx              Q   &         %        \default         R   u   v   w   x                  	  jdisabled          i2s@fe4a0000          (    rockchip,rk3588-i2s rockchip,rk3066-i2s          M    J                                        r      %              Fi2s_clk i2s_hclk             y      "                      q   t      t           vtx rx              Q   &         %        \default         R   y   z   {   |                  	  jdisabled          interrupt-controller@fe600000             arm,gic-v3            M    `             h                       	                @        U    a          _     8         j         2                    y            +           @      msi-controller@fe640000           arm,gic-v3-its           M    d                  j                 msi-controller@fe660000           arm,gic-v3-its           M    f                  j                 ppi-partitions     interrupt-partition-0                               @         interrupt-partition-1                       	        @               dma-controller@fea10000           arm,pl330 arm,primecell          M            @                 V              W                         r      n      	  Fapb_pclk                       @         dma-controller@fea30000           arm,pl330 arm,primecell          M            @                 X              Y                         r      o      	  Fapb_pclk                       @   t      i2c@fea90000          (    rockchip,rk3588-i2c rockchip,rk3399-i2c          M                      r            {      	  Fi2c pclk                  >               R   }        \default                      +          	  jdisabled          i2c@feaa0000          (    rockchip,rk3588-i2c rockchip,rk3399-i2c          M                      r            |      	  Fi2c pclk                  ?               R   ~        \default                      +          	  jdisabled          i2c@feab0000          (    rockchip,rk3588-i2c rockchip,rk3399-i2c          M                      r            }      	  Fi2c pclk                  @               R           \default                      +          	  jdisabled          i2c@feac0000          (    rockchip,rk3588-i2c rockchip,rk3399-i2c          M                      r            ~      	  Fi2c pclk                  A               R           \default                      +          	  jdisabled          i2c@fead0000          (    rockchip,rk3588-i2c rockchip,rk3399-i2c          M                      r                  	  Fi2c pclk                  B               R           \default                      +          	  jdisabled          timer@feae0000        ,    rockchip,rk3588-timer rockchip,rk3288-timer          M                            !                r      T      W        Fpclk timer        watchdog@feaf0000              rockchip,rk3588-wdt snps,dw-wdt          M                      r      d      c      
  Ftclk pclk                 ;             spi@feb00000          (    rockchip,rk3588-spi rockchip,rk3066-spi          M                           F                r                    Fspiclk apb_pclk         q                    vtx rx                      R                 \default                      +          	  jdisabled          spi@feb10000          (    rockchip,rk3588-spi rockchip,rk3066-spi          M                           G                r                    Fspiclk apb_pclk         q                    vtx rx                      R                 \default                      +          	  jdisabled          spi@feb20000          (    rockchip,rk3588-spi rockchip,rk3066-spi          M                           H                r                    Fspiclk apb_pclk         q   t      t           vtx rx                      R                 \default                      +          	  jdisabled          spi@feb30000          (    rockchip,rk3588-spi rockchip,rk3066-spi          M                           I                r                    Fspiclk apb_pclk         q   t      t           vtx rx                      R                 \default                      +          	  jdisabled          serial@feb40000       &    rockchip,rk3588-uart snps,dw-apb-uart            M                           L                r                    Fbaudclk apb_pclk            q            	        vtx rx           R           \default                             	  jdisabled          serial@feb50000       &    rockchip,rk3588-uart snps,dw-apb-uart            M                           M                r                    Fbaudclk apb_pclk            q      
              vtx rx           R           \default                               jokay          serial@feb60000       &    rockchip,rk3588-uart snps,dw-apb-uart            M                           N                r                    Fbaudclk apb_pclk            q                    vtx rx           R           \default                             	  jdisabled          serial@feb70000       &    rockchip,rk3588-uart snps,dw-apb-uart            M                           O                r                    Fbaudclk apb_pclk            q   t   	   t   
        vtx rx           R           \default                             	  jdisabled          serial@feb80000       &    rockchip,rk3588-uart snps,dw-apb-uart            M                           P                r                    Fbaudclk apb_pclk            q   t      t           vtx rx           R           \default                             	  jdisabled          serial@feb90000       &    rockchip,rk3588-uart snps,dw-apb-uart            M                           Q                r                    Fbaudclk apb_pclk            q   t      t           vtx rx           R           \default                             	  jdisabled          serial@feba0000       &    rockchip,rk3588-uart snps,dw-apb-uart            M                           R                r                    Fbaudclk apb_pclk            q   P      P           vtx rx           R           \default                             	  jdisabled          serial@febb0000       &    rockchip,rk3588-uart snps,dw-apb-uart            M                           S                r                    Fbaudclk apb_pclk            q   P   	   P   
        vtx rx           R           \default                             	  jdisabled          serial@febc0000       &    rockchip,rk3588-uart snps,dw-apb-uart            M                           T                r                    Fbaudclk apb_pclk            q   P      P           vtx rx           R           \default                             	  jdisabled          pwm@febd0000          (    rockchip,rk3588-pwm rockchip,rk3328-pwm          M                      r      L      K      	  Fpwm pclk            R           \default                  	  jdisabled          pwm@febd0010          (    rockchip,rk3588-pwm rockchip,rk3328-pwm          M                     r      L      K      	  Fpwm pclk            R           \default                  	  jdisabled          pwm@febd0020          (    rockchip,rk3588-pwm rockchip,rk3328-pwm          M                      r      L      K      	  Fpwm pclk            R           \default                  	  jdisabled          pwm@febd0030          (    rockchip,rk3588-pwm rockchip,rk3328-pwm          M     0                r      L      K      	  Fpwm pclk            R           \default                  	  jdisabled          pwm@febe0000          (    rockchip,rk3588-pwm rockchip,rk3328-pwm          M                      r      O      N      	  Fpwm pclk            R           \default                  	  jdisabled          pwm@febe0010          (    rockchip,rk3588-pwm rockchip,rk3328-pwm          M                     r      O      N      	  Fpwm pclk            R           \default                  	  jdisabled          pwm@febe0020          (    rockchip,rk3588-pwm rockchip,rk3328-pwm          M                      r      O      N      	  Fpwm pclk            R           \default                  	  jdisabled          pwm@febe0030          (    rockchip,rk3588-pwm rockchip,rk3328-pwm          M     0                r      O      N      	  Fpwm pclk            R           \default                  	  jdisabled          pwm@febf0000          (    rockchip,rk3588-pwm rockchip,rk3328-pwm          M                      r      R      Q      	  Fpwm pclk            R           \default                  	  jdisabled          pwm@febf0010          (    rockchip,rk3588-pwm rockchip,rk3328-pwm          M                     r      R      Q      	  Fpwm pclk            R           \default                  	  jdisabled          pwm@febf0020          (    rockchip,rk3588-pwm rockchip,rk3328-pwm          M                      r      R      Q      	  Fpwm pclk            R           \default                  	  jdisabled          pwm@febf0030          (    rockchip,rk3588-pwm rockchip,rk3328-pwm          M     0                r      R      Q      	  Fpwm pclk            R           \default                  	  jdisabled          tsadc@fec00000            rockchip,rk3588-tsadc            M                                           r                    Ftsadc apb_pclk           y                              V      W        tsadc-apb tsadc                                          R                      \gpio otpout                  	  jdisabled          adc@fec10000              rockchip,rk3588-saradc           M                                          0            r                    Fsaradc apb_pclk               U        saradc-apb        	  jdisabled          i2c@fec80000          (    rockchip,rk3588-i2c rockchip,rk3399-i2c          M                      r                  	  Fi2c pclk                  C               R           \default                      +          	  jdisabled          i2c@fec90000          (    rockchip,rk3588-i2c rockchip,rk3399-i2c          M                      r                  	  Fi2c pclk                  D               R           \default                      +          	  jdisabled          i2c@feca0000          (    rockchip,rk3588-i2c rockchip,rk3399-i2c          M                      r                  	  Fi2c pclk                  E               R           \default                      +          	  jdisabled          spi@fecb0000          (    rockchip,rk3588-spi rockchip,rk3066-spi          M                           J                r                    Fspiclk apb_pclk         q   P      P           vtx rx                      R                 \default                      +          	  jdisabled          efuse@fecc0000            rockchip,rk3588-otp          M                       r                                Fotp apb_pclk phy arb                                      otp apb arb                      +      cpu-code@2           M            id@7             M            cpu-leakage@17           M            cpu-leakage@18           M            cpu-leakage@19           M            log-leakage@1a           M            gpu-leakage@1b           M            cpu-version@1c           M              B            npu-leakage@28           M   (         codec-leakage@29             M   )            dma-controller@fed10000           arm,pl330 arm,primecell          M            @                 Z              [                         r      p      	  Fapb_pclk                       @   P      sram@ff001000         
    mmio-sram            M                    2                                 +         pinctrl           rockchip,rk3588-pinctrl          2        9                        +           @      gpio@fd8a0000             rockchip,gpio-bank           M                                           r     q     r         G        W                        @        c           y         gpio@fec20000             rockchip,gpio-bank           M                                           r      s      t         G        W                        @        c           y         gpio@fec30000             rockchip,gpio-bank           M                                           r      u      v         G        W          @             @        c           y         gpio@fec40000             rockchip,gpio-bank           M                                           r      w      x         G        W          `             @        c           y         gpio@fec50000             rockchip,gpio-bank           M                                           r      y      z         G        W                       @        c           y         pcfg-pull-up             o        @         pcfg-pull-none           |        @         pcfg-pull-none-drv-level-2           |                   @         pcfg-pull-up-drv-level-1             o                   @         pcfg-pull-up-drv-level-2             o                   @         pcfg-pull-none-smt           |                 @         auddsm        bt1120        can0          can1          can2          cif       clk32k        cpu       ddrphych0         ddrphych1         ddrphych2         ddrphych3         dp0       dp1       emmc       emmc-rstnout                                @   [      emmc-bus8                                                                                                                   @   \      emmc-clk                                @   ]      emmc-cmd                                 @   ^      emmc-data-strobe                                @   _         eth1          fspi          gmac1         gpu       hdmi          i2c0       i2c0m0-xfer                                            @            i2c1       i2c1m0-xfer                    	             	           @   }         i2c2       i2c2m0-xfer                    	             	           @   ~         i2c3       i2c3m0-xfer                   	            	           @            i2c4       i2c4m0-xfer                   	            	           @            i2c5       i2c5m0-xfer                   	            	           @            i2c6       i2c6m0-xfer                    	             	           @            i2c7       i2c7m0-xfer                   	            	           @            i2c8       i2c8m0-xfer                   	            	           @            i2s0       i2s0-lrck                               @   `      i2s0-sclk                               @   a      i2s0-sdi0                               @   b      i2s0-sdi1                               @   c      i2s0-sdi2                               @   d      i2s0-sdi3                               @   e      i2s0-sdo0                               @   f      i2s0-sdo1                               @   g      i2s0-sdo2                               @   h      i2s0-sdo3                               @   i         i2s1       i2s1m0-lrck                             @   j      i2s1m0-sclk                             @   k      i2s1m0-sdi0                             @   l      i2s1m0-sdi1                             @   m      i2s1m0-sdi2                             @   n      i2s1m0-sdi3                             @   o      i2s1m0-sdo0               	              @   p      i2s1m0-sdo1               
              @   q      i2s1m0-sdo2                             @   r      i2s1m0-sdo3                             @   s         i2s2       i2s2m1-lrck                             @   u      i2s2m1-sclk                             @   v      i2s2m1-sdi                
              @   w      i2s2m1-sdo                              @   x         i2s3       i2s3-lrck                               @   y      i2s3-sclk                               @   z      i2s3-sdi                                @   {      i2s3-sdo                                @   |         jtag          litcpu        mcu       mipi          npu       pcie20x1          pcie30phy         pcie30x1          pcie30x2          pcie30x4          pdm0          pdm1          pmic          pmu       pwm0       pwm0m0-pins                              @            pwm1       pwm1m0-pins                              @            pwm2       pwm2m0-pins                              @            pwm3       pwm3m0-pins                              @             pwm4       pwm4m0-pins                              @            pwm5       pwm5m0-pins                	              @            pwm6       pwm6m0-pins                              @            pwm7       pwm7m0-pins                              @            pwm8       pwm8m0-pins                             @            pwm9       pwm9m0-pins                             @            pwm10      pwm10m0-pins                                 @            pwm11      pwm11m0-pins                                @            pwm12      pwm12m0-pins                                @            pwm13      pwm13m0-pins                                @            pwm14      pwm14m0-pins                                @            pwm15      pwm15m0-pins                                @            refclk        sata          sata0         sata1         sata2         sdio       sdiom1-pins       `                                                                                   @   Z         sdmmc      sdmmc-bus4        @                                                          @   Y      sdmmc-clk                               @   V      sdmmc-cmd                               @   W      sdmmc-det                                @   X         spdif0        spdif1        spi0       spi0m0-pins       0                                                 @         spi0m0-cs0                               @         spi0m0-cs1                               @            spi1       spi1m1-pins       0                                              @         spi1m1-cs0                              @         spi1m1-cs1                              @            spi2       spi2m2-pins       0                                                 @         spi2m2-cs0                 	              @         spi2m2-cs1                               @            spi3       spi3m1-pins       0                                              @         spi3m1-cs0                              @         spi3m1-cs1                              @            spi4       spi4m0-pins       0                                              @         spi4m0-cs0                              @         spi4m0-cs1                              @            tsadc      tsadc-shut                               @            uart0      uart0m1-xfer                                 	              @            uart1      uart1m1-xfer                      
            
           @            uart2      uart2m0-xfer                       
             
           @            uart3      uart3m1-xfer                      
            
           @            uart4      uart4m1-xfer                      
            
           @            uart5      uart5m1-xfer                      
            
           @            uart6      uart6m1-xfer                       
            
           @            uart7      uart7m1-xfer                      
            
           @            uart8      uart8m1-xfer                      
            
           @            uart9      uart9m1-xfer                      
            
           @            vop       bt656         gpio-func      tsadc-gpio-func                               @               aliases         /mmc@fe2e0000           /serial@feb50000          chosen          serial2:1500000n8            	compatible interrupt-parent #address-cells #size-cells model cpu device_type reg enable-method capacity-dmips-mhz clocks assigned-clocks assigned-clock-rates cpu-idle-states i-cache-size i-cache-line-size i-cache-sets d-cache-size d-cache-line-size d-cache-sets next-level-cache dynamic-power-coefficient #cooling-cells phandle entry-method local-timer-stop arm,psci-suspend-param entry-latency-us exit-latency-us min-residency-us cache-level cache-unified arm,smc-id shmem #clock-cells #reset-cells interrupts clock-frequency clock-output-names interrupt-names ranges rockchip,grf clock-names pinctrl-0 pinctrl-names status dmas dma-names reg-shift reg-io-width #pwm-cells #power-domain-cells pm_qos assigned-clock-parents power-domains resets reset-names #sound-dai-cells rockchip,php-grf snps,axi-config snps,mixed-burst snps,mtl-rx-config snps,mtl-tx-config snps,tso snps,blen snps,wr_osr_lmt snps,rd_osr_lmt snps,rx-queues-to-use snps,tx-queues-to-use fifo-depth max-frequency bus-width no-sdio no-sd non-removable mmc-hs400-1_8v mmc-hs400-enhanced-strobe rockchip,trcm-sync-tx-only interrupt-controller mbi-alias mbi-ranges msi-controller #interrupt-cells #msi-cells affinity arm,pl330-periph-burst #dma-cells num-cs rockchip,hw-tshut-temp rockchip,hw-tshut-mode rockchip,hw-tshut-polarity pinctrl-1 #thermal-sensor-cells #io-channel-cells bits gpio-controller gpio-ranges #gpio-cells bias-pull-up bias-disable drive-strength input-schmitt-enable rockchip,pins mmc0 serial2 stdout-path 