     8  ߐ   (            '  X                             )    rockchip,rk3588-evb1-v10 rockchip,rk3588                                     +            7Rockchip RK3588 EVB1 V10 Board     cpus                         +       cpu-map    cluster0       core0            =         core1            =         core2            =         core3            =            cluster1       core0            =         core1            =            cluster2       core0            =         core1            =   	            cpu@0            Acpu           arm,cortex-a55           M             Qpsci             _           r   
             y   
             0,                                     @                                    @                                          1           @           K         cpu@100          Acpu           arm,cortex-a55           M            Qpsci             _           r   
                                        @                                    @                                          1           @           K         cpu@200          Acpu           arm,cortex-a55           M            Qpsci             _           r   
                                        @                                    @                                          1           @           K         cpu@300          Acpu           arm,cortex-a55           M            Qpsci             _           r   
                                        @                                    @                                          1           @           K         cpu@400          Acpu           arm,cortex-a76           M            Qpsci             _            r   
            y   
            0,                                     @                                    @                                         1           @           K         cpu@500          Acpu           arm,cortex-a76           M            Qpsci             _            r   
                                       @                                    @                                         1           @           K         cpu@600          Acpu           arm,cortex-a76           M            Qpsci             _            r   
            y   
            0,                                     @                                    @                                         1           @           K         cpu@700          Acpu           arm,cortex-a76           M            Qpsci             _            r   
                                       @                                    @                                         1           @           K   	      idle-states         Spsci       cpu-sleep             arm,idle-state           `        q              d           x                  K            l2-cache-l0           cache                           @                                                   K         l2-cache-l1           cache                           @                                                   K         l2-cache-l2           cache                           @                                                   K         l2-cache-l3           cache                           @                                                   K         l2-cache-b0           cache                           @                                                   K         l2-cache-b1           cache                           @                                                   K         l2-cache-b2           cache                           @                                                   K         l2-cache-b3           cache                           @                                                   K         l3-cache              cache             0              @                                        K            firmware       optee             linaro,optee-tz          Xsmc       scmi              arm,scmi-smc            Ԃ                                  +       protocol@14          M                      K   
      protocol@16          M                          pmu-a55           arm,cortex-a55-pmu                            pmu-a76           arm,cortex-a76-pmu                            psci              arm,psci-1.0             Xsmc       clock-0           fixed-clock         
)׫        spll                      timer             arm,armv8-timer       P                                               
                          %  -sec-phys phys virt hyp-phys hyp-virt          clock-1           fixed-clock         
n6         xin24m                    clock-2           fixed-clock         
           xin32k                    sram@10f000       
    mmio-sram            M                     =                                  +      sram@0            arm,scmi-shmem           M               K            syscon@fd58c000           rockchip,rk3588-sys-grf syscon           M    X                K   U      syscon@fd5b0000           rockchip,rk3588-php-grf syscon           M    [                 K         syscon@fd5f0000           rockchip,rk3588-ioc syscon           M    _                 K         sram@fd600000         
    mmio-sram            M    `                 =        `                          +         clock-controller@fd7c0000             rockchip,rk3588-cru          M    |                 y                                                                         ]      q                 @   A .  2Fq )׫ׄ e /  ׄ   e Zр         D                                 K         i2c@fd880000          (    rockchip,rk3588-i2c rockchip,rk3399-i2c          M                           =                r     t     s      	  Qi2c pclk            ]           gdefault                      +          	  udisabled          serial@fd890000       &    rockchip,rk3588-uart snps,dw-apb-uart            M                           K                r                  Qbaudclk apb_pclk            |                    tx rx           ]           gdefault                             	  udisabled          pwm@fd8b0000          (    rockchip,rk3588-pwm rockchip,rk3328-pwm          M                      r                	  Qpwm pclk            ]            gdefault                  	  udisabled          pwm@fd8b0010          (    rockchip,rk3588-pwm rockchip,rk3328-pwm          M                     r                	  Qpwm pclk            ]   !        gdefault                  	  udisabled          pwm@fd8b0020          (    rockchip,rk3588-pwm rockchip,rk3328-pwm          M                      r                	  Qpwm pclk            ]   "        gdefault                    uokay            K         pwm@fd8b0030          (    rockchip,rk3588-pwm rockchip,rk3328-pwm          M     0                r                	  Qpwm pclk            ]   #        gdefault                  	  udisabled          power-management@fd8d8000         &    rockchip,rk3588-pmu syscon simple-mfd            M               power-controller          !    rockchip,rk3588-power-controller                                    +            uokay            K   T   power-domain@8           M                                    +       power-domain@9           M   	          r     !     #     "                $   %   &                                 +       power-domain@10          M   
         r     !     #     "           '                  power-domain@11          M            r     !     #     "           (                        power-domain@12          M            r                          )   *   +   ,                  power-domain@13          M                        +                   power-domain@14          M         (   r                                    -                  power-domain@15          M             r                               .                  power-domain@16          M            r                     /   0   1                     +                   power-domain@17          M             r                               2   3   4                        power-domain@21          M            r                                                                                                      5   6   7   8   9   :   ;   <                     +                   power-domain@23          M            r      C      A                =                  power-domain@14          M             r                               -                  power-domain@15          M            r                          .                  power-domain@22          M            r                     >                     power-domain@24          M            r     [     Z     ]           ?   @                     +                   power-domain@25          M         8   r                                   Z           A                     power-domain@26          M         8   r                                   Q           B   C                  power-domain@27          M         0   r                                         D   E   F   G                     +                   power-domain@28          M             r                               H   I                  power-domain@29          M         (   r                                    J   K                     power-domain@30          M            r     z     {           L                  power-domain@31          M         8   r     W                                         M   N   O   P                  power-domain@33          M   !         r     W     Z     [                  power-domain@34          M   "         r     W     Z     [                  power-domain@37          M   %         r          2           Q                  power-domain@38          M   &         r      4      5                  power-domain@40          M   (           R                        i2s@fddc0000              rockchip,rk3588-i2s-tdm          M                                            r                       Qmclk_tx mclk_rx hclk             y                           |   S            tx             T                        tx-m                       	  udisabled          i2s@fddf0000              rockchip,rk3588-i2s-tdm          M                                            r     4     4     5        Qmclk_tx mclk_rx hclk             y     1                      |   S           tx             T                        tx-m                       	  udisabled          i2s@fddfc000              rockchip,rk3588-i2s-tdm          M                                           r     0     0     ,        Qmclk_tx mclk_rx hclk             y     -                      |   S           rx             T                        rx-m                       	  udisabled          qos@fdf35000              rockchip,rk3588-qos syscon           M    P                 K   )      qos@fdf35200              rockchip,rk3588-qos syscon           M    R                 K   *      qos@fdf35400              rockchip,rk3588-qos syscon           M    T                 K   +      qos@fdf35600              rockchip,rk3588-qos syscon           M    V                 K   ,      qos@fdf36000              rockchip,rk3588-qos syscon           M    `                 K   L      qos@fdf39000              rockchip,rk3588-qos syscon           M                     K   Q      qos@fdf3d800              rockchip,rk3588-qos syscon           M                     K   R      qos@fdf3e000              rockchip,rk3588-qos syscon           M                     K   N      qos@fdf3e200              rockchip,rk3588-qos syscon           M                     K   M      qos@fdf3e400              rockchip,rk3588-qos syscon           M                     K   O      qos@fdf3e600              rockchip,rk3588-qos syscon           M                     K   P      qos@fdf40000              rockchip,rk3588-qos syscon           M                      K   J      qos@fdf40200              rockchip,rk3588-qos syscon           M                     K   K      qos@fdf40400              rockchip,rk3588-qos syscon           M                     K   D      qos@fdf40500              rockchip,rk3588-qos syscon           M                     K   E      qos@fdf40600              rockchip,rk3588-qos syscon           M                     K   F      qos@fdf40800              rockchip,rk3588-qos syscon           M                     K   G      qos@fdf41000              rockchip,rk3588-qos syscon           M                     K   H      qos@fdf41100              rockchip,rk3588-qos syscon           M                     K   I      qos@fdf60000              rockchip,rk3588-qos syscon           M                      K   /      qos@fdf60200              rockchip,rk3588-qos syscon           M                     K   0      qos@fdf60400              rockchip,rk3588-qos syscon           M                     K   1      qos@fdf61000              rockchip,rk3588-qos syscon           M                     K   2      qos@fdf61200              rockchip,rk3588-qos syscon           M                     K   3      qos@fdf61400              rockchip,rk3588-qos syscon           M                     K   4      qos@fdf62000              rockchip,rk3588-qos syscon           M                      K   -      qos@fdf63000              rockchip,rk3588-qos syscon           M    0                 K   .      qos@fdf64000              rockchip,rk3588-qos syscon           M    @                 K   =      qos@fdf66000              rockchip,rk3588-qos syscon           M    `                 K   5      qos@fdf66200              rockchip,rk3588-qos syscon           M    b                 K   6      qos@fdf66400              rockchip,rk3588-qos syscon           M    d                 K   7      qos@fdf66600              rockchip,rk3588-qos syscon           M    f                 K   8      qos@fdf66800              rockchip,rk3588-qos syscon           M    h                 K   9      qos@fdf66a00              rockchip,rk3588-qos syscon           M    j                 K   :      qos@fdf66c00              rockchip,rk3588-qos syscon           M    l                 K   ;      qos@fdf66e00              rockchip,rk3588-qos syscon           M    n                 K   <      qos@fdf67000              rockchip,rk3588-qos syscon           M    p                 K   >      qos@fdf67200              rockchip,rk3588-qos syscon           M    r               qos@fdf70000              rockchip,rk3588-qos syscon           M                      K   '      qos@fdf71000              rockchip,rk3588-qos syscon           M                     K   (      qos@fdf72000              rockchip,rk3588-qos syscon           M                      K   $      qos@fdf72200              rockchip,rk3588-qos syscon           M    "                 K   %      qos@fdf72400              rockchip,rk3588-qos syscon           M    $                 K   &      qos@fdf80000              rockchip,rk3588-qos syscon           M                      K   A      qos@fdf81000              rockchip,rk3588-qos syscon           M                     K   B      qos@fdf81200              rockchip,rk3588-qos syscon           M                     K   C      qos@fdf82000              rockchip,rk3588-qos syscon           M                      K   ?      qos@fdf82200              rockchip,rk3588-qos syscon           M    "                 K   @      ethernet@fe1c0000         &    rockchip,rk3588-gmac snps,dwmac-4.20a            M                                                          -macirq eth_wake_irq       (   r     6     7     Y     ^     5      0  Qstmmaceth clk_mac_ref pclk_mac aclk_mac ptp_ref            T   !             $      
  stmmaceth           D   U                   "   V         2        C   W        V   X         i      	  udisabled       mdio              snps,dwmac-mdio                      +          stmmac-axi-config           r                                 |                      K   V      rx-queues-config                       K   W   queue0        queue1           tx-queues-config                       K   X   queue0        queue1              mmc@fe2c0000          0    rockchip,rk3588-dw-mshc rockchip,rk3288-dw-mshc          M    ,        @                                 r   
      
   	                  Qbiu ciu ciu-drive ciu-sample                                gdefault         ]   Y   Z   [   \           T   (      	  udisabled          mmc@fe2d0000          0    rockchip,rk3588-dw-mshc rockchip,rk3288-dw-mshc          M    -        @                                 r                            Qbiu ciu ciu-drive ciu-sample                                gdefault         ]   ]           T   %      	  udisabled          mmc@fe2e0000              rockchip,rk3588-dwcmshc          M    .                                        y     -     .     ,          n6        (   r     ,     *     +     -     .        Qcore bus axi block timer                     ]   ^   _   `   a   b        gdefault       (                                   core bus axi block timer            uokay                                                                  i2s@fe470000              rockchip,rk3588-i2s-tdm          M    G                                        r      +      /      (        Qmclk_tx mclk_rx hclk             y      )      -                            |                     tx rx              T   &              *      +      
  tx-m rx-m            0        gdefault       (  ]   c   d   e   f   g   h   i   j   k   l                   	  udisabled          i2s@fe480000              rockchip,rk3588-i2s-tdm          M    H                                        r     y     }     u        Qmclk_tx mclk_rx hclk            |                    tx rx                ^     _      
  tx-m rx-m            0        gdefault       (  ]   m   n   o   p   q   r   s   t   u   v                   	  udisabled          i2s@fe490000          (    rockchip,rk3588-i2s rockchip,rk3066-i2s          M    I                                        r                    Qi2s_clk i2s_hclk             y                            |   w       w           tx rx              T   &         0        gdefault         ]   x   y   z   {                   	  udisabled          i2s@fe4a0000          (    rockchip,rk3588-i2s rockchip,rk3066-i2s          M    J                                        r      %              Qi2s_clk i2s_hclk             y      "                      |   w      w           tx rx              T   &         0        gdefault         ]   |   }   ~                      	  udisabled          interrupt-controller@fe600000             arm,gic-v3            M    `             h                       	                K        `    a          j     8         u         =                                +           K      msi-controller@fe640000           arm,gic-v3-its           M    d                  u                 msi-controller@fe660000           arm,gic-v3-its           M    f                  u                 ppi-partitions     interrupt-partition-0                               K         interrupt-partition-1                       	        K               dma-controller@fea10000           arm,pl330 arm,primecell          M            @                 V              W                         r      n      	  Qapb_pclk                       K         dma-controller@fea30000           arm,pl330 arm,primecell          M            @                 X              Y                         r      o      	  Qapb_pclk                       K   w      i2c@fea90000          (    rockchip,rk3588-i2c rockchip,rk3399-i2c          M                      r            {      	  Qi2c pclk                  >               ]           gdefault                      +          	  udisabled          i2c@feaa0000          (    rockchip,rk3588-i2c rockchip,rk3399-i2c          M                      r            |      	  Qi2c pclk                  ?               ]           gdefault                      +            uokay       rtc@51            haoyu,hym8563            M   Q                    hym8563         gdefault         ]                                               i2c@feab0000          (    rockchip,rk3588-i2c rockchip,rk3399-i2c          M                      r            }      	  Qi2c pclk                  @               ]           gdefault                      +          	  udisabled          i2c@feac0000          (    rockchip,rk3588-i2c rockchip,rk3399-i2c          M                      r            ~      	  Qi2c pclk                  A               ]           gdefault                      +          	  udisabled          i2c@fead0000          (    rockchip,rk3588-i2c rockchip,rk3399-i2c          M                      r                  	  Qi2c pclk                  B               ]           gdefault                      +          	  udisabled          timer@feae0000        ,    rockchip,rk3588-timer rockchip,rk3288-timer          M                            !                r      T      W        Qpclk timer        watchdog@feaf0000              rockchip,rk3588-wdt snps,dw-wdt          M                      r      d      c      
  Qtclk pclk                 ;             spi@feb00000          (    rockchip,rk3588-spi rockchip,rk3066-spi          M                           F                r                    Qspiclk apb_pclk         |                    tx rx                      ]                 gdefault                      +          	  udisabled          spi@feb10000          (    rockchip,rk3588-spi rockchip,rk3066-spi          M                           G                r                    Qspiclk apb_pclk         |                    tx rx                      ]                 gdefault                      +          	  udisabled          spi@feb20000          (    rockchip,rk3588-spi rockchip,rk3066-spi          M                           H                r                    Qspiclk apb_pclk         |   w      w           tx rx                      ]                 gdefault                      +            uokay             y                   pmic@0            rockchip,rk806           M                                                          ]                    gdefault          B@                              &           2           >           J           V           b           n           z                                                             dvs1-null-pins          gpio_pwrctrl1         	  pin_fun0            K         dvs2-null-pins          gpio_pwrctrl2         	  pin_fun0            K         dvs3-null-pins          gpio_pwrctrl3         	  pin_fun0            K         regulators     dcdc-reg1                     dp         ~          0        ,vdd_gpu_s0          ;     regulator-state-mem          W         dcdc-reg2            p                  dp         ~          0        ,vdd_npu_s0     regulator-state-mem          W         dcdc-reg3            p                  
L         q          0        ,vdd_log_s0     regulator-state-mem          W         q         dcdc-reg4            p                  dp         ~          0        ,vdd_vdenc_s0       regulator-state-mem          W         dcdc-reg5                     
L         ~          0        ;          ,vdd_gpu_mem_s0     regulator-state-mem          W         dcdc-reg6            p                  
L         ~          0        ,vdd_npu_mem_s0     regulator-state-mem          W         dcdc-reg7            p                                     0        ,vdd_2v0_pldo_s3         K      regulator-state-mem                            dcdc-reg8            p                  
L         ~          0        ,vdd_vdenc_mem_s0       regulator-state-mem          W         dcdc-reg9            p                 ,vdd2_ddr_s3    regulator-state-mem                   dcdc-reg10           p                                     0        ,vcc_1v1_nldo_s3         K      regulator-state-mem                            pldo-reg1            p                  w@         w@          0        ,avcc_1v8_s0    regulator-state-mem          W         pldo-reg2            p                  w@         w@          0        ,vdd1_1v8_ddr_s3    regulator-state-mem                   w@         pldo-reg3            p                  w@         w@          0        ,avcc_1v8_codec_s0      regulator-state-mem          W         pldo-reg4            p                  2Z         2Z          0        ,vcc_3v3_s3     regulator-state-mem                   2Z         pldo-reg5            p                  w@         2Z          0        ,vccio_sd_s0    regulator-state-mem          W         pldo-reg6            p                  w@         w@          0        ,vccio_1v8_s3       regulator-state-mem                   w@         nldo-reg1            p                  q         q          0        ,vdd_0v75_s3    regulator-state-mem                   q         nldo-reg2            p                                   ,vdd2l_0v9_ddr_s3       regulator-state-mem                            nldo-reg3            p                  q         q        ,vdd_0v75_hdmi_edp_s0       regulator-state-mem          W         nldo-reg4            p                  q         q        ,avdd_0v75_s0       regulator-state-mem          W         nldo-reg5            p                  P         P        ,vdd_0v85_s0    regulator-state-mem          W               pmic@1            rockchip,rk806           M                                                         ]                 gdefault          B@                              &           2           >           J           V           b           n           z                                                             dvs1-null-pins          gpio_pwrctrl1         	  pin_fun0            K         dvs2-null-pins          gpio_pwrctrl2         	  pin_fun0            K         dvs3-null-pins          gpio_pwrctrl3         	  pin_fun0            K         regulators     dcdc-reg1            p                  dp                   0        ,vdd_cpu_big1_s0         K      regulator-state-mem          W         dcdc-reg2            p                  dp                   0        ,vdd_cpu_big0_s0         K      regulator-state-mem          W         dcdc-reg3            p                  dp         ~          0        ,vdd_cpu_lit_s0          K      regulator-state-mem          W         dcdc-reg4            p                  2Z         2Z          0        ,vcc_3v3_s0     regulator-state-mem          W         dcdc-reg5            p                  
L                   0        ,vdd_cpu_big1_mem_s0    regulator-state-mem          W         dcdc-reg6            p                  
L                   0        ,vdd_cpu_big0_mem_s0    regulator-state-mem          W         dcdc-reg7            p                  w@         w@          0        ,vcc_1v8_s0     regulator-state-mem          W         dcdc-reg8            p                  
L         ~          0        ,vdd_cpu_lit_mem_s0     regulator-state-mem          W         dcdc-reg9            p                 ,vddq_ddr_s0    regulator-state-mem          W         dcdc-reg10           p                  
L                   0        ,vdd_ddr_s0     regulator-state-mem          W         pldo-reg1            p                  w@         w@          0        ,vcc_1v8_cam_s0     regulator-state-mem          W         pldo-reg2            p                  w@         w@          0        ,avdd1v8_ddr_pll_s0     regulator-state-mem          W         pldo-reg3            p                  w@         w@          0        ,vdd_1v8_pll_s0     regulator-state-mem          W         pldo-reg4            p                  2Z         2Z          0        ,vcc_3v3_sd_s0      regulator-state-mem          W         pldo-reg5            p                  *         *          0        ,vcc_2v8_cam_s0     regulator-state-mem          W         pldo-reg6            p                  w@         w@      	  ,pldo6_s3       regulator-state-mem                   w@         nldo-reg1            p                  q         q          0        ,vdd_0v75_pll_s0    regulator-state-mem          W         nldo-reg2            p                  P         P        ,vdd_ddr_pll_s0     regulator-state-mem          W         nldo-reg3            p                  P         P          0        ,avdd_0v85_s0       regulator-state-mem          W         nldo-reg4            p                  O         O          0        ,avdd_1v2_cam_s0    regulator-state-mem          W         nldo-reg5            p                  O         O          0        ,avdd_1v2_s0    regulator-state-mem          W                  spi@feb30000          (    rockchip,rk3588-spi rockchip,rk3066-spi          M                           I                r                    Qspiclk apb_pclk         |   w      w           tx rx                      ]                 gdefault                      +          	  udisabled          serial@feb40000       &    rockchip,rk3588-uart snps,dw-apb-uart            M                           L                r                    Qbaudclk apb_pclk            |            	        tx rx           ]           gdefault                             	  udisabled          serial@feb50000       &    rockchip,rk3588-uart snps,dw-apb-uart            M                           M                r                    Qbaudclk apb_pclk            |      
              tx rx           ]           gdefault                               uokay          serial@feb60000       &    rockchip,rk3588-uart snps,dw-apb-uart            M                           N                r                    Qbaudclk apb_pclk            |                    tx rx           ]           gdefault                             	  udisabled          serial@feb70000       &    rockchip,rk3588-uart snps,dw-apb-uart            M                           O                r                    Qbaudclk apb_pclk            |   w   	   w   
        tx rx           ]           gdefault                             	  udisabled          serial@feb80000       &    rockchip,rk3588-uart snps,dw-apb-uart            M                           P                r                    Qbaudclk apb_pclk            |   w      w           tx rx           ]           gdefault                             	  udisabled          serial@feb90000       &    rockchip,rk3588-uart snps,dw-apb-uart            M                           Q                r                    Qbaudclk apb_pclk            |   w      w           tx rx           ]           gdefault                             	  udisabled          serial@feba0000       &    rockchip,rk3588-uart snps,dw-apb-uart            M                           R                r                    Qbaudclk apb_pclk            |   S      S           tx rx           ]           gdefault                             	  udisabled          serial@febb0000       &    rockchip,rk3588-uart snps,dw-apb-uart            M                           S                r                    Qbaudclk apb_pclk            |   S   	   S   
        tx rx           ]           gdefault                             	  udisabled          serial@febc0000       &    rockchip,rk3588-uart snps,dw-apb-uart            M                           T                r                    Qbaudclk apb_pclk            |   S      S           tx rx           ]           gdefault                             	  udisabled          pwm@febd0000          (    rockchip,rk3588-pwm rockchip,rk3328-pwm          M                      r      L      K      	  Qpwm pclk            ]           gdefault                  	  udisabled          pwm@febd0010          (    rockchip,rk3588-pwm rockchip,rk3328-pwm          M                     r      L      K      	  Qpwm pclk            ]           gdefault                  	  udisabled          pwm@febd0020          (    rockchip,rk3588-pwm rockchip,rk3328-pwm          M                      r      L      K      	  Qpwm pclk            ]           gdefault                  	  udisabled          pwm@febd0030          (    rockchip,rk3588-pwm rockchip,rk3328-pwm          M     0                r      L      K      	  Qpwm pclk            ]           gdefault                  	  udisabled          pwm@febe0000          (    rockchip,rk3588-pwm rockchip,rk3328-pwm          M                      r      O      N      	  Qpwm pclk            ]           gdefault                  	  udisabled          pwm@febe0010          (    rockchip,rk3588-pwm rockchip,rk3328-pwm          M                     r      O      N      	  Qpwm pclk            ]           gdefault                  	  udisabled          pwm@febe0020          (    rockchip,rk3588-pwm rockchip,rk3328-pwm          M                      r      O      N      	  Qpwm pclk            ]           gdefault                  	  udisabled          pwm@febe0030          (    rockchip,rk3588-pwm rockchip,rk3328-pwm          M     0                r      O      N      	  Qpwm pclk            ]           gdefault                  	  udisabled          pwm@febf0000          (    rockchip,rk3588-pwm rockchip,rk3328-pwm          M                      r      R      Q      	  Qpwm pclk            ]           gdefault                  	  udisabled          pwm@febf0010          (    rockchip,rk3588-pwm rockchip,rk3328-pwm          M                     r      R      Q      	  Qpwm pclk            ]           gdefault                  	  udisabled          pwm@febf0020          (    rockchip,rk3588-pwm rockchip,rk3328-pwm          M                      r      R      Q      	  Qpwm pclk            ]           gdefault                  	  udisabled          pwm@febf0030          (    rockchip,rk3588-pwm rockchip,rk3328-pwm          M     0                r      R      Q      	  Qpwm pclk            ]           gdefault                  	  udisabled          tsadc@fec00000            rockchip,rk3588-tsadc            M                                           r                    Qtsadc apb_pclk           y                              V      W        tsadc-apb tsadc                                          ]                      ggpio otpout                  	  udisabled          adc@fec10000              rockchip,rk3588-saradc           M                                          !            r                    Qsaradc apb_pclk               U        saradc-apb        	  udisabled          i2c@fec80000          (    rockchip,rk3588-i2c rockchip,rk3399-i2c          M                      r                  	  Qi2c pclk                  C               ]           gdefault                      +          	  udisabled          i2c@fec90000          (    rockchip,rk3588-i2c rockchip,rk3399-i2c          M                      r                  	  Qi2c pclk                  D               ]           gdefault                      +          	  udisabled          i2c@feca0000          (    rockchip,rk3588-i2c rockchip,rk3399-i2c          M                      r                  	  Qi2c pclk                  E               ]           gdefault                      +          	  udisabled          spi@fecb0000          (    rockchip,rk3588-spi rockchip,rk3066-spi          M                           J                r                    Qspiclk apb_pclk         |   S      S           tx rx                      ]                 gdefault                      +          	  udisabled          efuse@fecc0000            rockchip,rk3588-otp          M                       r                                Qotp apb_pclk phy arb                                      otp apb arb                      +      cpu-code@2           M            id@7             M            cpu-leakage@17           M            cpu-leakage@18           M            cpu-leakage@19           M            log-leakage@1a           M            gpu-leakage@1b           M            cpu-version@1c           M              3            npu-leakage@28           M   (         codec-leakage@29             M   )            dma-controller@fed10000           arm,pl330 arm,primecell          M            @                 Z              [                         r      p      	  Qapb_pclk                       K   S      sram@ff001000         
    mmio-sram            M                    =                                 +         pinctrl           rockchip,rk3588-pinctrl          =        D                        +           K      gpio@fd8a0000             rockchip,gpio-bank           M                                           r     q     r                 8                        K                              K         gpio@fec20000             rockchip,gpio-bank           M                                           r      s      t                 8                        K                            gpio@fec30000             rockchip,gpio-bank           M                                           r      u      v                 8          @             K                            gpio@fec40000             rockchip,gpio-bank           M                                           r      w      x                 8          `             K                            gpio@fec50000             rockchip,gpio-bank           M                                           r      y      z                 8                       K                              K         pcfg-pull-up             D        K         pcfg-pull-none           Q        K         pcfg-pull-none-drv-level-2           Q        ^           K         pcfg-pull-up-drv-level-1             D        ^           K         pcfg-pull-up-drv-level-2             D        ^           K         pcfg-pull-none-smt           Q         m        K         auddsm        bt1120        can0          can1          can2          cif       clk32k        cpu       ddrphych0         ddrphych1         ddrphych2         ddrphych3         dp0       dp1       emmc       emmc-rstnout                                K   ^      emmc-bus8                                                                                                                   K   _      emmc-clk                                K   `      emmc-cmd                                 K   a      emmc-data-strobe                                K   b         eth1          fspi          gmac1         gpu       hdmi          i2c0       i2c0m0-xfer                                            K            i2c1       i2c1m0-xfer                    	             	           K            i2c2       i2c2m0-xfer                    	             	           K            i2c3       i2c3m0-xfer                   	            	           K            i2c4       i2c4m0-xfer                   	            	           K            i2c5       i2c5m0-xfer                   	            	           K            i2c6       i2c6m0-xfer                    	             	           K            i2c7       i2c7m0-xfer                   	            	           K            i2c8       i2c8m0-xfer                   	            	           K            i2s0       i2s0-lrck                               K   c      i2s0-sclk                               K   d      i2s0-sdi0                               K   e      i2s0-sdi1                               K   f      i2s0-sdi2                               K   g      i2s0-sdi3                               K   h      i2s0-sdo0                               K   i      i2s0-sdo1                               K   j      i2s0-sdo2                               K   k      i2s0-sdo3                               K   l         i2s1       i2s1m0-lrck                             K   m      i2s1m0-sclk                             K   n      i2s1m0-sdi0                             K   o      i2s1m0-sdi1                             K   p      i2s1m0-sdi2                             K   q      i2s1m0-sdi3                             K   r      i2s1m0-sdo0               	              K   s      i2s1m0-sdo1               
              K   t      i2s1m0-sdo2                             K   u      i2s1m0-sdo3                             K   v         i2s2       i2s2m1-lrck                             K   x      i2s2m1-sclk                             K   y      i2s2m1-sdi                
              K   z      i2s2m1-sdo                              K   {         i2s3       i2s3-lrck                               K   |      i2s3-sclk                               K   }      i2s3-sdi                                K   ~      i2s3-sdo                                K            jtag          litcpu        mcu       mipi          npu       pcie20x1          pcie30phy         pcie30x1          pcie30x2          pcie30x4          pdm0          pdm1          pmic       pmic-pins         p                                                                                                      K            pmu       pwm0       pwm0m0-pins                              K             pwm1       pwm1m0-pins                              K   !         pwm2       pwm2m0-pins                              K   "         pwm3       pwm3m0-pins                              K   #         pwm4       pwm4m0-pins                              K            pwm5       pwm5m0-pins                	              K            pwm6       pwm6m0-pins                              K            pwm7       pwm7m0-pins                              K            pwm8       pwm8m0-pins                             K            pwm9       pwm9m0-pins                             K            pwm10      pwm10m0-pins                                 K            pwm11      pwm11m0-pins                                K            pwm12      pwm12m0-pins                                K            pwm13      pwm13m0-pins                                K            pwm14      pwm14m0-pins                                K            pwm15      pwm15m0-pins                                K            refclk        sata          sata0         sata1         sata2         sdio       sdiom1-pins       `                                                                                   K   ]         sdmmc      sdmmc-bus4        @                                                          K   \      sdmmc-clk                               K   Y      sdmmc-cmd                               K   Z      sdmmc-det                                K   [         spdif0        spdif1        spi0       spi0m0-pins       0                                                 K         spi0m0-cs0                               K         spi0m0-cs1                               K            spi1       spi1m1-pins       0                                              K         spi1m1-cs0                              K         spi1m1-cs1                              K            spi2       spi2m2-pins       0                                                 K         spi2m2-cs0                 	              K         spi2m2-cs1                               K            spi3       spi3m1-pins       0                                              K         spi3m1-cs0                              K         spi3m1-cs1                              K            spi4       spi4m0-pins       0                                              K         spi4m0-cs0                              K         spi4m0-cs1                              K            tsadc      tsadc-shut                               K            uart0      uart0m1-xfer                                 	              K            uart1      uart1m1-xfer                      
            
           K            uart2      uart2m0-xfer                       
             
           K            uart3      uart3m1-xfer                      
            
           K            uart4      uart4m1-xfer                      
            
           K            uart5      uart5m1-xfer                      
            
           K            uart6      uart6m1-xfer                       
            
           K            uart7      uart7m1-xfer                      
            
           K            uart8      uart8m1-xfer                      
            
           K            uart9      uart9m1-xfer                      
            
           K            vop       bt656         gpio-func      tsadc-gpio-func                               K            eth0          gmac0      gmac0-miim                                           K         gmac0-rx-bus2         0                                              K         gmac0-tx-bus2         0                                              K         gmac0-rgmii-clk                                          K         gmac0-rgmii-bus       @                                	            
              K            rtl8211f       rtl8211f-rst                                 K            hym8563    hym8563-int                               K               i2s@fddc8000              rockchip,rk3588-i2s-tdm          M    ܀                                       r                       Qmclk_tx mclk_rx hclk             y                           |   S           tx             T                        tx-m                       	  udisabled          i2s@fddf4000              rockchip,rk3588-i2s-tdm          M    @                                       r     9     9     ?        Qmclk_tx mclk_rx hclk             y     6                      |   S           tx             T                        tx-m                       	  udisabled          i2s@fddf8000              rockchip,rk3588-i2s-tdm          M    ߀                                       r     +     +     '        Qmclk_tx mclk_rx hclk             y     (                      |   S           rx             T                        rx-m                       	  udisabled          i2s@fde00000              rockchip,rk3588-i2s-tdm          M                                            r     &     &     "        Qmclk_tx mclk_rx hclk             y     #                      |   S           rx             T                        rx-m                       	  udisabled          ethernet@fe1b0000         &    rockchip,rk3588-gmac snps,dwmac-4.20a            M                                                          -macirq eth_wake_irq       (   r     6     7     X     ]     4      0  Qstmmaceth clk_mac_ref pclk_mac aclk_mac ptp_ref            T   !             #      
  stmmaceth           D   U                   "            2        C           V            i        uokay            output                     rgmii-rxid          ]                       gdefault                        C   mdio              snps,dwmac-mdio                      +       ethernet-phy@1            ethernet-phy-id001c.c916             M           gdefault         ]             N                                   K            stmmac-axi-config           r                                 |                      K         rx-queues-config                       K      queue0        queue1           tx-queues-config                       K      queue0        queue1              aliases         /mmc@fe2e0000           /serial@feb50000          chosen          serial2:1500000n8         backlight             pwm-backlight           
                    a          vcc12v-dcin-regulator             regulator-fixed         ,vcc12v_dcin          p                                     K         vcc5v0-sys-regulator              regulator-fixed         ,vcc5v0_sys           p                  LK@         LK@                   K            	compatible interrupt-parent #address-cells #size-cells model cpu device_type reg enable-method capacity-dmips-mhz clocks assigned-clocks assigned-clock-rates cpu-idle-states i-cache-size i-cache-line-size i-cache-sets d-cache-size d-cache-line-size d-cache-sets next-level-cache dynamic-power-coefficient #cooling-cells cpu-supply phandle entry-method local-timer-stop arm,psci-suspend-param entry-latency-us exit-latency-us min-residency-us cache-level cache-unified arm,smc-id shmem #clock-cells #reset-cells interrupts clock-frequency clock-output-names interrupt-names ranges rockchip,grf clock-names pinctrl-0 pinctrl-names status dmas dma-names reg-shift reg-io-width #pwm-cells #power-domain-cells pm_qos assigned-clock-parents power-domains resets reset-names #sound-dai-cells rockchip,php-grf snps,axi-config snps,mixed-burst snps,mtl-rx-config snps,mtl-tx-config snps,tso snps,blen snps,wr_osr_lmt snps,rd_osr_lmt snps,rx-queues-to-use snps,tx-queues-to-use fifo-depth max-frequency bus-width no-sdio no-sd non-removable mmc-hs400-1_8v mmc-hs400-enhanced-strobe rockchip,trcm-sync-tx-only interrupt-controller mbi-alias mbi-ranges msi-controller #interrupt-cells #msi-cells affinity arm,pl330-periph-burst #dma-cells wakeup-source num-cs #gpio-cells gpio-controller spi-max-frequency vcc1-supply vcc2-supply vcc3-supply vcc4-supply vcc5-supply vcc6-supply vcc7-supply vcc8-supply vcc9-supply vcc10-supply vcc11-supply vcc12-supply vcc13-supply vcc14-supply vcca-supply pins function regulator-boot-on regulator-min-microvolt regulator-max-microvolt regulator-ramp-delay regulator-name regulator-enable-ramp-delay regulator-off-in-suspend regulator-always-on regulator-suspend-microvolt regulator-on-in-suspend rockchip,hw-tshut-temp rockchip,hw-tshut-mode rockchip,hw-tshut-polarity pinctrl-1 #thermal-sensor-cells #io-channel-cells bits gpio-ranges bias-pull-up bias-disable drive-strength input-schmitt-enable rockchip,pins clock_in_out phy-handle phy-mode rx_delay tx_delay reset-assert-us reset-deassert-us reset-gpios mmc0 serial2 stdout-path power-supply pwms vin-supply 