  	   8  L   (                                                                                    ,radxa,rock3a rockchip,rk3568             7Radxa ROCK3 Model A    aliases          =/pinctrl/gpio@fdd60000           C/pinctrl/gpio@fe740000           I/pinctrl/gpio@fe750000           O/pinctrl/gpio@fe760000           U/pinctrl/gpio@fe770000           [/i2c@fdd40000            `/i2c@fe5a0000            e/i2c@fe5b0000            j/i2c@fe5c0000            o/i2c@fe5d0000            t/i2c@fe5e0000            y/serial@fdd50000             /serial@fe650000             /serial@fe660000             /serial@fe670000             /serial@fe680000             /serial@fe690000             /serial@fe6a0000             /serial@fe6b0000             /serial@fe6c0000             /serial@fe6d0000             /spi@fe610000            /spi@fe620000            /spi@fe630000            /spi@fe640000            /ethernet@fe010000           /mmc@fe310000            /mmc@fe2b0000         cpus                                 cpu@0            cpu          ,arm,cortex-a55                                                     psci            %           9           D   	      cpu@100          cpu          ,arm,cortex-a55                                     psci            %           9           D   
      cpu@200          cpu          ,arm,cortex-a55                                     psci            %           9           D         cpu@300          cpu          ,arm,cortex-a55                                     psci            %           9           D            opp-table-0          ,operating-points-v2          L        D      opp-408000000           W    Q         ^   0        l  @      opp-600000000           W    #F         ^   0      opp-816000000           W    0,         ^   0         }      opp-1104000000          W    Aʹ         ^   0      opp-1416000000          W    Tfr         ^   0      opp-1608000000          W    _"         ^   0      opp-1800000000          W    kI         ^   0      opp-1992000000          W    v         ^ 0 0 0         display-subsystem            ,rockchip,display-subsystem                   firmware       scmi             ,arm,scmi-smc                                                      protocol@14                                D               opp-table-1          ,operating-points-v2         D   F   opp-200000000           W             ^       opp-300000000           W             ^       opp-400000000           W    ׄ         ^       opp-600000000           W    #F         ^       opp-700000000           W    )'         ^       opp-800000000           W    /         ^ B@         hdmi-sound           ,simple-audio-card           HDMI            i2s                    okay       simple-audio-card,codec                  simple-audio-card,cpu                       pmu          ,arm,cortex-a55-pmu        0                                                     	   
            psci             ,arm,psci-1.0            smc       timer            ,arm,armv8-timer       0                                   
            &      xin24m           ,fixed-clock         =n6         Mxin24m                      D         xin32k           ,fixed-clock         =           Mxin32k          `           jdefault                   sram@10f000       
   ,mmio-sram                                                          x                sram@0           ,arm,scmi-shmem                          D            sata@fc400000         '   ,rockchip,rk3568-dwc-ahci snps,dwc-ahci               @                                           sata pmalive rxoob                 _                       	  sata-phy                                   	  disabled          sata@fc800000         '   ,rockchip,rk3568-dwc-ahci snps,dwc-ahci                                                          sata pmalive rxoob                 `                       	  sata-phy                                   	  disabled          usb@fcc00000             ,rockchip,rk3568-dwc3 snps,dwc3                      @                                                      ref_clk suspend_clk bus_clk         otg       
  utmi_wide                                                okay                             usb2-phy usb3-phy                    usb@fd000000             ,rockchip,rk3568-dwc3 snps,dwc3                       @                                                      ref_clk suspend_clk bus_clk         host                             usb2-phy usb3-phy         
  utmi_wide                                                okay          interrupt-controller@fd400000            ,arm,gic-v3                @             F                       	                                   A          "  (            -        D         usb@fd800000             ,generic-ehci                                                                                         usb         okay          usb@fd840000             ,generic-ohci                                                                                         usb         okay          usb@fd880000             ,generic-ehci                                                                                         usb         okay          usb@fd8c0000             ,generic-ohci                                                                                         usb         okay          syscon@fdc20000       )   ,rockchip,rk3568-pmugrf syscon simple-mfd                                  D      io-domains        &   ,rockchip,rk3568-pmu-io-voltage-domain           okay            <           J           X           f           t                                                        syscon@fdc50000                                 ,rockchip,rk3568-pipe-grf syscon         D         syscon@fdc60000       &   ,rockchip,rk3568-grf syscon simple-mfd                                 D         syscon@fdc80000       $   ,rockchip,rk3568-pipe-phy-grf syscon                               D         syscon@fdc90000       $   ,rockchip,rk3568-pipe-phy-grf syscon                               D         syscon@fdca0000       #   ,rockchip,rk3568-usb2phy-grf syscon                                D         syscon@fdca8000       #   ,rockchip,rk3568-usb2phy-grf syscon               ʀ                D         clock-controller@fdd00000            ,rockchip,rk3568-pmucru                                                      D         clock-controller@fdd20000            ,rockchip,rk3568-cru                                          xin24m                                                             G                                   D         i2c@fdd40000          (   ,rockchip,rk3568-i2c rockchip,rk3399-i2c                                      .                       -      	  i2c pclk            `            jdefault                                   okay       regulator@1c             ,tcs,tcs4525                                -vdd_cpu          <         P        b 5         z 0                     !        D      regulator-state-mem                   pmic@20          ,rockchip,rk809                            "                            H                                mclk                  H        jdefault         `   #   $                                %        	   %           %        !   %        -   %        9   %        E   %        Q   %        ]   %         i        D      regulators     DCDC_REG1         
  -vdd_logic            <         P        w           b          z p          q   regulator-state-mem                   DCDC_REG2           -vdd_gpu          <        w           b          z p          q        D   G   regulator-state-mem                   DCDC_REG3           -vcc_ddr          <         P        w      regulator-state-mem                   DCDC_REG4           -vdd_npu         w           b          z p          q   regulator-state-mem                   DCDC_REG5           -vcc_1v8          <         P        b w@        z w@        D      regulator-state-mem                   LDO_REG1            -vdda0v9_image           b         z         D   b   regulator-state-mem                   LDO_REG2          	  -vdda_0v9             <         P        b         z    regulator-state-mem                   LDO_REG3            -vdda0v9_pmu          <         P        b         z    regulator-state-mem                            LDO_REG4            -vccio_acodec             <        b 2Z        z 2Z        D      regulator-state-mem                   LDO_REG5          	  -vccio_sd            b w@        z 2Z        D      regulator-state-mem                   LDO_REG6            -vcc3v3_pmu           <         P        b 2Z        z 2Z        D      regulator-state-mem                   2Z         LDO_REG7          	  -vcca_1v8             <         P        b w@        z w@        D      regulator-state-mem                   LDO_REG8            -vcca1v8_pmu          <         P        b w@        z w@   regulator-state-mem                   w@         LDO_REG9            -vcca1v8_image           b w@        z w@        D   c   regulator-state-mem                   SWITCH_REG1         -vcc_3v3          <         P        D      regulator-state-mem                   SWITCH_REG2       
  -vcc3v3_sd           D   m   regulator-state-mem                      codec                        serial@fdd50000       &   ,rockchip,rk3568-uart snps,dw-apb-uart                                        t                       ,        baudclk apb_pclk               &       &           `   '        jdefault                             	  disabled          pwm@fdd70000          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm                                           0      	  pwm pclk            `   (        jdefault                  	  disabled          pwm@fdd70010          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm                                          0      	  pwm pclk            `   )        jdefault                  	  disabled          pwm@fdd70020          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm                                           0      	  pwm pclk            `   *        jdefault                  	  disabled          pwm@fdd70030          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm               0                           0      	  pwm pclk            `   +        jdefault                  	  disabled          power-management@fdd90000         &   ,rockchip,rk3568-pmu syscon simple-mfd                            power-controller          !   ,rockchip,rk3568-power-controller                                                 D      power-domain@7                                             ,                  power-domain@8                                             -   .   /                  power-domain@9              	                                     0   1   2                  power-domain@10             
                               3   4   5   6   7   8                  power-domain@11                                      9                  power-domain@13                                     :                  power-domain@14                                     ;   <   =                  power-domain@15                                       >   ?   @   A   B   C   D   E                        gpu@fde60000          &   ,rockchip,rk3568-mali arm,mali-bifrost                        @       $         (          )          '           job mmu gpu                             gpu bus                    %   F                      okay            (   G        D         video-codec@fdea0400             ,rockchip,rk3568-vpu                                                                   
  aclk hclk           4   H                    iommu@fdea0800           ,rockchip,rk3568-iommu                        @                          aclk iface                                            ;            D   H      rga@fdeb0000          (   ,rockchip,rk3568-rga rockchip,rk3288-rga                                     Z                                     aclk hclk sclk               &     $     %        Hcore axi ahb                  
      video-codec@fdee0000             ,rockchip,rk3568-vepu                                         @                             
  aclk hclk           4   I              
      iommu@fdee0800           ,rockchip,rk3568-iommu                        @               ?                               aclk iface                
        ;            D   I      mmc@fe000000          0   ,rockchip,rk3568-dw-mshc rockchip,rk3288-dw-mshc                       @                d                                          biu ciu ciu-drive ciu-sample            T           _р                      Hreset           okay            m            w                                      J                 jdefault         `   K   L   M                    %                 ethernet@fe010000         &   ,rockchip,rk3568-gmac snps,dwmac-4.20a                                                              macirq eth_wake_irq       @                                                    W  stmmaceth mac_clk_rx mac_clk_tx clk_mac_refout aclk_mac pclk_mac clk_mac_speed ptp_ref                      
  Hstmmaceth                         N                    O        *   P         =        okay                                      Q        Finput           S   R      	  ^rgmii-id            g           jdefault         `   S   T   U   V   W   X   mdio             ,snps,dwmac-mdio                              ethernet-phy@0           ,ethernet-phy-ieee802.3-c22                       jdefault         `   Y        r  N                     Z              D   R         stmmac-axi-config                                                                  D   N      rx-queues-config                       D   O   queue0           tx-queues-config                       D   P   queue0              vop@fe040000                          0     @                vop gamma-lut                           (                                      %  aclk hclk dclk_vp0 dclk_vp1 dclk_vp2            4   [              	                   okay             ,rockchip,rk3568-vop                                            ports                                     D      port@0                                            endpoint@2                          \        D   d         port@1                                              port@2                                                    iommu@fe043e00           ,rockchip,rk3568-iommu                 >            ?                                                      aclk iface          ;            okay            D   [      dsi@fe060000          *   ,rockchip,rk3568-mipi-dsi snps,dw-mipi-dsi                                        D           pclk                          dphy               ]              	        Hapb                               	  disabled       ports                                port@0                     port@1                          dsi@fe070000          *   ,rockchip,rk3568-mipi-dsi snps,dw-mipi-dsi                                        E           pclk                          dphy               ^              	        Hapb                               	  disabled       ports                                port@0                     port@1                          hdmi@fe0a0000            ,rockchip,rk3568-dw-hdmi              
                        -         (                         (              iahb isfr cec ref           jdefault         `   _   `   a              	                                          okay               b            c        D      ports                                port@0                  endpoint                d        D   \         port@1                 endpoint                e        D                  qos@fe128000             ,rockchip,rk3568-qos syscon                                D   ,      qos@fe138080             ,rockchip,rk3568-qos syscon                               D   ;      qos@fe138100             ,rockchip,rk3568-qos syscon                                D   <      qos@fe138180             ,rockchip,rk3568-qos syscon                               D   =      qos@fe148000             ,rockchip,rk3568-qos syscon                                D   -      qos@fe148080             ,rockchip,rk3568-qos syscon                               D   .      qos@fe148100             ,rockchip,rk3568-qos syscon                                D   /      qos@fe150000             ,rockchip,rk3568-qos syscon                                 D   9      qos@fe158000             ,rockchip,rk3568-qos syscon                                D   3      qos@fe158100             ,rockchip,rk3568-qos syscon                                D   4      qos@fe158180             ,rockchip,rk3568-qos syscon                               D   5      qos@fe158200             ,rockchip,rk3568-qos syscon                                D   6      qos@fe158280             ,rockchip,rk3568-qos syscon                               D   7      qos@fe158300             ,rockchip,rk3568-qos syscon                                D   8      qos@fe180000             ,rockchip,rk3568-qos syscon                               qos@fe190000             ,rockchip,rk3568-qos syscon                                 D   >      qos@fe190280             ,rockchip,rk3568-qos syscon                               D   B      qos@fe190300             ,rockchip,rk3568-qos syscon                                D   C      qos@fe190380             ,rockchip,rk3568-qos syscon                               D   D      qos@fe190400             ,rockchip,rk3568-qos syscon                                D   E      qos@fe198000             ,rockchip,rk3568-qos syscon                                D   :      qos@fe1a8000             ,rockchip,rk3568-qos syscon                                D   0      qos@fe1a8080             ,rockchip,rk3568-qos syscon                               D   1      qos@fe1a8100             ,rockchip,rk3568-qos syscon                                D   2      pcie@fe260000            ,rockchip,rk3568-pcie          0              @      &                               dbi apb config        <         K          J          I          H          G           sys pmc msi legacy err          0             (                                      $  aclk_mst aclk_slv aclk_dbi pclk aux          pci                    :                     `  M                  f                      f                     f                     f           [            l           {                                                                   	  pcie-phy                        T  x                                                    @              @                         Hpipe                                     okay            jdefault         `   g           Z                  h   legacy-interrupt-controller                                                              H           D   f         mmc@fe2b0000          0   ,rockchip,rk3568-dw-mshc rockchip,rk3288-dw-mshc              +        @                b                                          biu ciu ciu-drive ciu-sample            T           _р                      Hreset           okay            m                       "               w        jdefault         `   i   j   k   l                    m                 mmc@fe2c0000          0   ,rockchip,rk3568-dw-mshc rockchip,rk3288-dw-mshc              ,        @                c                                          biu ciu ciu-drive ciu-sample            T           _р                      Hreset         	  disabled          spi@fe300000             ,rockchip,sfc                 0        @                e                 x      v        clk_sfc hclk_sfc            `   n        jdefault       	  disabled          mmc@fe310000             ,rockchip,rk3568-dwcmshc              1                                         {      }         n6       (        |      z      y      {      }        core bus axi block timer            okay            m           _                  jdefault         `   o   p   q   r                            i2s@fe400000             ,rockchip,rk3568-i2s-tdm              @                        4                 =      A        Fq Fq               ?      C      9        mclk_tx mclk_rx hclk               s            tx                P      Q      
  Htx-m rx-m                                  okay            D         i2s@fe410000             ,rockchip,rk3568-i2s-tdm              A                        5                 E      I        Fq Fq               G      K      :        mclk_tx mclk_rx hclk               s      s           rx tx                 R      S      
  Htx-m rx-m                      jdefault         `   t   u   v   w                    okay                     D         i2s@fe420000             ,rockchip,rk3568-i2s-tdm              B                        6                 M        Fq               O      O      ;        mclk_tx mclk_rx hclk               s      s           tx rx                 T        Hm                      jdefault         `   x   y   z   {                    okay                   i2s@fe430000             ,rockchip,rk3568-i2s-tdm              C                        7                 S      W      <        mclk_tx mclk_rx hclk               s      s           tx rx                 U      V      
  Htx-m rx-m                                	  disabled          pdm@fe440000             ,rockchip,rk3568-pdm              D                        L                 Z      Y        pdm_clk pdm_hclk               s   	        rx          `   |   }   ~                 jdefault               X        Hpdm-m                     	  disabled          spdif@fe460000           ,rockchip,rk3568-spdif                F                        f         
  mclk hclk                 _      \           s           tx          jdefault         `                     	  disabled          dma-controller@fe530000          ,arm,pl330 arm,primecell              S        @                                                         	  apb_pclk            	           D   &      dma-controller@fe550000          ,arm,pl330 arm,primecell              U        @                                                         	  apb_pclk            	           D   s      i2c@fe5a0000          (   ,rockchip,rk3568-i2c rockchip,rk3399-i2c              Z                        /                H     G      	  i2c pclk            `           jdefault                                 	  disabled          i2c@fe5b0000          (   ,rockchip,rk3568-i2c rockchip,rk3399-i2c              [                        0                J     I      	  i2c pclk            `           jdefault                                 	  disabled          i2c@fe5c0000          (   ,rockchip,rk3568-i2c rockchip,rk3399-i2c              \                        1                L     K      	  i2c pclk            `           jdefault                                 	  disabled          i2c@fe5d0000          (   ,rockchip,rk3568-i2c rockchip,rk3399-i2c              ]                        2                N     M      	  i2c pclk            `           jdefault                                 	  disabled          i2c@fe5e0000          (   ,rockchip,rk3568-i2c rockchip,rk3399-i2c              ^                        3                P     O      	  i2c pclk            `           jdefault                                   okay       rtc@51           ,haoyu,hym8563               Q             "                                  Mrtcic_32kout            jdefault         `            i         watchdog@fe600000             ,rockchip,rk3568-wdt snps,dw-wdt              `                                                   
  tclk pclk         spi@fe610000          (   ,rockchip,rk3568-spi rockchip,rk3066-spi              a                        g                R     Q        spiclk apb_pclk            &      &           tx rx           jdefault         `                                         	  disabled          spi@fe620000          (   ,rockchip,rk3568-spi rockchip,rk3066-spi              b                        h                T     S        spiclk apb_pclk            &      &           tx rx           jdefault         `                                         	  disabled          spi@fe630000          (   ,rockchip,rk3568-spi rockchip,rk3066-spi              c                        i                V     U        spiclk apb_pclk            &      &           tx rx           jdefault         `                                         	  disabled          spi@fe640000          (   ,rockchip,rk3568-spi rockchip,rk3066-spi              d                        j                X     W        spiclk apb_pclk            &      &           tx rx           jdefault         `                                         	  disabled          serial@fe650000       &   ,rockchip,rk3568-uart snps,dw-apb-uart                e                        u                             baudclk apb_pclk               &      &           `                 jdefault                               okay             	   bluetooth            ,brcm,bcm43438-bt                          lpo         	(                  	<                  	N      
            jdefault         `                 	]   %        	i            serial@fe660000       &   ,rockchip,rk3568-uart snps,dw-apb-uart                f                        v                #              baudclk apb_pclk               &      &           `           jdefault                               okay          serial@fe670000       &   ,rockchip,rk3568-uart snps,dw-apb-uart                g                        w                '     $        baudclk apb_pclk               &      &           `           jdefault                             	  disabled          serial@fe680000       &   ,rockchip,rk3568-uart snps,dw-apb-uart                h                        x                +     (        baudclk apb_pclk               &      &   	        `           jdefault                             	  disabled          serial@fe690000       &   ,rockchip,rk3568-uart snps,dw-apb-uart                i                        y                /     ,        baudclk apb_pclk               &   
   &           `           jdefault                             	  disabled          serial@fe6a0000       &   ,rockchip,rk3568-uart snps,dw-apb-uart                j                        z                3     0        baudclk apb_pclk               &      &           `           jdefault                             	  disabled          serial@fe6b0000       &   ,rockchip,rk3568-uart snps,dw-apb-uart                k                        {                7     4        baudclk apb_pclk               &      &           `           jdefault                             	  disabled          serial@fe6c0000       &   ,rockchip,rk3568-uart snps,dw-apb-uart                l                        |                ;     8        baudclk apb_pclk               &      &           `           jdefault                             	  disabled          serial@fe6d0000       &   ,rockchip,rk3568-uart snps,dw-apb-uart                m                        }                ?     <        baudclk apb_pclk               &      &           `           jdefault                             	  disabled          thermal-zones      cpu-thermal         	v   d        	          	          trips      cpu_alert0          	 p        	           passive         D         cpu_alert1          	 $        	           passive       cpu_crit            	 s        	        	   critical             cooling-maps       map0            	         0  	   	   
                  gpu-thermal         	v           	          	         trips      gpu-threshold           	 p        	           passive       gpu-target          	 $        	           passive         D         gpu-crit            	 s        	        	   critical             cooling-maps       map0            	           	                  tsadc@fe710000           ,rockchip,rk3568-tsadc                q                        s                             f@ 
`                          tsadc apb_pclk                                            	 s        jinit default sleep          `           	           	           
            okay            
           
-            D         saradc@fe720000       .   ,rockchip,rk3568-saradc rockchip,rk3399-saradc                r                        ]                             saradc apb_pclk                      Hsaradc-apb          
H           okay            
Z         pwm@fe6e0000          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm              n                      Z     Y      	  pwm pclk            `           jdefault                  	  disabled          pwm@fe6e0010          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm              n                     Z     Y      	  pwm pclk            `           jdefault                  	  disabled          pwm@fe6e0020          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm              n                      Z     Y      	  pwm pclk            `           jdefault                  	  disabled          pwm@fe6e0030          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm              n 0                    Z     Y      	  pwm pclk            `           jdefault                  	  disabled          pwm@fe6f0000          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm              o                      ]     \      	  pwm pclk            `           jdefault                  	  disabled          pwm@fe6f0010          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm              o                     ]     \      	  pwm pclk            `           jdefault                  	  disabled          pwm@fe6f0020          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm              o                      ]     \      	  pwm pclk            `           jdefault                  	  disabled          pwm@fe6f0030          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm              o 0                    ]     \      	  pwm pclk            `           jdefault                  	  disabled          pwm@fe700000          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm              p                      `     _      	  pwm pclk            `           jdefault                  	  disabled          pwm@fe700010          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm              p                     `     _      	  pwm pclk            `           jdefault                  	  disabled          pwm@fe700020          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm              p                      `     _      	  pwm pclk            `           jdefault                  	  disabled          pwm@fe700030          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm              p 0                    `     _      	  pwm pclk            `           jdefault                  	  disabled          phy@fe830000             ,rockchip,rk3568-naneng-combphy                                      "     }              ref apb pipe                  "                              
f           
x           
           okay            D         phy@fe840000             ,rockchip,rk3568-naneng-combphy                                      %     ~              ref apb pipe                  %                              
f           
x           
           okay            D         phy@fe870000             ,rockchip,rk3568-csi-dphy                                       y        pclk            
                         Hapb                  	  disabled          mipi-dphy@fe850000           ,rockchip,rk3568-dsi-dphy                                	  ref pclk                       z        
                  	        Hapb                    	  disabled            D   ]      mipi-dphy@fe860000           ,rockchip,rk3568-dsi-dphy                                	  ref pclk                       {        
                  	        Hapb                    	  disabled            D   ^      usb2phy@fe8a0000             ,rockchip,rk3568-usb2phy                                             phyclk          Mclk_usbphy0_480m                              
                       okay            D      host-port           
            okay            g           D         otg-port            
            okay            g           D            usb2phy@fe8b0000             ,rockchip,rk3568-usb2phy                                             phyclk          Mclk_usbphy1_480m                              
                       okay       host-port           
            okay            g           D         otg-port            
            okay            g           D            pinctrl          ,rockchip,rk3568-pinctrl                    
                                     x        D      gpio@fdd60000            ,rockchip,gpio-bank                                       !                 .               
        
                       
                               D   "      gpio@fe740000            ,rockchip,gpio-bank               t                        "                c     d         
        
                       
                               D         gpio@fe750000            ,rockchip,gpio-bank               u                        #                e     f         
        
          @            
                               D         gpio@fe760000            ,rockchip,gpio-bank               v                        $                g     h         
        
          `            
                               D   Z      gpio@fe770000            ,rockchip,gpio-bank               w                        %                i     j         
        
                      
                               D         pcfg-pull-up             
        D         pcfg-pull-down           
        D         pcfg-pull-none           
        D         pcfg-pull-none-drv-level-1           
                   D         pcfg-pull-none-drv-level-2           
                   D         pcfg-pull-none-drv-level-3           
                   D         pcfg-pull-up-drv-level-1             
                   D         pcfg-pull-up-drv-level-2             
                   D         pcfg-pull-none-smt           
                 D         acodec        audiopwm          bt656         bt1120        cam    vcc_cam_en          +      	               D            can0          can1          can2          cif       clk32k     clk32k-out0         +                     D            cpu       ebc       edpdp         emmc       emmc-bus8           +                                                                                                        D   o      emmc-clk            +                    D   p      emmc-cmd            +                    D   q      emmc-datastrobe         +                    D   r         eth0          eth1          flash         fspi       fspi-pins         `  +                                                                                D   n         gmac0         gmac1      gmac1m1-miim             +                                D   S      gmac1m1-clkinout            +                    D   W      gmac1m1-rx-bus2       0  +                              	              D   U      gmac1m1-tx-bus2       0  +                                            D   T      gmac1m1-rgmii-clk            +                                 D   V      gmac1m1-rgmii-bus         @  +                                                        D   X         gpu       hdmitx     hdmitxm1-cec            +                     D   a      hdmitx-scl          +                    D   _      hdmitx-sda          +                    D   `         i2c0       i2c0-xfer            +       	             
              D             i2c1       i2c1-xfer            +                                  D            i2c2       i2c2m0-xfer          +                                  D            i2c3       i2c3m1-xfer          +                                D            i2c4       i2c4m1-xfer          +      
            	              D            i2c5       i2c5m0-xfer          +                                D            i2s1       i2s1m0-lrcktx           +                    D   u      i2s1m0-mclk         +                    D   $      i2s1m0-sclktx           +                    D   t      i2s1m0-sdi0         +                    D   v      i2s1m0-sdo0         +                    D   w         i2s2       i2s2m0-lrcktx           +                    D   y      i2s2m0-sclktx           +                    D   x      i2s2m0-sdi          +                    D   z      i2s2m0-sdo          +                    D   {         i2s3          isp       jtag          lcdc          mcu       npu       pcie20        pcie30x1          pcie30x2       pcie30x2m1-pins       0  +                                            D            pdm    pdmm0-clk           +                    D   |      pdmm0-clk1          +                    D   }      pdmm0-sdi0          +                    D   ~      pdmm0-sdi1          +      
              D         pdmm0-sdi2          +      	              D         pdmm0-sdi3          +                    D            pmic       pmic_int            +                      D   #         pmu       pwm0       pwm0m0-pins         +                     D   (         pwm1       pwm1m0-pins         +                     D   )         pwm2       pwm2m0-pins         +                     D   *         pwm3       pwm3-pins           +                     D   +         pwm4       pwm4-pins           +                     D            pwm5       pwm5-pins           +                     D            pwm6       pwm6-pins           +                     D            pwm7       pwm7-pins           +                     D            pwm8       pwm8m0-pins         +      	              D            pwm9       pwm9m0-pins         +      
              D            pwm10      pwm10m0-pins            +                    D            pwm11      pwm11m0-pins            +                    D            pwm12      pwm12m0-pins            +                    D            pwm13      pwm13m0-pins            +                    D            pwm14      pwm14m0-pins            +                    D            pwm15      pwm15m0-pins            +                    D            refclk        sata          sata0         sata1         sata2         scr       sdmmc0     sdmmc0-bus4       @  +                                                         D   i      sdmmc0-clk          +                    D   j      sdmmc0-cmd          +                    D   k      sdmmc0-det          +                     D   l         sdmmc1        sdmmc2     sdmmc2m0-bus4         @  +                                                        D   K      sdmmc2m0-clk            +                    D   M      sdmmc2m0-cmd            +                    D   L         spdif      spdifm0-tx          +                    D            spi0       spi0m0-pins       0  +                                               D         spi0m0-cs0          +                     D         spi0m0-cs1          +                     D            spi1       spi1m0-pins       0  +                                            D         spi1m0-cs0          +                    D         spi1m0-cs1          +                    D            spi2       spi2m0-pins       0  +                                            D         spi2m0-cs0          +                    D         spi2m0-cs1          +                    D            spi3       spi3m0-pins       0  +                              
              D         spi3m0-cs0          +                    D         spi3m0-cs1          +                    D            tsadc      tsadc-shutorg           +                     D         tsadc-pin           +                      D            uart0      uart0-xfer           +                                  D   '         uart1      uart1m0-xfer             +                                D         uart1m0-ctsn            +                    D         uart1m0-rtsn            +                    D            uart2      uart2m0-xfer             +                                  D            uart3      uart3m0-xfer             +                                 D            uart4      uart4m0-xfer             +                                D            uart5      uart5m0-xfer             +                                D            uart6      uart6m0-xfer             +                                D            uart7      uart7m0-xfer             +                                D            uart8      uart8m0-xfer             +                                D            uart9      uart9m0-xfer             +                                D            vop       spi0-hs       spi1-hs       spi2-hs       spi3-hs       gmac-txd-level3       gmac-txc-level2       display    vcc_mipi_en         +                     D            ethernet       eth_phy_rst         +                     D   Y         hym8563    hym8563-int         +                      D            leds       led_user_en         +                      D            pcie       pcie-enable-h           +                      D         pcie-reset-h            +                     D   g         usb    vcc5v0_usb_host_en          +                      D         vcc5v0_usb_hub_en           +                      D         vcc5v0_usb_otg_en           +                      D            bt     bt-enable           +      
               D         bt-host-wake            +                     D         bt-wake         +                     D            sdio-pwrseq    wifi-enable         +                     D               sata@fc000000         '   ,rockchip,rk3568-dwc-ahci snps,dwc-ahci                                                           sata pmalive rxoob                 ^                       	  sata-phy                                   	  disabled          syscon@fdc70000       $   ,rockchip,rk3568-pipe-phy-grf syscon                               D         qos@fe190080             ,rockchip,rk3568-qos syscon                                D   ?      qos@fe190100             ,rockchip,rk3568-qos syscon                                D   @      qos@fe190200             ,rockchip,rk3568-qos syscon                                D   A      syscon@fdcb8000       %   ,rockchip,rk3568-pcie3-phy-grf syscon                 ˀ                D         phy@fe8c0000             ,rockchip,rk3568-pcie3-phy                                 
                  &      '     w        refclk_m refclk_n pclk                       Hphy         9           okay            g           D         pcie@fe270000            ,rockchip,rk3568-pcie                                     0             (                                      $  aclk_mst aclk_slv aclk_dbi pclk aux          pci       <                                                            sys pmc msg legacy err                     :                     `  M                                                                                             [           l           {                                                               	  pcie-phy                        0      @       @      '                             T  x                                                    @      @       @           dbi apb config                        Hpipe          	  disabled       legacy-interrupt-controller                                                                         D            pcie@fe280000            ,rockchip,rk3568-pcie                                     0             (                                      $  aclk_mst aclk_slv aclk_dbi pclk aux          pci       <                                                            sys pmc msg legacy err                     :                     `  M                                                                                             [           l           {                                                                	  pcie-phy                        0             @      (                             T  x                                                    @             @           dbi apb config                        Hpipe            okay            jdefault         `                                h   legacy-interrupt-controller                                                                         D            ethernet@fe2a0000         &   ,rockchip,rk3568-gmac snps,dwmac-4.20a                *                                             macirq eth_wake_irq       @                                                    W  stmmaceth mac_clk_rx mac_clk_tx clk_mac_refout aclk_mac pclk_mac clk_mac_speed ptp_ref                      
  Hstmmaceth                                                     *            =      	  disabled       mdio             ,snps,dwmac-mdio                                 stmmac-axi-config                                                                  D         rx-queues-config                       D      queue0           tx-queues-config                       D      queue0              phy@fe820000             ,rockchip,rk3568-naneng-combphy                                           |              ref apb pipe                                                
f           
x           
           okay            D         chosen          Jserial2:1500000n8         hdmi-con             ,hdmi-connector           a      port       endpoint                        D   e            external-gmac1-clock             ,fixed-clock         =sY@        Mgmac1_clkin                     D   Q      leds          
   ,gpio-leds      led-0              "             
  Vheartbeat           _         
  eheartbeat           jdefault         `            rk809-sound          ,simple-audio-card           i2s         Analog RK809                  simple-audio-card,cpu                    simple-audio-card,codec                     sdio-pwrseq          ,mmc-pwrseq-simple                       
  ext_clock           jdefault         `           {   d         LK@           Z              D   J      vcc12v-dcin-regulator            ,regulator-fixed         -vcc12v_dcin          <         P        D         pcie30-avdd0v9-regulator             ,regulator-fixed         -pcie30_avdd0v9           <         P        b         z            %      pcie30-avdd1v8-regulator             ,regulator-fixed         -pcie30_avdd1v8           <         P        b w@        z w@           %      vcc3v3-pi6c-03-regulator             ,regulator-fixed         -vcc3v3_pi6c_03           <         P        b 2Z        z 2Z           !        D         vcc3v3-pcie-regulator            ,regulator-fixed                     "               jdefault         `           -vcc3v3_pcie         b 2Z        z 2Z           !        D   h      vcc3v3-sys-regulator             ,regulator-fixed         -vcc3v3_sys           <         P        b 2Z        z 2Z                   D   %      vcc5v0-sys-regulator             ,regulator-fixed         -vcc5v0_sys           <         P        b LK@        z LK@                   D   !      vcc5v0-usb-regulator             ,regulator-fixed         -vcc5v0_usb           <         P        b LK@        z LK@                   D         vcc5v0-usb-host-regulator            ,regulator-fixed                     "               jdefault         `           -vcc5v0_usb_host         b LK@        z LK@                   D         vcc5v0-usb-hub-regulator             ,regulator-fixed                     "               jdefault         `           -vcc5v0_usb_hub           <                 vcc5v0-usb-otg-regulator             ,regulator-fixed                     "               jdefault         `           -vcc5v0_usb_otg          b LK@        z LK@                   D         vcc-cam-regulator            ,regulator-fixed                        	            jdefault         `           -vcc_cam         b 2Z        z 2Z           %   regulator-state-mem                   vcc-mipi-regulator           ,regulator-fixed                     Z               jdefault         `         	  -vcc_mipi            b 2Z        z 2Z           %   regulator-state-mem                      	interrupt-parent #address-cells #size-cells compatible model gpio0 gpio1 gpio2 gpio3 gpio4 i2c0 i2c1 i2c2 i2c3 i2c4 i2c5 serial0 serial1 serial2 serial3 serial4 serial5 serial6 serial7 serial8 serial9 spi0 spi1 spi2 spi3 ethernet0 mmc0 mmc1 device_type reg clocks #cooling-cells enable-method operating-points-v2 cpu-supply phandle opp-shared opp-hz opp-microvolt clock-latency-ns opp-suspend ports arm,smc-id shmem #clock-cells simple-audio-card,name simple-audio-card,format simple-audio-card,mclk-fs status sound-dai interrupts interrupt-affinity arm,no-tick-in-suspend clock-frequency clock-output-names pinctrl-0 pinctrl-names ranges clock-names phys phy-names ports-implemented power-domains dr_mode phy_type resets snps,dis_u2_susphy_quirk extcon interrupt-controller #interrupt-cells mbi-alias mbi-ranges msi-controller pmuio1-supply pmuio2-supply vccio1-supply vccio2-supply vccio3-supply vccio4-supply vccio5-supply vccio6-supply vccio7-supply #reset-cells assigned-clocks assigned-clock-rates assigned-clock-parents rockchip,grf fcs,suspend-voltage-selector regulator-name regulator-always-on regulator-boot-on regulator-min-microvolt regulator-max-microvolt regulator-ramp-delay vin-supply regulator-off-in-suspend rockchip,system-power-controller #sound-dai-cells vcc1-supply vcc2-supply vcc3-supply vcc4-supply vcc5-supply vcc6-supply vcc7-supply vcc8-supply vcc9-supply wakeup-source regulator-initial-mode regulator-on-in-suspend regulator-suspend-microvolt mic-in-differential dmas reg-io-width reg-shift #pwm-cells #power-domain-cells pm_qos interrupt-names mali-supply iommus #iommu-cells reset-names fifo-depth max-frequency bus-width disable-wp cap-sd-highspeed cap-sdio-irq keep-power-in-suspend mmc-pwrseq non-removable sd-uhs-sdr104 vmmc-supply vqmmc-supply snps,axi-config snps,mixed-burst snps,mtl-rx-config snps,mtl-tx-config snps,tso clock_in_out phy-handle phy-mode phy-supply reset-assert-us reset-deassert-us reset-gpios snps,blen snps,rd_osr_lmt snps,wr_osr_lmt snps,rx-queues-to-use snps,tx-queues-to-use reg-names remote-endpoint avdd-0v9-supply avdd-1v8-supply bus-range interrupt-map-mask interrupt-map linux,pci-domain num-ib-windows num-ob-windows max-link-speed msi-map num-lanes vpcie3v3-supply cd-gpios sd-uhs-sdr50 dma-names rockchip,trcm-sync-tx-only arm,pl330-periph-burst #dma-cells uart-has-rtscts device-wakeup-gpios host-wakeup-gpios shutdown-gpios vbat-supply vddio-supply polling-delay-passive polling-delay thermal-sensors temperature hysteresis trip cooling-device rockchip,hw-tshut-temp pinctrl-1 pinctrl-2 #thermal-sensor-cells rockchip,hw-tshut-mode rockchip,hw-tshut-polarity #io-channel-cells vref-supply rockchip,pipe-grf rockchip,pipe-phy-grf #phy-cells rockchip,usbgrf rockchip,pmu gpio-controller gpio-ranges #gpio-cells bias-pull-up bias-pull-down bias-disable drive-strength input-schmitt-enable rockchip,pins rockchip,phy-grf stdout-path function color linux,default-trigger post-power-on-delay-ms power-off-delay-us enable-active-high gpio 