     8  @   (            
                               &    firefly,roc-rk3328-pc rockchip,rk3328                                    +            7Firefly ROC-RK3328-PC      aliases          =/serial@ff110000             E/serial@ff120000             M/serial@ff130000             U/i2c@ff150000            Z/i2c@ff160000            _/i2c@ff170000            d/i2c@ff180000            i/ethernet@ff540000           s/ethernet@ff550000           }/mmc@ff500000            /mmc@ff520000         cpus                         +       cpu@0            cpu           arm,cortex-a53                                                                      x         psci                                    
              	      cpu@1            cpu           arm,cortex-a53                                                                     x         psci                                    
              
      cpu@2            cpu           arm,cortex-a53                                                                     x         psci                                    
                    cpu@3            cpu           arm,cortex-a53                                                                     x         psci                                    
                    idle-states         psci       cpu-sleep             arm,idle-state           *        ;           R   x        c           s                      l2-cache0             cache                                           opp-table-0           operating-points-v2                        opp-408000000               Q          ~          @               opp-600000000               #F          ~          @      opp-816000000               0,          B@          @      opp-1008000000              <                    @      opp-1200000000              G          (          @      opp-1296000000              M?d                     @         analog-sound              simple-audio-card           i2s                    Analog          %okay       simple-audio-card,cpu           ,         simple-audio-card,codec         ,            arm-pmu           arm,cortex-a53-pmu        0  6       d          e          f          g           A   	   
            display-subsystem             rockchip,display-subsystem          T         hdmi-sound            simple-audio-card           i2s                    HDMI            %okay       simple-audio-card,cpu           ,         simple-audio-card,codec         ,            psci              arm,psci-1.0 arm,psci-0.2            smc       timer             arm,armv8-timer       0  6                              
        xin24m            fixed-clock         Z            gn6         wxin24m             G      i2s@ff000000          (    rockchip,rk3328-i2s rockchip,rk3066-i2s                                6                         )     7        i2s_clk i2s_hclk                                tx rx                       %okay                     i2s@ff010000          (    rockchip,rk3328-i2s rockchip,rk3066-i2s                               6                         *     8        i2s_clk i2s_hclk                                tx rx                       %okay                     i2s@ff020000          (    rockchip,rk3328-i2s rockchip,rk3066-i2s                               6                         +     9        i2s_clk i2s_hclk                                 tx rx                     	  %disabled          spdif@ff030000            rockchip,rk3328-spdif                                 6                         .     :      
  mclk hclk                 
        tx          default                              	  %disabled          pdm@ff040000              rockchip,pdm                                         =     R        pdm_clk pdm_hclk                          rx          default sleep                                                       	  %disabled          syscon@ff100000       &    rockchip,rk3328-grf syscon simple-mfd                                    :   io-domains        "    rockchip,rk3328-io-voltage-domain           %okay                                                                              ,         gpio              rockchip,rk3328-grf-gpio             9        I              F      power-controller          !    rockchip,rk3328-power-controller            U                        +               =   power-domain@6                      U          power-domain@5                                   B      A      B        U          power-domain@8                                  F        U             reboot-mode           syscon-reboot-mode          i          pRB         |RB        RB	        RB         serial@ff110000       &    rockchip,rk3328-uart snps,dw-apb-uart                                 6       7                  &              baudclk apb_pclk                                tx rx           default                !   "                            	  %disabled          serial@ff120000       &    rockchip,rk3328-uart snps,dw-apb-uart                                 6       8                  '              baudclk apb_pclk                                tx rx           default            #   $   %                            	  %disabled          serial@ff130000       &    rockchip,rk3328-uart snps,dw-apb-uart                                 6       9                  (              baudclk apb_pclk                                tx rx           default            &                              %okay          i2c@ff150000          (    rockchip,rk3328-i2c rockchip,rk3399-i2c                               6       $                        +                   7            	  i2c pclk            default            '      	  %disabled          i2c@ff160000          (    rockchip,rk3328-i2c rockchip,rk3399-i2c                               6       %                        +                   8            	  i2c pclk            default            (        %okay       pmic@18           rockchip,rk805                          )        6              Z           wxin32k rk805-clkout2             9        I           default            *                             +           +           +           +                   (              j   regulators     DCDC_REG1         
  4vdd_logic           C 
4        [           s                    ;   regulator-state-mem                   B@         DCDC_REG2           4vdd_arm         C 
4        [           s                       regulator-state-mem                   ~         DCDC_REG3           4vcc_ddr          s            regulator-state-mem                   DCDC_REG4           4vcc_io          C 2Z        [ 2Z         s                       regulator-state-mem                   2Z         LDO_REG1            4vcc_18          C w@        [ w@         s                       regulator-state-mem                   w@         LDO_REG2            4vcc18_emmc          C w@        [ w@         s                       regulator-state-mem                   w@         LDO_REG3            4vdd_10          C B@        [ B@         s            regulator-state-mem                   B@                  i2c@ff170000          (    rockchip,rk3328-i2c rockchip,rk3399-i2c                               6       &                        +                   9            	  i2c pclk            default            ,      	  %disabled          i2c@ff180000          (    rockchip,rk3328-i2c rockchip,rk3399-i2c                               6       '                        +                   :            	  i2c pclk            default            -      	  %disabled          spi@ff190000          (    rockchip,rk3328-spi rockchip,rk3066-spi                               6       1                        +                                  spiclk apb_pclk                     	        tx rx           default            .   /   0   1      	  %disabled          watchdog@ff1a0000              rockchip,rk3328-wdt snps,dw-wdt                               6       (                        pwm@ff1b0000              rockchip,rk3328-pwm                                      <            	  pwm pclk            default            2                 	  %disabled          pwm@ff1b0010              rockchip,rk3328-pwm                                     <            	  pwm pclk            default            3                 	  %disabled          pwm@ff1b0020              rockchip,rk3328-pwm                                      <            	  pwm pclk            default            4                 	  %disabled          pwm@ff1b0030              rockchip,rk3328-pwm               0               6       2                  <            	  pwm pclk            default            5                 	  %disabled          dma-controller@ff1f0000           arm,pl330 arm,primecell                      @         6                                                   	  apb_pclk                                thermal-zones      soc-thermal                                        0   6       trips      trip-point0         @ p        L           passive       trip-point1         @ L        L           passive            7      soc-crit            @ s        L        	   critical             cooling-maps       map0            W   7      0  \   	   
              k                  tsadc@ff250000            rockchip,rk3328-tsadc                %                 6       :           x      $          P               $              tsadc apb_pclk          init default sleep             8           9           8              B      
  tsadc-apb              :                            %okay               6      efuse@ff260000            rockchip,rk3328-efuse                &         P                     +                  >        pclk_efuse                 id@7                         cpu-leakage@17                       logic-leakage@19                         cpu-version@1a                                          H         adc@ff280000          .    rockchip,rk3328-saradc rockchip,rk3399-saradc                (                 6       P                             %              saradc apb_pclk               V        saradc-apb          %okay                          k      gpu@ff300000          "    rockchip,rk3328-mali arm,mali-450                0               T  6       Z          W          ]          X          Y          [          \         "  +gp gpmmu pp pp0 ppmmu0 pp1 ppmmu1                              	  bus core                  f        ;   ;      iommu@ff330200            rockchip,iommu               3                6       `                                aclk iface          G          	  %disabled          iommu@ff340800            rockchip,iommu               4        @        6       b                       F        aclk iface          G          	  %disabled          video-codec@ff350000              rockchip,rk3328-vpu              5                 6       	           +vdpu                        F      
  aclk hclk           T   <        [   =         iommu@ff350800            rockchip,iommu               5        @        6                              F        aclk iface          G            [   =              <      video-codec@ff360000          *    rockchip,rk3328-vdec rockchip,rk3399-vdec                6                 6                               B      A      B        axi ahb cabac core          x            A      B        ׄ ׄ          T   >        [   =         iommu@ff360480            rockchip,iommu                6       @    6       @        6       J                       B        aclk iface          G            [   =              >      vop@ff370000              rockchip,rk3328-vop              7        >        6                                x     ;        aclk_vop dclk_vop hclk_vop                                    axi ahb dclk            T   ?        %okay       port                         +                  endpoint@0                       i   @           E            iommu@ff373f00            rockchip,iommu               7?                6                               ;        aclk iface          G            %okay               ?      hdmi@ff3c0000             rockchip,rk3328-dw-hdmi              <                            6       #          G                        F              iahb isfr cec           y   A        ~hdmi            default            B   C   D           :                    %okay                  ports      port       endpoint            i   E           @               codec@ff410000            rockchip,rk3328-codec                A                              *      
  pclk mclk              :                    %okay               F                        phy@ff430000              rockchip,rk3328-hdmi-phy                 C                 6       S                     G      y        sysclk refoclk refpclk        	  whdmi_phy            Z               H        cpu-version                     %okay               A      clock-controller@ff440000         (    rockchip,rk3328-cru rockchip,cru syscon              D                    :        Z                      x      x      =            &      '      (                                                      A      B      D      C      "      \      5                             H                 4                  $        z               G   G   G      |           n6 n6 n6          n6 #F L  G рxhxhрxhxh                    syscon@ff450000       .    rockchip,rk3328-usb2phy-grf syscon simple-mfd                E                              +      usb2phy@100           rockchip,rk3328-usb2phy                            G        phyclk          wusb480m_phy         Z            x      {           I        %okay               I   otg-port                      $  6       ;          <          =           +otg-bvalid otg-id linestate         %okay               Y      host-port                       6       >         
  +linestate           %okay               Z            mmc@ff500000          0    rockchip,rk3328-dw-mshc rockchip,rk3288-dw-mshc              P        @         6                         =      !      J      N        biu ciu ciu-drive ciu-sample                       р        %okay                                          %        default            J   K   L   M         0         =         J         W        e   N        q         mmc@ff510000          0    rockchip,rk3328-dw-mshc rockchip,rk3288-dw-mshc              Q        @         6                         >      "      K      O        biu ciu ciu-drive ciu-sample                       р      	  %disabled          mmc@ff520000          0    rockchip,rk3328-dw-mshc rockchip,rk3288-dw-mshc              R        @         6                         ?      #      L      P        biu ciu ciu-drive ciu-sample                       р        %okay                                 ~                          default            O   P   Q        e           q         ethernet@ff540000             rockchip,rk3328-gmac                 T                 6                  +macirq        8         d      W      X      Z      Y                  M  stmmaceth mac_clk_rx mac_clk_tx clk_mac_ref clk_mac_refout aclk_mac pclk_mac                  c      
  stmmaceth              :                   %okay            x      d      f           R   R        input              S        rgmii           default            T                    U                             '  P                   #   $        ,         ethernet@ff550000             rockchip,rk3328-gmac                 U                    :        6                  +macirq        8         T      S      S      U                  V      I  stmmaceth mac_clk_rx mac_clk_tx clk_mac_ref aclk_mac pclk_mac clk_macphy                  b      
  stmmaceth           rmii            5   V                   output        	  %disabled       mdio              snps,dwmac-mdio                      +       ethernet-phy@0        4    ethernet-phy-id1234.d400 ethernet-phy-ieee802.3-c22                             V              d        default            W   X         @           V            usb@ff580000          2    rockchip,rk3328-usb rockchip,rk3066-usb snps,dwc2                X                 6                        M        otg         Rhost            Z           l          {            @               y   Y      	  ~usb2-phy            %okay          usb@ff5c0000              generic-ehci                 \                 6                        N   I        y   Z        ~usb         %okay          usb@ff5d0000              generic-ohci                 ]                 6                        N   I        y   Z        ~usb         %okay          usb@ff600000              rockchip,rk3328-dwc3 snps,dwc3               `                 6       C                  `      a              ref_clk suspend_clk bus_clk         Rhost          
  utmi_wide                                                	         	(        %okay          interrupt-controller@ff811000             arm,gic-400         	A                         	R      @                                 @             `                 6      	                   crypto@ff060000           rockchip,rk3328-crypto                       @         6                        P     Q      ;        hclk_master hclk_slave sclk               D        crypto-rst        pinctrl           rockchip,rk3328-pinctrl            :                     +            	g   gpio@ff210000             rockchip,gpio-bank               !                 6       3                           9        I            	R        	A              )      gpio@ff220000             rockchip,gpio-bank               "                 6       4                           9        I            	R        	A              U      gpio@ff230000             rockchip,gpio-bank               #                 6       5                           9        I            	R        	A              l      gpio@ff240000             rockchip,gpio-bank               $                 6       6                           9        I            	R        	A              p      pcfg-pull-up             	n           ]      pcfg-pull-down           	{           e      pcfg-pull-none           	           [      pcfg-pull-none-2ma           	        	              d      pcfg-pull-up-2ma             	n        	         pcfg-pull-up-4ma             	n        	              ^      pcfg-pull-none-4ma           	        	              a      pcfg-pull-down-4ma           	{        	         pcfg-pull-none-8ma           	        	              _      pcfg-pull-up-8ma             	n        	              `      pcfg-pull-none-12ma          	        	              b      pcfg-pull-up-12ma            	n        	              c      pcfg-output-high             	      pcfg-output-low          	      pcfg-input-high          	n         	           \      pcfg-input           	      i2c0       i2c0-xfer            	            [            [           '         i2c1       i2c1-xfer            	            [            [           (         i2c2       i2c2-xfer            	            [            [           ,         i2c3       i2c3-xfer            	             [             [           -      i2c3-pins            	              [              [         hdmi_i2c       hdmii2c-xfer             	             [             [           C         pdm-0      pdmm0-clk           	            [                 pdmm0-fsync         	            [      pdmm0-sdi0          	            [                 pdmm0-sdi1          	            [                 pdmm0-sdi2          	            [                 pdmm0-sdi3          	            [                 pdmm0-clk-sleep         	             \                 pdmm0-sdi0-sleep            	             \                 pdmm0-sdi1-sleep            	             \                 pdmm0-sdi2-sleep            	             \                 pdmm0-sdi3-sleep            	             \                 pdmm0-fsync-sleep           	             \         tsadc      otp-pin         	             [           8      otp-out         	            [           9         uart0      uart0-xfer           	      	      [            ]                  uart0-cts           	            [           !      uart0-rts           	      
      [           "      uart0-rts-pin           	      
       [         uart1      uart1-xfer           	            [            ]           #      uart1-cts           	            [           $      uart1-rts           	            [           %      uart1-rts-pin           	             [         uart2-0    uart2m0-xfer             	             [            ]         uart2-1    uart2m1-xfer             	             [            ]           &         spi0-0     spi0m0-clk          	            ]      spi0m0-cs0          	            ]      spi0m0-tx           	      	      ]      spi0m0-rx           	      
      ]      spi0m0-cs1          	            ]         spi0-1     spi0m1-clk          	            ]      spi0m1-cs0          	            ]      spi0m1-tx           	            ]      spi0m1-rx           	            ]      spi0m1-cs1          	            ]         spi0-2     spi0m2-clk          	             ]           .      spi0m2-cs0          	            ]           1      spi0m2-tx           	            ]           /      spi0m2-rx           	            ]           0         i2s1       i2s1-mclk           	            [      i2s1-sclk           	            [      i2s1-lrckrx         	            [      i2s1-lrcktx         	            [      i2s1-sdi            	            [      i2s1-sdo            	            [      i2s1-sdio1          	            [      i2s1-sdio2          	            [      i2s1-sdio3          	            [      i2s1-sleep          	             \             \             \             \             \             \             \             \             \         i2s2-0     i2s2m0-mclk         	            [      i2s2m0-sclk         	            [      i2s2m0-lrckrx           	            [      i2s2m0-lrcktx           	            [      i2s2m0-sdi          	            [      i2s2m0-sdo          	            [      i2s2m0-sleep          `  	             \             \             \             \             \             \         i2s2-1     i2s2m1-mclk         	            [      i2s2m1-sclk         	             [      i2sm1-lrckrx            	            [      i2s2m1-lrcktx           	            [      i2s2m1-sdi          	            [      i2s2m1-sdo          	            [      i2s2m1-sleep          P  	             \              \             \             \             \         spdif-0    spdifm0-tx          	             [         spdif-1    spdifm1-tx          	            [         spdif-2    spdifm2-tx          	             [                    sdmmc0-0       sdmmc0m0-pwren          	            ^      sdmmc0m0-pin            	             ^         sdmmc0-1       sdmmc0m1-pwren          	             ^      sdmmc0m1-pin            	              ^           f         sdmmc0     sdmmc0-clk          	            _           J      sdmmc0-cmd          	            `           K      sdmmc0-dectn            	            ^           L      sdmmc0-wrprt            	            ^      sdmmc0-bus1         	             `      sdmmc0-bus4       @  	             `            `            `            `           M      sdmmc0-pins         	             ^             ^             ^             ^             ^             ^             ^              ^         sdmmc0ext      sdmmc0ext-clk           	            a      sdmmc0ext-cmd           	             ^      sdmmc0ext-wrprt         	            ^      sdmmc0ext-dectn         	            ^      sdmmc0ext-bus1          	            ^      sdmmc0ext-bus4        @  	            ^            ^            ^            ^      sdmmc0ext-pins          	              ^             ^             ^             ^             ^             ^             ^             ^         sdmmc1     sdmmc1-clk          	            _      sdmmc1-cmd          	            `      sdmmc1-pwren            	            `      sdmmc1-wrprt            	            `      sdmmc1-dectn            	            `      sdmmc1-bus1         	            `      sdmmc1-bus4       @  	            `            `            `            `      sdmmc1-pins         	             ^             ^             ^             ^             ^             ^             ^             ^             ^         emmc       emmc-clk            	            b           O      emmc-cmd            	            c           P      emmc-pwren          	            [      emmc-rstnout            	            [      emmc-bus1           	             c      emmc-bus4         @  	             c            c            c            c      emmc-bus8           	             c            c            c            c            c            c            c            c           Q         pwm0       pwm0-pin            	            [           2         pwm1       pwm1-pin            	            [           3         pwm2       pwm2-pin            	            [           4         pwmir      pwmir-pin           	            [           5         gmac-1     rgmiim1-pins         `  	            _            a            a            _            a            a            a      
      a            a            _      	      _            a            a            _            _             _             _             a             _             _             _             _           T      rmiim1-pins         	            d            b            d            d            d            d      
      d            d            b      	      b             [             [             [             [             [             [         gmac2phy       fephyled-speed10            	             [      fephyled-duplex         	             [      fephyled-rxm1           	            [           W      fephyled-txm1           	            [      fephyled-linkm1         	            [           X         tsadc_pin      tsadc-int           	            [      tsadc-pin           	             [         hdmi_pin       hdmi-cec            	             [           B      hdmi-hpd            	             e           D         cif-0      dvp-d2d9-m0         	            [            [            [            [            [      	      [      
      [            [            [             [            [            [         cif-1      dvp-d2d9-m1         	            [            [            [            [            [            [            [            [            [             [            [            [         pmic       pmic-int-l          	              ]           *         usb2       usb20-host-drv          	               ]           h         ir     ir-int          	             [           m         sdmmcio    sdio-per-pin            	              e           g         wifi       wifi-en         	             [           n      wifi-host-wake          	             a           o      bt-rst          	             [      bt-en           	             [            chosen          	serial2:1500000n8         external-gmac-clock           fixed-clock         gsY@        wgmac_clkin          Z               R      dc-12v            regulator-fixed         4dc_12v           s                 C          [             i      sdmmc-regulator           regulator-fixed            )              default            f                 4vcc_sd          C 2Z        [ 2Z        	              N      sdmmcio-regulator             regulator-gpio             )                 w@    2Z          	  4vcc_sdio            	voltage         C w@        [ 2Z         s        	   +        default            g                 vcc-host1-5v-regulator            regulator-fixed          	           )                default            h        4vcc_host1_5v             s        	   +      vcc-sys           regulator-fixed         4vcc_sys          s                 C LK@        [ LK@        	   i           +      vcc-phy-regulator             regulator-fixed         4vcc_phy          s                    S      leds          
    gpio-leds      led-0           
firefly:blue:power        
  
heartbeat              j              
-on        led-1           
firefly:yellow:user         
mmc1               j               
-off          adc-keys          	    adc-keys            
;   k            
Gbuttons         
X    button-recovery       	  
Recovery            
r  h        
}  '         ir-receiver           gpio-ir-receiver               l            
  
rc-khadas           default            m      sdio-pwrseq           mmc-pwrseq-simple           default            n   o        
   p               	compatible interrupt-parent #address-cells #size-cells model serial0 serial1 serial2 i2c0 i2c1 i2c2 i2c3 ethernet0 ethernet1 mmc0 mmc1 device_type reg clocks #cooling-cells cpu-idle-states dynamic-power-coefficient enable-method next-level-cache operating-points-v2 cpu-supply phandle entry-method local-timer-stop arm,psci-suspend-param entry-latency-us exit-latency-us min-residency-us cache-level cache-unified opp-shared opp-hz opp-microvolt clock-latency-ns opp-suspend simple-audio-card,format simple-audio-card,mclk-fs simple-audio-card,name status sound-dai interrupts interrupt-affinity ports #clock-cells clock-frequency clock-output-names clock-names dmas dma-names #sound-dai-cells pinctrl-names pinctrl-0 pinctrl-1 vccio1-supply vccio2-supply vccio3-supply vccio4-supply vccio5-supply vccio6-supply pmuio-supply gpio-controller #gpio-cells #power-domain-cells offset mode-normal mode-recovery mode-bootloader mode-loader reg-io-width reg-shift rockchip,system-power-controller wakeup-source vcc1-supply vcc2-supply vcc3-supply vcc4-supply vcc5-supply vcc6-supply regulator-name regulator-min-microvolt regulator-max-microvolt regulator-always-on regulator-boot-on regulator-on-in-suspend regulator-suspend-microvolt #pwm-cells arm,pl330-periph-burst #dma-cells polling-delay-passive polling-delay sustainable-power thermal-sensors temperature hysteresis trip cooling-device contribution assigned-clocks assigned-clock-rates pinctrl-2 resets reset-names rockchip,grf rockchip,hw-tshut-temp #thermal-sensor-cells rockchip,efuse-size bits #io-channel-cells vref-supply interrupt-names mali-supply #iommu-cells iommus power-domains remote-endpoint phys phy-names mute-gpios nvmem-cells nvmem-cell-names #phy-cells #reset-cells assigned-clock-parents fifo-depth max-frequency bus-width cap-mmc-highspeed cap-sd-highspeed disable-wp sd-uhs-sdr12 sd-uhs-sdr25 sd-uhs-sdr50 sd-uhs-sdr104 vmmc-supply vqmmc-supply mmc-ddr-1_8v mmc-hs200-1_8v non-removable snps,txpbl clock_in_out phy-supply phy-mode snps,aal snps,reset-gpio snps,reset-active-low snps,reset-delays-us snps,rxpbl tx_delay rx_delay phy-handle phy-is-integrated dr_mode g-np-tx-fifo-size g-rx-fifo-size g-tx-fifo-size phy_type snps,dis-del-phy-power-chg-quirk snps,dis_enblslpm_quirk snps,dis-tx-ipgap-linecheck-quirk snps,dis-u2-freeclk-exists-quirk snps,dis_u2_susphy_quirk snps,dis_u3_susphy_quirk #interrupt-cells interrupt-controller ranges bias-pull-up bias-pull-down bias-disable drive-strength output-high output-low input-enable rockchip,pins stdout-path vin-supply regulator-type enable-active-high label linux,default-trigger default-state io-channels io-channel-names keyup-threshold-microvolt linux,code press-threshold-microvolt linux,rc-map-name reset-gpios 