  %   8  l   (            	  4                             )    xunlong,orangepi-r1-plus rockchip,rk3328                                     +            7Xunlong Orange Pi R1 Plus      aliases          =/serial@ff110000             E/serial@ff120000             M/serial@ff130000             U/i2c@ff150000            Z/i2c@ff160000            _/i2c@ff170000            d/i2c@ff180000            i/ethernet@ff540000           s/usb@ff600000/device@2           }/mmc@ff500000         cpus                         +       cpu@0            cpu           arm,cortex-a53                                                                      x         psci                                                  	      cpu@1            cpu           arm,cortex-a53                                                                     x         psci                                                  
      cpu@2            cpu           arm,cortex-a53                                                                     x         psci                                                        cpu@3            cpu           arm,cortex-a53                                                                     x         psci                                                        idle-states         psci       cpu-sleep             arm,idle-state           %        6           M   x        ^           n                      l2-cache0             cache                                           opp-table-0           operating-points-v2                        opp-408000000               Q          ~          @               opp-600000000               #F          ~          @      opp-816000000               0,          B@          @      opp-1008000000              <                    @      opp-1200000000              G          (          @      opp-1296000000              M?d                     @         analog-sound              simple-audio-card           i2s                    	Analog        	   disabled       simple-audio-card,cpu           '         simple-audio-card,codec         '            arm-pmu           arm,cortex-a53-pmu        0  1       d          e          f          g           <   	   
            display-subsystem             rockchip,display-subsystem          O         	   disabled          hdmi-sound            simple-audio-card           i2s                    	HDMI          	   disabled       simple-audio-card,cpu           '         simple-audio-card,codec         '            psci              arm,psci-1.0 arm,psci-0.2            smc       timer             arm,armv8-timer       0  1                              
        xin24m            fixed-clock         U            bn6         rxin24m             C      i2s@ff000000          (    rockchip,rk3328-i2s rockchip,rk3066-i2s                                1                         )     7        i2s_clk i2s_hclk                                tx rx                     	   disabled                     i2s@ff010000          (    rockchip,rk3328-i2s rockchip,rk3066-i2s                               1                         *     8        i2s_clk i2s_hclk                                tx rx                     	   disabled                     i2s@ff020000          (    rockchip,rk3328-i2s rockchip,rk3066-i2s                               1                         +     9        i2s_clk i2s_hclk                                 tx rx                     	   disabled          spdif@ff030000            rockchip,rk3328-spdif                                 1                         .     :      
  mclk hclk                 
        tx          default                              	   disabled          pdm@ff040000              rockchip,pdm                                         =     R        pdm_clk pdm_hclk                          rx          default sleep                                                       	   disabled          syscon@ff100000       &    rockchip,rk3328-grf syscon simple-mfd                                    8   io-domains        "    rockchip,rk3328-io-voltage-domain            okay                                                        
                      &         gpio              rockchip,rk3328-grf-gpio             4        D         power-controller          !    rockchip,rk3328-power-controller            P                        +               :   power-domain@6                      P          power-domain@5                                   B      A      B        P          power-domain@8                                  F        P             reboot-mode           syscon-reboot-mode          d          kRB         wRB        RB	        RB         serial@ff110000       &    rockchip,rk3328-uart snps,dw-apb-uart                                 1       7                  &              baudclk apb_pclk                                tx rx           default                                               	   disabled          serial@ff120000       &    rockchip,rk3328-uart snps,dw-apb-uart                                 1       8                  '              baudclk apb_pclk                                tx rx           default            !   "   #                            	   disabled          serial@ff130000       &    rockchip,rk3328-uart snps,dw-apb-uart                                 1       9                  (              baudclk apb_pclk                                tx rx           default            $                               okay          i2c@ff150000          (    rockchip,rk3328-i2c rockchip,rk3399-i2c                               1       $                        +                   7            	  i2c pclk            default            %      	   disabled          i2c@ff160000          (    rockchip,rk3328-i2c rockchip,rk3399-i2c                               1       %                        +                   8            	  i2c pclk            default            &         okay       pmic@18           rockchip,rk805                          '        1              U           rxin32k rk805-clkout2             4        D              (        default                              )           )           )           )                   #   )   regulators     DCDC_REG1           /vdd_log          >         R        d 
4        |            0   regulator-state-mem                   B@         DCDC_REG2           /vdd_arm          >         R        d 
4        |            0              regulator-state-mem                   ~         DCDC_REG3           /vcc_ddr          >         R   regulator-state-mem                   DCDC_REG4           /vcc_io           >         R        d 2Z        | 2Z              regulator-state-mem                   2Z         LDO_REG1            /vcc_18           >         R        d w@        | w@   regulator-state-mem                   w@         LDO_REG2            /vcc18_emmc           >         R        d w@        | w@              regulator-state-mem                   w@         LDO_REG3            /vdd_10           >         R        d B@        | B@   regulator-state-mem                   B@                  i2c@ff170000          (    rockchip,rk3328-i2c rockchip,rk3399-i2c                               1       &                        +                   9            	  i2c pclk            default            *      	   disabled          i2c@ff180000          (    rockchip,rk3328-i2c rockchip,rk3399-i2c                               1       '                        +                   :            	  i2c pclk            default            +      	   disabled          spi@ff190000          (    rockchip,rk3328-spi rockchip,rk3066-spi                               1       1                        +                                  spiclk apb_pclk                     	        tx rx           default            ,   -   .   /         okay       flash@0           jedec,spi-nor                                 watchdog@ff1a0000              rockchip,rk3328-wdt snps,dw-wdt                               1       (                        pwm@ff1b0000              rockchip,rk3328-pwm                                      <            	  pwm pclk            default            0                 	   disabled          pwm@ff1b0010              rockchip,rk3328-pwm                                     <            	  pwm pclk            default            1                 	   disabled          pwm@ff1b0020              rockchip,rk3328-pwm                                      <            	  pwm pclk            default            2                    okay          pwm@ff1b0030              rockchip,rk3328-pwm               0               1       2                  <            	  pwm pclk            default            3                 	   disabled          dma-controller@ff1f0000           arm,pl330 arm,primecell                      @         1                                                   	  apb_pclk                                thermal-zones      soc-thermal                    2          @          R   4       trips      trip-point0         b p        n           passive       trip-point1         b L        n           passive            5      soc-crit            b s        n        	   critical             cooling-maps       map0            y   5      0  ~   	   
                                tsadc@ff250000            rockchip,rk3328-tsadc                %                 1       :                 $          P               $              tsadc apb_pclk          init default sleep             6           7           6              B      
  tsadc-apb              8                              okay                        -               4      efuse@ff260000            rockchip,rk3328-efuse                &         P                     +                  >        pclk_efuse          H       id@7                         cpu-leakage@17                       logic-leakage@19                         cpu-version@1a                         \                 D         adc@ff280000          .    rockchip,rk3328-saradc rockchip,rk3399-saradc                (                 1       P           a                  %              saradc apb_pclk               V        saradc-apb        	   disabled          gpu@ff300000          "    rockchip,rk3328-mali arm,mali-450                0               T  1       Z          W          ]          X          Y          [          \         "  sgp gpmmu pp pp0 ppmmu0 pp1 ppmmu1                              	  bus core                  f      iommu@ff330200            rockchip,iommu               3                1       `                                aclk iface                    	   disabled          iommu@ff340800            rockchip,iommu               4        @        1       b                       F        aclk iface                    	   disabled          video-codec@ff350000              rockchip,rk3328-vpu              5                 1       	           svdpu                        F      
  aclk hclk              9           :         iommu@ff350800            rockchip,iommu               5        @        1                              F        aclk iface                         :              9      video-codec@ff360000          *    rockchip,rk3328-vdec rockchip,rk3399-vdec                6                 1                               B      A      B        axi ahb cabac core                      A      B        ׄ ׄ             ;           :         iommu@ff360480            rockchip,iommu                6       @    6       @        1       J                       B        aclk iface                         :              ;      vop@ff370000              rockchip,rk3328-vop              7        >        1                                x     ;        aclk_vop dclk_vop hclk_vop                                    axi ahb dclk               <      	   disabled       port                         +                  endpoint@0                          =           B            iommu@ff373f00            rockchip,iommu               7?                1                               ;        aclk iface                    	   disabled               <      hdmi@ff3c0000             rockchip,rk3328-dw-hdmi              <                            1       #          G                        F              iahb isfr cec              >        hdmi            default            ?   @   A           8                  	   disabled                  ports      port       endpoint               B           =               codec@ff410000            rockchip,rk3328-codec                A                              *      
  pclk mclk              8                  	   disabled                     phy@ff430000              rockchip,rk3328-hdmi-phy                 C                 1       S                     C      y        sysclk refoclk refpclk        	  rhdmi_phy            U               D        cpu-version                   	   disabled               >      clock-controller@ff440000         (    rockchip,rk3328-cru rockchip,cru syscon              D                    8        U                            x      =            &      '      (                                                      A      B      D      C      "      \      5                             H                 4                  $        z               C   C   C      |           n6 n6 n6          n6 #F L  G рxhxhрxhxh                    syscon@ff450000       .    rockchip,rk3328-usb2phy-grf syscon simple-mfd                E                              +      usb2phy@100           rockchip,rk3328-usb2phy                            C        phyclk          rusb480m_phy         U                  {           E         okay               E   otg-port                      $  1       ;          <          =           sotg-bvalid otg-id linestate          okay               R      host-port                       1       >         
  slinestate            okay               S            mmc@ff500000          0    rockchip,rk3328-dw-mshc rockchip,rk3288-dw-mshc              P        @         1                         =      !      J      N        biu ciu ciu-drive ciu-sample                       р         okay                        %         6           F   G   H   I        default         A   J      mmc@ff510000          0    rockchip,rk3328-dw-mshc rockchip,rk3288-dw-mshc              Q        @         1                         >      "      K      O        biu ciu ciu-drive ciu-sample                       р      	   disabled          mmc@ff520000          0    rockchip,rk3328-dw-mshc rockchip,rk3288-dw-mshc              R        @         1                         ?      #      L      P        biu ciu ciu-drive ciu-sample                       р      	   disabled          ethernet@ff540000             rockchip,rk3328-gmac                 T                 1                  smacirq        8         d      W      X      Z      Y                  M  stmmaceth mac_clk_rx mac_clk_tx clk_mac_ref clk_mac_refout aclk_mac pclk_mac                  c      
  stmmaceth              8        M            okay                  d      f           K   K        Xinput           e   L        prgmii           y              M        default                                $   mdio              snps,dwmac-mdio                      +       ethernet-phy@1                         N        default           '          P           '                 L            ethernet@ff550000             rockchip,rk3328-gmac                 U                    8        1                  smacirq        8         T      S      S      U                  V      I  stmmaceth mac_clk_rx mac_clk_tx clk_mac_ref aclk_mac pclk_mac clk_macphy                  b      
  stmmaceth           prmii            e   O        M           Xoutput        	   disabled       mdio              snps,dwmac-mdio                      +       ethernet-phy@0        4    ethernet-phy-id1234.d400 ethernet-phy-ieee802.3-c22                             V              d        default            P   Q                    O            usb@ff580000          2    rockchip,rk3328-usb rockchip,rk3066-usb snps,dwc2                X                 1                        M        otg         host                                             @                  R      	  usb2-phy             okay          usb@ff5c0000              generic-ehci                 \                 1                        N   E           S        usb          okay          usb@ff5d0000              generic-ohci                 ]                 1                        N   E           S        usb          okay          usb@ff600000              rockchip,rk3328-dwc3 snps,dwc3               `                 1       C                  `      a              ref_clk suspend_clk bus_clk         host          
  utmi_wide                      A         Y         {                           okay                         +       device@2              usbbda,8153                      interrupt-controller@ff811000             arm,gic-400                                        @                                 @             `                 1      	                   crypto@ff060000           rockchip,rk3328-crypto                       @         1                        P     Q      ;        hclk_master hclk_slave sclk               D        crypto-rst        pinctrl           rockchip,rk3328-pinctrl            8                     +               gpio@ff210000             rockchip,gpio-bank               !                 1       3                           4        D                                  d      gpio@ff220000             rockchip,gpio-bank               "                 1       4                           4        D                                  '      gpio@ff230000             rockchip,gpio-bank               #                 1       5                           4        D                                  b      gpio@ff240000             rockchip,gpio-bank               $                 1       6                           4        D                                  c      pcfg-pull-up                        V      pcfg-pull-down           	           ^      pcfg-pull-none           	           T      pcfg-pull-none-2ma           	        	$              ]      pcfg-pull-up-2ma                     	$         pcfg-pull-up-4ma                     	$              W      pcfg-pull-none-4ma           	        	$              Z      pcfg-pull-down-4ma           	        	$         pcfg-pull-none-8ma           	        	$              X      pcfg-pull-up-8ma                     	$              Y      pcfg-pull-none-12ma          	        	$              [      pcfg-pull-up-12ma                    	$              \      pcfg-output-high             	3      pcfg-output-low          	?      pcfg-input-high                   	J           U      pcfg-input           	J      i2c0       i2c0-xfer            	W            T            T           %         i2c1       i2c1-xfer            	W            T            T           &         i2c2       i2c2-xfer            	W            T            T           *         i2c3       i2c3-xfer            	W             T             T           +      i2c3-pins            	W              T              T         hdmi_i2c       hdmii2c-xfer             	W             T             T           @         pdm-0      pdmm0-clk           	W            T                 pdmm0-fsync         	W            T      pdmm0-sdi0          	W            T                 pdmm0-sdi1          	W            T                 pdmm0-sdi2          	W            T                 pdmm0-sdi3          	W            T                 pdmm0-clk-sleep         	W             U                 pdmm0-sdi0-sleep            	W             U                 pdmm0-sdi1-sleep            	W             U                 pdmm0-sdi2-sleep            	W             U                 pdmm0-sdi3-sleep            	W             U                 pdmm0-fsync-sleep           	W             U         tsadc      otp-pin         	W             T           6      otp-out         	W            T           7         uart0      uart0-xfer           	W      	      T            V                 uart0-cts           	W            T                 uart0-rts           	W      
      T                  uart0-rts-pin           	W      
       T         uart1      uart1-xfer           	W            T            V           !      uart1-cts           	W            T           "      uart1-rts           	W            T           #      uart1-rts-pin           	W             T         uart2-0    uart2m0-xfer             	W             T            V         uart2-1    uart2m1-xfer             	W             T            V           $         spi0-0     spi0m0-clk          	W            V      spi0m0-cs0          	W            V      spi0m0-tx           	W      	      V      spi0m0-rx           	W      
      V      spi0m0-cs1          	W            V         spi0-1     spi0m1-clk          	W            V      spi0m1-cs0          	W            V      spi0m1-tx           	W            V      spi0m1-rx           	W            V      spi0m1-cs1          	W            V         spi0-2     spi0m2-clk          	W             V           ,      spi0m2-cs0          	W            V           /      spi0m2-tx           	W            V           -      spi0m2-rx           	W            V           .         i2s1       i2s1-mclk           	W            T      i2s1-sclk           	W            T      i2s1-lrckrx         	W            T      i2s1-lrcktx         	W            T      i2s1-sdi            	W            T      i2s1-sdo            	W            T      i2s1-sdio1          	W            T      i2s1-sdio2          	W            T      i2s1-sdio3          	W            T      i2s1-sleep          	W             U             U             U             U             U             U             U             U             U         i2s2-0     i2s2m0-mclk         	W            T      i2s2m0-sclk         	W            T      i2s2m0-lrckrx           	W            T      i2s2m0-lrcktx           	W            T      i2s2m0-sdi          	W            T      i2s2m0-sdo          	W            T      i2s2m0-sleep          `  	W             U             U             U             U             U             U         i2s2-1     i2s2m1-mclk         	W            T      i2s2m1-sclk         	W             T      i2sm1-lrckrx            	W            T      i2s2m1-lrcktx           	W            T      i2s2m1-sdi          	W            T      i2s2m1-sdo          	W            T      i2s2m1-sleep          P  	W             U              U             U             U             U         spdif-0    spdifm0-tx          	W             T         spdif-1    spdifm1-tx          	W            T         spdif-2    spdifm2-tx          	W             T                    sdmmc0-0       sdmmc0m0-pwren          	W            W      sdmmc0m0-pin            	W             W         sdmmc0-1       sdmmc0m1-pwren          	W             W      sdmmc0m1-pin            	W              W           e         sdmmc0     sdmmc0-clk          	W            X           F      sdmmc0-cmd          	W            Y           G      sdmmc0-dectn            	W            W           H      sdmmc0-wrprt            	W            W      sdmmc0-bus1         	W             Y      sdmmc0-bus4       @  	W             Y            Y            Y            Y           I      sdmmc0-pins         	W             W             W             W             W             W             W             W              W         sdmmc0ext      sdmmc0ext-clk           	W            Z      sdmmc0ext-cmd           	W             W      sdmmc0ext-wrprt         	W            W      sdmmc0ext-dectn         	W            W      sdmmc0ext-bus1          	W            W      sdmmc0ext-bus4        @  	W            W            W            W            W      sdmmc0ext-pins          	W              W             W             W             W             W             W             W             W         sdmmc1     sdmmc1-clk          	W            X      sdmmc1-cmd          	W            Y      sdmmc1-pwren            	W            Y      sdmmc1-wrprt            	W            Y      sdmmc1-dectn            	W            Y      sdmmc1-bus1         	W            Y      sdmmc1-bus4       @  	W            Y            Y            Y            Y      sdmmc1-pins         	W             W             W             W             W             W             W             W             W             W         emmc       emmc-clk            	W            [      emmc-cmd            	W            \      emmc-pwren          	W            T      emmc-rstnout            	W            T      emmc-bus1           	W             \      emmc-bus4         @  	W             \            \            \            \      emmc-bus8           	W             \            \            \            \            \            \            \            \         pwm0       pwm0-pin            	W            T           0         pwm1       pwm1-pin            	W            T           1         pwm2       pwm2-pin            	W            T           2         pwmir      pwmir-pin           	W            T           3         gmac-1     rgmiim1-pins         `  	W            X            Z            Z            X            Z            Z            Z      
      Z            Z            X      	      X            Z            Z            X            X             X             X             Z             X             X             X             X           M      rmiim1-pins         	W            ]            [            ]            ]            ]            ]      
      ]            ]            [      	      [             T             T             T             T             T             T         gmac2phy       fephyled-speed10            	W             T      fephyled-duplex         	W             T      fephyled-rxm1           	W            T           P      fephyled-txm1           	W            T      fephyled-linkm1         	W            T           Q         tsadc_pin      tsadc-int           	W            T      tsadc-pin           	W             T         hdmi_pin       hdmi-cec            	W             T           ?      hdmi-hpd            	W             ^           A         cif-0      dvp-d2d9-m0         	W            T            T            T            T            T      	      T      
      T            T            T             T            T            T         cif-1      dvp-d2d9-m1         	W            T            T            T            T            T            T            T            T            T             T            T            T         gmac2io    eth-phy-reset-pin           	W             ^           N         leds       lan-led-pin         	W             T           _      sys-led-pin         	W             T           `      wan-led-pin         	W             T           a         lan    lan-vdd-pin         	W             T           f         pmic       pmic-int-l          	W             V           (            chosen          	eserial2:1500000n8         gmac-clock            fixed-clock         bsY@        rgmac_clkin          U               K      leds          
    gpio-leds              _   `   a        default    led-0           	qlan         	z              b             led-1           	qstatus          	z              c             
  	heartbeat         led-2           	qwan         	z              b                sdmmc-regulator           regulator-fixed         	   d                 e        default         /vcc_sd           R        	              J      vcc-sys-regulator             regulator-fixed         /vcc_sys          >         R        d LK@        | LK@           )      vdd-5v-lan-regulator              regulator-fixed          	        	   b                  f        default         /vdd_5v_lan           >         R        	   )         	compatible interrupt-parent #address-cells #size-cells model serial0 serial1 serial2 i2c0 i2c1 i2c2 i2c3 ethernet0 ethernet1 mmc0 device_type reg clocks #cooling-cells cpu-idle-states dynamic-power-coefficient enable-method next-level-cache operating-points-v2 cpu-supply phandle entry-method local-timer-stop arm,psci-suspend-param entry-latency-us exit-latency-us min-residency-us cache-level cache-unified opp-shared opp-hz opp-microvolt clock-latency-ns opp-suspend simple-audio-card,format simple-audio-card,mclk-fs simple-audio-card,name status sound-dai interrupts interrupt-affinity ports #clock-cells clock-frequency clock-output-names clock-names dmas dma-names #sound-dai-cells pinctrl-names pinctrl-0 pinctrl-1 pmuio-supply vccio1-supply vccio2-supply vccio3-supply vccio4-supply vccio5-supply vccio6-supply gpio-controller #gpio-cells #power-domain-cells offset mode-normal mode-recovery mode-bootloader mode-loader reg-io-width reg-shift rockchip,system-power-controller wakeup-source vcc1-supply vcc2-supply vcc3-supply vcc4-supply vcc5-supply vcc6-supply regulator-name regulator-always-on regulator-boot-on regulator-min-microvolt regulator-max-microvolt regulator-ramp-delay regulator-on-in-suspend regulator-suspend-microvolt spi-max-frequency #pwm-cells arm,pl330-periph-burst #dma-cells polling-delay-passive polling-delay sustainable-power thermal-sensors temperature hysteresis trip cooling-device contribution assigned-clocks assigned-clock-rates pinctrl-2 resets reset-names rockchip,grf rockchip,hw-tshut-temp #thermal-sensor-cells rockchip,hw-tshut-mode rockchip,hw-tshut-polarity rockchip,efuse-size bits #io-channel-cells interrupt-names #iommu-cells iommus power-domains remote-endpoint phys phy-names nvmem-cells nvmem-cell-names #phy-cells #reset-cells assigned-clock-parents fifo-depth bus-width cap-sd-highspeed disable-wp vmmc-supply snps,txpbl clock_in_out phy-handle phy-mode phy-supply snps,aal rx_delay tx_delay reset-assert-us reset-deassert-us reset-gpios phy-is-integrated dr_mode g-np-tx-fifo-size g-rx-fifo-size g-tx-fifo-size phy_type snps,dis-del-phy-power-chg-quirk snps,dis_enblslpm_quirk snps,dis-tx-ipgap-linecheck-quirk snps,dis-u2-freeclk-exists-quirk snps,dis_u2_susphy_quirk snps,dis_u3_susphy_quirk #interrupt-cells interrupt-controller ranges bias-pull-up bias-pull-down bias-disable drive-strength output-high output-low input-enable rockchip,pins stdout-path function color linux,default-trigger gpio vin-supply enable-active-high 