     8  <   (            
                               '    friendlyarm,nanopi-r2c rockchip,rk3328                                   +            7FriendlyElec NanoPi R2C    aliases          =/serial@ff110000             E/serial@ff120000             M/serial@ff130000             U/i2c@ff150000            Z/i2c@ff160000            _/i2c@ff170000            d/i2c@ff180000            i/ethernet@ff540000           s/usb@ff600000/device@2           }/mmc@ff500000         cpus                         +       cpu@0            cpu           arm,cortex-a53                                                                      x         psci                                                  	      cpu@1            cpu           arm,cortex-a53                                                                     x         psci                                                  
      cpu@2            cpu           arm,cortex-a53                                                                     x         psci                                                        cpu@3            cpu           arm,cortex-a53                                                                     x         psci                                                        idle-states         psci       cpu-sleep             arm,idle-state           %        6           M   x        ^           n                      l2-cache0             cache                                           opp-table-0           operating-points-v2                        opp-408000000               Q          ~          @               opp-600000000               #F          ~          @      opp-816000000               0,          B@          @      opp-1008000000              <                    @      opp-1200000000              G          (          @      opp-1296000000              M?d                     @         analog-sound              simple-audio-card           i2s                    	Analog        	   disabled       simple-audio-card,cpu           '         simple-audio-card,codec         '            arm-pmu           arm,cortex-a53-pmu        0  1       d          e          f          g           <   	   
            display-subsystem             rockchip,display-subsystem          O         	   disabled          hdmi-sound            simple-audio-card           i2s                    	HDMI          	   disabled       simple-audio-card,cpu           '         simple-audio-card,codec         '            psci              arm,psci-1.0 arm,psci-0.2            smc       timer             arm,armv8-timer       0  1                              
        xin24m            fixed-clock         U            bn6         rxin24m             E      i2s@ff000000          (    rockchip,rk3328-i2s rockchip,rk3066-i2s                                1                         )     7        i2s_clk i2s_hclk                                tx rx                     	   disabled                     i2s@ff010000          (    rockchip,rk3328-i2s rockchip,rk3066-i2s                               1                         *     8        i2s_clk i2s_hclk                                tx rx                     	   disabled                     i2s@ff020000          (    rockchip,rk3328-i2s rockchip,rk3066-i2s                               1                         +     9        i2s_clk i2s_hclk                                 tx rx                     	   disabled          spdif@ff030000            rockchip,rk3328-spdif                                 1                         .     :      
  mclk hclk                 
        tx          default                              	   disabled          pdm@ff040000              rockchip,pdm                                         =     R        pdm_clk pdm_hclk                          rx          default sleep                                                       	   disabled          syscon@ff100000       &    rockchip,rk3328-grf syscon simple-mfd                                    :   io-domains        "    rockchip,rk3328-io-voltage-domain            okay                                                        
                      &         gpio              rockchip,rk3328-grf-gpio             4        D         power-controller          !    rockchip,rk3328-power-controller            P                        +               <   power-domain@6                      P          power-domain@5                                   B      A      B        P          power-domain@8                                  F        P             reboot-mode           syscon-reboot-mode          d          kRB         wRB        RB	        RB         serial@ff110000       &    rockchip,rk3328-uart snps,dw-apb-uart                                 1       7                  &              baudclk apb_pclk                                tx rx           default                !   "                            	   disabled          serial@ff120000       &    rockchip,rk3328-uart snps,dw-apb-uart                                 1       8                  '              baudclk apb_pclk                                tx rx           default            #   $   %                            	   disabled          serial@ff130000       &    rockchip,rk3328-uart snps,dw-apb-uart                                 1       9                  (              baudclk apb_pclk                                tx rx           default            &                               okay          i2c@ff150000          (    rockchip,rk3328-i2c rockchip,rk3399-i2c                               1       $                        +                   7            	  i2c pclk            default            '      	   disabled          i2c@ff160000          (    rockchip,rk3328-i2c rockchip,rk3399-i2c                               1       %                        +                   8            	  i2c pclk            default            (         okay       pmic@18           rockchip,rk805                          )        1              U           rxin32k rk805-clkout2             4        D              *        default                              +           +           +           +                   #   +   regulators     DCDC_REG1           /vdd_log          >         R        d 
4        |            0   regulator-state-mem                   B@         DCDC_REG2           /vdd_arm          >         R        d 
4        |            0              regulator-state-mem                   ~         DCDC_REG3           /vcc_ddr          >         R   regulator-state-mem                   DCDC_REG4         
  /vcc_io_33            >         R        d 2Z        | 2Z              regulator-state-mem                   2Z         LDO_REG1            /vcc_18           >         R        d w@        | w@              regulator-state-mem                   w@         LDO_REG2            /vcc18_emmc           >         R        d w@        | w@              regulator-state-mem                   w@         LDO_REG3            /vdd_10           >         R        d B@        | B@   regulator-state-mem                   B@                  i2c@ff170000          (    rockchip,rk3328-i2c rockchip,rk3399-i2c                               1       &                        +                   9            	  i2c pclk            default            ,      	   disabled          i2c@ff180000          (    rockchip,rk3328-i2c rockchip,rk3399-i2c                               1       '                        +                   :            	  i2c pclk            default            -      	   disabled          spi@ff190000          (    rockchip,rk3328-spi rockchip,rk3066-spi                               1       1                        +                                  spiclk apb_pclk                     	        tx rx           default            .   /   0   1      	   disabled          watchdog@ff1a0000              rockchip,rk3328-wdt snps,dw-wdt                               1       (                        pwm@ff1b0000              rockchip,rk3328-pwm                                      <            	  pwm pclk            default            2                 	   disabled          pwm@ff1b0010              rockchip,rk3328-pwm                                     <            	  pwm pclk            default            3                 	   disabled          pwm@ff1b0020              rockchip,rk3328-pwm                                      <            	  pwm pclk            default            4                    okay          pwm@ff1b0030              rockchip,rk3328-pwm               0               1       2                  <            	  pwm pclk            default            5                 	   disabled          dma-controller@ff1f0000           arm,pl330 arm,primecell                      @         1                                                   	  apb_pclk                                thermal-zones      soc-thermal         
                      .          @   6       trips      trip-point0         P p        \           passive       trip-point1         P L        \           passive            7      soc-crit            P s        \        	   critical             cooling-maps       map0            g   7      0  l   	   
              {                  tsadc@ff250000            rockchip,rk3328-tsadc                %                 1       :                 $          P               $              tsadc apb_pclk          init default sleep             8           9           8              B      
  tsadc-apb              :                             okay                                       6      efuse@ff260000            rockchip,rk3328-efuse                &         P                     +                  >        pclk_efuse          6       id@7                         cpu-leakage@17                       logic-leakage@19                         cpu-version@1a                         J                 F         adc@ff280000          .    rockchip,rk3328-saradc rockchip,rk3399-saradc                (                 1       P           O                  %              saradc apb_pclk               V        saradc-apb        	   disabled          gpu@ff300000          "    rockchip,rk3328-mali arm,mali-450                0               T  1       Z          W          ]          X          Y          [          \         "  agp gpmmu pp pp0 ppmmu0 pp1 ppmmu1                              	  bus core                  f      iommu@ff330200            rockchip,iommu               3                1       `                                aclk iface          q          	   disabled          iommu@ff340800            rockchip,iommu               4        @        1       b                       F        aclk iface          q          	   disabled          video-codec@ff350000              rockchip,rk3328-vpu              5                 1       	           avdpu                        F      
  aclk hclk           ~   ;           <         iommu@ff350800            rockchip,iommu               5        @        1                              F        aclk iface          q               <              ;      video-codec@ff360000          *    rockchip,rk3328-vdec rockchip,rk3399-vdec                6                 1                               B      A      B        axi ahb cabac core                      A      B        ׄ ׄ          ~   =           <         iommu@ff360480            rockchip,iommu                6       @    6       @        1       J                       B        aclk iface          q               <              =      vop@ff370000              rockchip,rk3328-vop              7        >        1                                x     ;        aclk_vop dclk_vop hclk_vop                                    axi ahb dclk            ~   >      	   disabled       port                         +                  endpoint@0                          ?           D            iommu@ff373f00            rockchip,iommu               7?                1                               ;        aclk iface          q          	   disabled               >      hdmi@ff3c0000             rockchip,rk3328-dw-hdmi              <                            1       #          G                        F              iahb isfr cec              @        hdmi            default            A   B   C           :                  	   disabled                  ports      port       endpoint               D           ?               codec@ff410000            rockchip,rk3328-codec                A                              *      
  pclk mclk              :                  	   disabled                     phy@ff430000              rockchip,rk3328-hdmi-phy                 C                 1       S                     E      y        sysclk refoclk refpclk        	  rhdmi_phy            U               F        cpu-version                   	   disabled               @      clock-controller@ff440000         (    rockchip,rk3328-cru rockchip,cru syscon              D                    :        U                            x      =            &      '      (                                                      A      B      D      C      "      \      5                             H                 4                  $        z               E   E   E      |           n6 n6 n6          n6 #F L  G рxhxhрxhxh                    syscon@ff450000       .    rockchip,rk3328-usb2phy-grf syscon simple-mfd                E                              +      usb2phy@100           rockchip,rk3328-usb2phy                            E        phyclk          rusb480m_phy         U                  {           G         okay               G   otg-port                      $  1       ;          <          =           aotg-bvalid otg-id linestate          okay               T      host-port                       1       >         
  alinestate            okay               U            mmc@ff500000          0    rockchip,rk3328-dw-mshc rockchip,rk3288-dw-mshc              P        @         1                         =      !      J      N        biu ciu ciu-drive ciu-sample                       	р         okay                        !         2           H   I   J   K        default          =         J         W         d        r   L        ~         mmc@ff510000          0    rockchip,rk3328-dw-mshc rockchip,rk3288-dw-mshc              Q        @         1                         >      "      K      O        biu ciu ciu-drive ciu-sample                       	р      	   disabled          mmc@ff520000          0    rockchip,rk3328-dw-mshc rockchip,rk3288-dw-mshc              R        @         1                         ?      #      L      P        biu ciu ciu-drive ciu-sample                       	р      	   disabled          ethernet@ff540000             rockchip,rk3328-gmac                 T                 1                  amacirq        8         d      W      X      Z      Y                  M  stmmaceth mac_clk_rx mac_clk_tx clk_mac_ref clk_mac_refout aclk_mac pclk_mac                  c      
  stmmaceth              :                    okay                  d      f           M   M        input              N        rgmii                         O        default                                "   mdio              snps,dwmac-mdio                      +       ethernet-phy@3            ethernet-phy-ieee802.3-c22                      sY@                             P        default         5  '        E  P        W   )                 N            ethernet@ff550000             rockchip,rk3328-gmac                 U                    :        1                  amacirq        8         T      S      S      U                  V      I  stmmaceth mac_clk_rx mac_clk_tx clk_mac_ref aclk_mac pclk_mac clk_macphy                  b      
  stmmaceth           rmii               Q                   output        	   disabled       mdio              snps,dwmac-mdio                      +       ethernet-phy@0        4    ethernet-phy-id1234.d400 ethernet-phy-ieee802.3-c22                             V              d        default            R   S         c           Q            usb@ff580000          2    rockchip,rk3328-usb rockchip,rk3066-usb snps,dwc2                X                 1                        M        otg         uhost            }                                 @                  T      	  usb2-phy             okay          usb@ff5c0000              generic-ehci                 \                 1                        N   G           U        usb          okay          usb@ff5d0000              generic-ohci                 ]                 1                        N   G           U        usb          okay          usb@ff600000              rockchip,rk3328-dwc3 snps,dwc3               `                 1       C                  `      a              ref_clk suspend_clk bus_clk         uhost          
  utmi_wide                                       	         	2         	K         okay                         +       device@2              usbbda,8153                      interrupt-controller@ff811000             arm,gic-400         	d                         	u      @                                 @             `                 1      	                   crypto@ff060000           rockchip,rk3328-crypto                       @         1                        P     Q      ;        hclk_master hclk_slave sclk               D        crypto-rst        pinctrl           rockchip,rk3328-pinctrl            :                     +            	   gpio@ff210000             rockchip,gpio-bank               !                 1       3                           4        D            	u        	d              b      gpio@ff220000             rockchip,gpio-bank               "                 1       4                           4        D            	u        	d              )      gpio@ff230000             rockchip,gpio-bank               #                 1       5                           4        D            	u        	d              f      gpio@ff240000             rockchip,gpio-bank               $                 1       6                           4        D            	u        	d         pcfg-pull-up             	           X      pcfg-pull-down           	           `      pcfg-pull-none           	           V      pcfg-pull-none-2ma           	        	              _      pcfg-pull-up-2ma             	        	         pcfg-pull-up-4ma             	        	              Y      pcfg-pull-none-4ma           	        	              \      pcfg-pull-down-4ma           	        	         pcfg-pull-none-8ma           	        	              Z      pcfg-pull-up-8ma             	        	              [      pcfg-pull-none-12ma          	        	              ]      pcfg-pull-up-12ma            	        	              ^      pcfg-output-high             	      pcfg-output-low          	      pcfg-input-high          	         	           W      pcfg-input           	      i2c0       i2c0-xfer            	            V            V           '         i2c1       i2c1-xfer            	            V            V           (         i2c2       i2c2-xfer            	            V            V           ,         i2c3       i2c3-xfer            	             V             V           -      i2c3-pins            	              V              V         hdmi_i2c       hdmii2c-xfer             	             V             V           B         pdm-0      pdmm0-clk           	            V                 pdmm0-fsync         	            V      pdmm0-sdi0          	            V                 pdmm0-sdi1          	            V                 pdmm0-sdi2          	            V                 pdmm0-sdi3          	            V                 pdmm0-clk-sleep         	             W                 pdmm0-sdi0-sleep            	             W                 pdmm0-sdi1-sleep            	             W                 pdmm0-sdi2-sleep            	             W                 pdmm0-sdi3-sleep            	             W                 pdmm0-fsync-sleep           	             W         tsadc      otp-pin         	             V           8      otp-out         	            V           9         uart0      uart0-xfer           	      	      V            X                  uart0-cts           	            V           !      uart0-rts           	      
      V           "      uart0-rts-pin           	      
       V         uart1      uart1-xfer           	            V            X           #      uart1-cts           	            V           $      uart1-rts           	            V           %      uart1-rts-pin           	             V         uart2-0    uart2m0-xfer             	             V            X         uart2-1    uart2m1-xfer             	             V            X           &         spi0-0     spi0m0-clk          	            X      spi0m0-cs0          	            X      spi0m0-tx           	      	      X      spi0m0-rx           	      
      X      spi0m0-cs1          	            X         spi0-1     spi0m1-clk          	            X      spi0m1-cs0          	            X      spi0m1-tx           	            X      spi0m1-rx           	            X      spi0m1-cs1          	            X         spi0-2     spi0m2-clk          	             X           .      spi0m2-cs0          	            X           1      spi0m2-tx           	            X           /      spi0m2-rx           	            X           0         i2s1       i2s1-mclk           	            V      i2s1-sclk           	            V      i2s1-lrckrx         	            V      i2s1-lrcktx         	            V      i2s1-sdi            	            V      i2s1-sdo            	            V      i2s1-sdio1          	            V      i2s1-sdio2          	            V      i2s1-sdio3          	            V      i2s1-sleep          	             W             W             W             W             W             W             W             W             W         i2s2-0     i2s2m0-mclk         	            V      i2s2m0-sclk         	            V      i2s2m0-lrckrx           	            V      i2s2m0-lrcktx           	            V      i2s2m0-sdi          	            V      i2s2m0-sdo          	            V      i2s2m0-sleep          `  	             W             W             W             W             W             W         i2s2-1     i2s2m1-mclk         	            V      i2s2m1-sclk         	             V      i2sm1-lrckrx            	            V      i2s2m1-lrcktx           	            V      i2s2m1-sdi          	            V      i2s2m1-sdo          	            V      i2s2m1-sleep          P  	             W              W             W             W             W         spdif-0    spdifm0-tx          	             V         spdif-1    spdifm1-tx          	            V         spdif-2    spdifm2-tx          	             V                    sdmmc0-0       sdmmc0m0-pwren          	            Y      sdmmc0m0-pin            	             Y         sdmmc0-1       sdmmc0m1-pwren          	             Y      sdmmc0m1-pin            	              Y           h         sdmmc0     sdmmc0-clk          	            Z           H      sdmmc0-cmd          	            [           I      sdmmc0-dectn            	            Y           J      sdmmc0-wrprt            	            Y      sdmmc0-bus1         	             [      sdmmc0-bus4       @  	             [            [            [            [           K      sdmmc0-pins         	             Y             Y             Y             Y             Y             Y             Y              Y         sdmmc0ext      sdmmc0ext-clk           	            \      sdmmc0ext-cmd           	             Y      sdmmc0ext-wrprt         	            Y      sdmmc0ext-dectn         	            Y      sdmmc0ext-bus1          	            Y      sdmmc0ext-bus4        @  	            Y            Y            Y            Y      sdmmc0ext-pins          	              Y             Y             Y             Y             Y             Y             Y             Y         sdmmc1     sdmmc1-clk          	            Z      sdmmc1-cmd          	            [      sdmmc1-pwren            	            [      sdmmc1-wrprt            	            [      sdmmc1-dectn            	            [      sdmmc1-bus1         	            [      sdmmc1-bus4       @  	            [            [            [            [      sdmmc1-pins         	             Y             Y             Y             Y             Y             Y             Y             Y             Y         emmc       emmc-clk            	            ]      emmc-cmd            	            ^      emmc-pwren          	            V      emmc-rstnout            	            V      emmc-bus1           	             ^      emmc-bus4         @  	             ^            ^            ^            ^      emmc-bus8           	             ^            ^            ^            ^            ^            ^            ^            ^         pwm0       pwm0-pin            	            V           2         pwm1       pwm1-pin            	            V           3         pwm2       pwm2-pin            	            V           4         pwmir      pwmir-pin           	            V           5         gmac-1     rgmiim1-pins         `  	            Z            \            \            Z            \            \            \      
      \            \            Z      	      Z            \            \            Z            Z             Z             Z             \             Z             Z             Z             Z           O      rmiim1-pins         	            _            ]            _            _            _            _      
      _            _            ]      	      ]             V             V             V             V             V             V         gmac2phy       fephyled-speed10            	             V      fephyled-duplex         	             V      fephyled-rxm1           	            V           R      fephyled-txm1           	            V      fephyled-linkm1         	            V           S         tsadc_pin      tsadc-int           	            V      tsadc-pin           	             V         hdmi_pin       hdmi-cec            	             V           A      hdmi-hpd            	             `           C         cif-0      dvp-d2d9-m0         	            V            V            V            V            V      	      V      
      V            V            V             V            V            V         cif-1      dvp-d2d9-m1         	            V            V            V            V            V            V            V            V            V             V            V            V         button     reset-button-pin            	               V           a         gmac2io    eth-phy-reset-pin           	             `           P         leds       lan-led-pin         	             V           c      sys-led-pin         	              V           d      wan-led-pin         	             V           e         lan    lan-vdd-pin         	             V           i         pmic       pmic-int-l          	             X           *         sd     sdio-vcc-pin            	             X           g            chosen          	serial2:1500000n8         gmac-clock            fixed-clock         bsY@        rgmac_clkin          U               M      keys          
    gpio-keys              a        default    key-reset           
reset           ]   b               
          
   2         leds          
    gpio-leds              c   d   e        default    led-0           ]   f               
nanopi-r2s:green:lan          led-1           ]   b               
nanopi-r2s:red:sys          
*on        led-2           ]   f               
nanopi-r2s:green:wan             sdmmcio-regulator             regulator-gpio           
8        ]   )                  g        default         /vcc_io_sdio          >        d w@        | 2Z        
K          
fvoltage         
u            w@    2Z            
                    sdmmc-regulator           regulator-fixed         
   b                 h        default         /vcc_sd           R        d 2Z        | 2Z        
              L      vdd-5v            regulator-fixed         /vdd_5v           >         R        d LK@        | LK@           +      vdd-5v-lan            regulator-fixed          
8        
   f                  i        default         /vdd_5v_lan           >         R        
   +         	compatible interrupt-parent #address-cells #size-cells model serial0 serial1 serial2 i2c0 i2c1 i2c2 i2c3 ethernet0 ethernet1 mmc0 device_type reg clocks #cooling-cells cpu-idle-states dynamic-power-coefficient enable-method next-level-cache operating-points-v2 cpu-supply phandle entry-method local-timer-stop arm,psci-suspend-param entry-latency-us exit-latency-us min-residency-us cache-level cache-unified opp-shared opp-hz opp-microvolt clock-latency-ns opp-suspend simple-audio-card,format simple-audio-card,mclk-fs simple-audio-card,name status sound-dai interrupts interrupt-affinity ports #clock-cells clock-frequency clock-output-names clock-names dmas dma-names #sound-dai-cells pinctrl-names pinctrl-0 pinctrl-1 pmuio-supply vccio1-supply vccio2-supply vccio3-supply vccio4-supply vccio5-supply vccio6-supply gpio-controller #gpio-cells #power-domain-cells offset mode-normal mode-recovery mode-bootloader mode-loader reg-io-width reg-shift rockchip,system-power-controller wakeup-source vcc1-supply vcc2-supply vcc3-supply vcc4-supply vcc5-supply vcc6-supply regulator-name regulator-always-on regulator-boot-on regulator-min-microvolt regulator-max-microvolt regulator-ramp-delay regulator-on-in-suspend regulator-suspend-microvolt #pwm-cells arm,pl330-periph-burst #dma-cells polling-delay-passive polling-delay sustainable-power thermal-sensors temperature hysteresis trip cooling-device contribution assigned-clocks assigned-clock-rates pinctrl-2 resets reset-names rockchip,grf rockchip,hw-tshut-temp #thermal-sensor-cells rockchip,hw-tshut-mode rockchip,hw-tshut-polarity rockchip,efuse-size bits #io-channel-cells interrupt-names #iommu-cells iommus power-domains remote-endpoint phys phy-names nvmem-cells nvmem-cell-names #phy-cells #reset-cells assigned-clock-parents fifo-depth max-frequency bus-width cap-sd-highspeed disable-wp sd-uhs-sdr12 sd-uhs-sdr25 sd-uhs-sdr50 sd-uhs-sdr104 vmmc-supply vqmmc-supply snps,txpbl clock_in_out phy-handle phy-mode phy-supply rx_delay snps,aal tx_delay motorcomm,clk-out-frequency-hz motorcomm,keep-pll-enabled motorcomm,auto-sleep-disabled reset-assert-us reset-deassert-us reset-gpios phy-is-integrated dr_mode g-np-tx-fifo-size g-rx-fifo-size g-tx-fifo-size phy_type snps,dis-del-phy-power-chg-quirk snps,dis_enblslpm_quirk snps,dis-tx-ipgap-linecheck-quirk snps,dis-u2-freeclk-exists-quirk snps,dis_u2_susphy_quirk snps,dis_u3_susphy_quirk #interrupt-cells interrupt-controller ranges bias-pull-up bias-pull-down bias-disable drive-strength output-high output-low input-enable rockchip,pins stdout-path label linux,code debounce-interval default-state enable-active-high regulator-settling-time-us regulator-type startup-delay-us vin-supply gpio 