     8  `   (            "  (                                               $     $                       ,            8                FSony Xperia XZ1           Lsony,xperia-poplar qcom,msm8998          Whandset    chosen        memory@80000000          dmemory           p                     reserved-memory                      ,             t   memory@85800000          p          p            {      memory@85e00000          p                       {      smem-mem@86000000            p                         {                  memory@86200000          p                       {      memory@88f00000          Lqcom,rmtfs-mem           p                        {                              memory@8ab00000          p           p            {      memory@8b200000          p                       {                  memory@8cc00000          p                       {            /      memory@93c00000          p           P            {      memory@94100000          p                        {            .      memory@94300000          p    0                   {            6      memory@95200000          p                        {      memory@95210000          p    !        P           {      memory@95600000          p    `                   {      memory@95700000          p    p                   {                  mpss-metadata                                          @           {            0      memory@9d400000          p    @      @            {      memory@f6400000          Lshared-dma-pool          p    @                    {      memory@fe000000          p                        {      memory@fe800000          p          @            {      ramoops@ffc00000             Lramoops          p                                                                                  clocks     xo-board             Lfixed-clock                       $       	  
xo_board          sleep-clk            Lfixed-clock                                     !      divclk1          Lgpio-gate-clock                    'default         5      .                     <                   cpus                         ,       cpu@0            dcpu          Lqcom,kryo280             p                Ipsci            W           j              z                  l2-cache             Lcache                                            cpu@1            dcpu          Lqcom,kryo280             p               Ipsci            W           j              z                     cpu@2            dcpu          Lqcom,kryo280             p               Ipsci            W           j              z                     cpu@3            dcpu          Lqcom,kryo280             p               Ipsci            W           j              z                     cpu@100          dcpu          Lqcom,kryo280             p               Ipsci            W           j      	        z   
               l2-cache             Lcache                                   
         cpu@101          dcpu          Lqcom,kryo280             p              Ipsci            W           j      	        z   
                  cpu@102          dcpu          Lqcom,kryo280             p              Ipsci            W           j      	        z   
                  cpu@103          dcpu          Lqcom,kryo280             p              Ipsci            W           j      	        z   
                  cpu-map    cluster0       core0                    core1                    core2                    core3                       cluster1       core0                    core1                    core2                    core3                          idle-states         psci       cpu-sleep-0-0            Larm,idle-state          little-retention                          Q           V                            cpu-sleep-0-1            Larm,idle-state          little-power-collapse           @            .                    #                           cpu-sleep-1-0            Larm,idle-state          big-retention                         O           R                            cpu-sleep-1-1            Larm,idle-state          big-power-collapse          @                                $                     	            firmware       scm          Lqcom,scm-msm8998 qcom,scm            psci             Larm,psci-1.0            Psmc       rpm-glink            Lqcom,glink-rpm                             +           <          rpm-requests             Lqcom,rpm-msm8998            Crpm_requests       clock-controller             Lqcom,rpmcc-msm8998 qcom,rpmcc                                 power-controller             Lqcom,msm8998-rpmpd          W           k               -   opp-table            Loperating-points-v2                opp1                     opp2                      opp3               0      opp4               @      opp5                     opp6                     opp7                     opp8              @      opp9                    opp10                          regulators-0             Lqcom,rpm-pm8998-regulators                                                                                                                                   %           4           C           U           j           |                                                                                                   *           9      s3          N @        f @                  s4          N w@        f w@        ~                            s5          N         f                   s7          N         f                   l1          N m        f m        ~                      &      l2          N O        f O        ~  1                     '      l3          N B@        f B@      l5          N 5         f 5       l6          N w@        f w@      l7          N w@        f w@            i      l8          N O        f O      l9          N         f -*      l10         N         f -*      l11         N B@        f B@      l12         N w@        f w@            `      l13         N         f -*                     c      l14         N 2        f R         ~  }                l15         N w@        f w@      l16         N )B        f )B      l17         N         f             j      l18         N +u         f +u       l19         N )#@        f )B      l20         N -*        f -*        ~  '               l21         N -*        f -*        ~ 5                      b      l22         N )#@        f )#@      l23         N 2        f 2      l24         N /        f /            a      l25         N /]         f 2            k      l26         N O        f O               l28         N -        f -            w      lvs1                      lvs2                5         regulators-1             Lqcom,rpm-pmi8998-regulators               bob         N 2        f 6                           smem          
   Lqcom,smem                                  smp2p-lpass          Lqcom,smp2p                                         <      
                          master-kernel           master-kernel                                slave-kernel            slave-kernel             "        7                        smp2p-mpss           Lqcom,smp2p                                        <                                master-kernel           master-kernel                          +      slave-kernel            slave-kernel             "        7               *         smp2p-slpi           Lqcom,smp2p                                         <                                master-kernel           master-kernel                          7      slave-kernel            slave-kernel             "        7               4         thermal-zones      cpu0-thermal            H           ^          l         trips      trip-point0         | $                   _passive       cpu-crit            |                 	   _critical                cpu1-thermal            H           ^          l         trips      trip-point0         | $                   _passive       cpu-crit            |                 	   _critical                cpu2-thermal            H           ^          l         trips      trip-point0         | $                   _passive       cpu-crit            |                 	   _critical                cpu3-thermal            H           ^          l         trips      trip-point0         | $                   _passive       cpu-crit            |                 	   _critical                cpu4-thermal            H           ^          l         trips      trip-point0         | $                   _passive       cpu-crit            |                 	   _critical                cpu5-thermal            H           ^          l         trips      trip-point0         | $                   _passive       cpu-crit            |                 	   _critical                cpu6-thermal            H           ^          l      	   trips      trip-point0         | $                   _passive       cpu-crit            |                 	   _critical                cpu7-thermal            H           ^          l      
   trips      trip-point0         | $                   _passive       cpu-crit            |                 	   _critical                gpu-bottom-thermal          H           ^          l         trips      trip-point0         | _                   _hot             gpu-top-thermal         H           ^          l         trips      trip-point0         | _                   _hot             clust0-mhm-thermal          H           ^          l         trips      trip-point0         | _                   _hot             clust1-mhm-thermal          H           ^          l         trips      trip-point0         | _                   _hot             cluster1-l2-thermal         H           ^          l         trips      trip-point0         | _                   _hot             modem-thermal           H           ^          l         trips      trip-point0         | _                   _hot             mem-thermal         H           ^          l         trips      trip-point0         | _                   _hot             wlan-thermal            H           ^          l         trips      trip-point0         | _                   _hot             q6-dsp-thermal          H           ^          l         trips      trip-point0         | _                   _hot             camera-thermal          H           ^          l         trips      trip-point0         | _                   _hot             multimedia-thermal          H           ^          l         trips      trip-point0         | _                   _hot             pm8998-thermal          H           ^          l       trips      pm8998-alert0           | (                   _passive       pm8998-crit         | H                	   _critical                   timer            Larm,armv8-timer       0                                              soc@0                        ,            t                     Lsimple-bus     clock-controller@100000          Lqcom,gcc-msm8998                                   W            p              xo sleep_clk            5          !                             #      sram@778000          Lqcom,rpm-msg-ram             p w   p                   qfprom@784000             Lqcom,msm8998-qfprom qcom,qfprom          p x@   b                     ,      hstx-trim@23a            p  :                              _         thermal@10ab000       !   Lqcom,msm8998-tsens qcom,tsens-v2             p
    
                                                  uplow critical                               thermal@10ae000       !   Lqcom,msm8998-tsens qcom,tsens-v2             p
    
                                                   uplow critical                               iommu@1680000         "   Lqcom,msm8998-smmu-v2 qcom,smmu-v2            ph                                  H         l         m         n         o         p         q               $      iommu@16c0000         "   Lqcom,msm8998-smmu-v2 qcom,smmu-v2            pl                                  x         u         v         w         x         y         z                                                         pci@1c00000       $   Lqcom,pcie-msm8998 qcom,pcie-msm8996           p                             parf dbi elbi config             dpci                      1                            ,           ;           E   "        Jpciephy       	  Tdisabled          0   t                            0  0                 7                             msi         [                       n                                                                                                                                      (  5   #   ^   #   [   #   \   #   ]   #   _      "  pipe aux cfg bus_master bus_slave           |   #                  $                %   #         phy@1c06000          Lqcom,msm8998-qmp-pcie-phy            p`                        ,         	  Tdisabled              t        5   #   `   #   \   #           aux cfg_ahb ref            #   L   #   N        phy common             &           '   phy@1c06800          pb   (d   h                       5   #   ^        pipe0           
pcie_0_pipe_clk_src                          "         ufshc@1da4000         ,   Lqcom,msm8998-ufshc qcom,ufshc jedec,ufs-2.0          p@   %                	           E   (        Jufsphy                     |   #         	  Tdisabled                     n  core_clk bus_aggr_clk iface_clk core_clk_unipro ref_clk tx_lane0_sync_clk rx_lane0_sync_clk rx_lane1_sync_clk         @  5   #   m   #      #   l   #   s      P   #   r   #   p   #   q      @                   <4`р                                           #           rst             )      phy@1da7000          Lqcom,msm8998-qmp-ufs-phy             pp                        ,         	  Tdisabled              t        ref ref_aux         5   #      #   o        ufsphy             )       phy@1da7400       (   pt   (v   |   x   (z                           (         hwlock@1f40000           Lqcom,tcsr-mutex          p                                   syscon@1f60000           Lqcom,msm8998-tcsr syscon             p                 ,      pinctrl@3400000          Lqcom,msm8998-pinctrl             p@                                   %                            *            "        7           6          Q        "  K    DEBUG_UART_TX DEBUG_UART_RX CAMSENSOR_I2C_SDA CAMSENSOR_I2C_SCL NC NC MDP_VSYNC_P RGBC_IR_INT NFC_VEN CAM_MCLK0 CAM_MCLK1 NC NC CCI_I2C_SDA0 CCI_I2C_SCL0 CCI_I2C_SDA1 CCI_I2C_SCL1 MAIN_CAM_PWR_EN TOF_INT_N NC NC CHAT_CAM_PWR_EN NC TOF_RESET_N CAM2_RSTN NC CAM1_RSTN NC NC NC NC NC NC NC CC_DIR UIM2_DETECT_EN FP_RESET_N NC NC NC NC BT_HCI_UART_TXD BT_HCI_UART_RXD BT_HCI_UART_CTS_N BT_HCI_UART_RFR_N NC NC NC NC CODEC_INT2_N CODEC_INT1_N APPS_I2C_SDA APPS_I2C_SCL FORCED_USB_BOOT NC NC NC NC NC TRAY2_DET_DS CODEC_RST_N WSA_L_EN WSA_R_EN NC NC NC LPASS_SLIMBUS_CLK LPASS_SLIMBUS_DATA0 LPASS_SLIMBUS_DATA1 BT_FM_SLIMBUS_DATA BT_FM_SLIMBUS_CLK NC RF_LCD_ID_EN NC NC NC NC SW_SERVICE TX_GTR_THRES_IN HW_ID0 HW_ID1 NC NC TS_I2C_SDA TS_I2C_SCL TS_RESET_N NC NC NFC_IRQ NFC_DWLD_EN DISP_RESET_N TRAY2_DET CAM_SOF RFFE6_CLK RFFE6_DATA DEBUG_GPIO0 DEBUG_GPIO1 GRFC4 NC NC RSVD UIM2_DATA UIM2_CLK UIM2_RESET UIM2_PRESENT UIM1_DATA UIM1_CLK UIM1_RST UIM1_PRESENT UIM_BATT_ALARM RSVD NC NC ACCEL_INT GYRO_INT COMPASS_INT ALS_PROX_INT_N FP_INT_N NC BAROMETER_INT ACC_COVER_OPEN TS_INT_N NC NC USB_DETECT_EN NC QLINK_REQUEST QLINK_ENABLE NC NC WMSS_RESET_N PA_INDICATOR_OR NC RFFE3_DATA RFFE3_CLK RFFE4_DATA RFFE4_CLK RFFE5_DATA RFFE5_CLK GNSS_EN MSS_LTE_COXM_TXD MSS_LTE_COXM_RXD RFFE2_DATA RFFE2_CLK RFFE1_DATA RFFE1_CLK               %   sdc2-on-state               d   clk-pins          	  [sdc2_clk            `            o      cmd-pins          	  [sdc2_cmd            `   
         |      data-pins         
  [sdc2_data           `   
         |         sdc2-off-state              f   clk-pins          	  [sdc2_clk            `            o      cmd-pins          	  [sdc2_cmd            `            |      data-pins         
  [sdc2_data           `            |         sdc2-cd-state           [gpio95          gpio             |        `               e      blsp1-uart3-on-state                h   tx-pins         [gpio45          blsp_uart3_a            `            o      rx-pins         [gpio46          blsp_uart3_a            `            o      cts-pins            [gpio47          blsp_uart3_a            `            o      rfr-pins            [gpio48          blsp_uart3_a            `            o         blsp1-i2c1-default-state            [gpio2 gpio3       
  blsp_i2c1           `            o            l      blsp1-i2c1-sleep-state-state            [gpio2 gpio3       
  blsp_i2c1           `            |            m      blsp1-i2c2-default-state            [gpio32 gpio33         
  blsp_i2c2           `            o            n      blsp1-i2c2-sleep-state-state            [gpio32 gpio33         
  blsp_i2c2           `            |            o      blsp1-i2c3-default-state            [gpio47 gpio48         
  blsp_i2c3           `            o            p      blsp1-i2c3-sleep-state          [gpio47 gpio48         
  blsp_i2c3           `            |            q      blsp1-i2c4-default-state            [gpio10 gpio11         
  blsp_i2c4           `            o            r      blsp1-i2c4-sleep-state          [gpio10 gpio11         
  blsp_i2c4           `            |            s      blsp1-i2c5-default-state            [gpio87 gpio88         
  blsp_i2c5           `            o            t      blsp1-i2c5-sleep-state          [gpio87 gpio88         
  blsp_i2c5           `            |         o            u      blsp1-i2c6-default-state            [gpio43 gpio44         
  blsp_i2c6           `            o            y      blsp1-i2c6-sleep-state          [gpio43 gpio44         
  blsp_i2c6           `            |            z      blsp1-spi-b-default-state           [gpio23 gpio28           blsp1_spi_b         `            o      blsp1-spi1-default-state            [gpio0 gpio1 gpio2 gpio3       
  blsp_spi1           `            o            {      blsp1-spi2-default-state            [gpio31 gpio34 gpio32 gpio33       
  blsp_spi2           `            o            |      blsp1-spi3-default-state            [gpio45 gpio46 gpio47 gpio48       
  blsp_spi2           `            o            }      blsp1-spi4-default-state            [gpio8 gpio9 gpio10 gpio11         
  blsp_spi4           `            o            ~      blsp1-spi5-default-state            [gpio85 gpio86 gpio87 gpio88       
  blsp_spi5           `            o                  blsp1-spi6-default-state            [gpio41 gpio42 gpio43 gpio44       
  blsp_spi6           `            o                  blsp2-i2c1-default-state            [gpio55 gpio56         
  blsp_i2c7           `            o                  blsp2-i2c1-sleep-state          [gpio55 gpio56         
  blsp_i2c7           `            |                  blsp2-i2c2-default-state            [gpio6 gpio7       
  blsp_i2c8           `            o                  blsp2-i2c2-sleep-state          [gpio6 gpio7       
  blsp_i2c8           `            |                  blsp2-i2c3-default-state            [gpio51 gpio52         
  blsp_i2c9           `            o                  blsp2-i2c3-sleep-state          [gpio51 gpio52         
  blsp_i2c9           `            |                  blsp2-i2c4-default-state            [gpio67 gpio68           blsp_i2c10          `            o                  blsp2-i2c4-sleep-state          [gpio67 gpio68           blsp_i2c10          `            |                  blsp2-i2c5-default-state            [gpio60 gpio61           blsp_i2c11          `            o                  blsp2-i2c5-sleep-state          [gpio60 gpio61           blsp_i2c11          `            |                  blsp2-i2c6-default-state            [gpio83 gpio84           blsp_i2c12          `            o                  blsp2-i2c6-sleep-state          [gpio83 gpio84           blsp_i2c12          `            |                  blsp2-spi1-default-state            [gpio53 gpio54 gpio55 gpio56       
  blsp_spi7           `            o                  blsp2-spi2-default-state            [gpio4 gpio5 gpio6 gpio7       
  blsp_spi8           `            o                  blsp2-spi3-default-state            [gpio49 gpio50 gpio51 gpio52       
  blsp_spi9           `            o                  blsp2-spi4-default-state            [gpio65 gpio66 gpio67 gpio68         blsp_spi10          `            o                  blsp2-spi5-default-state            [gpio58 gpio59 gpio60 gpio61         blsp_spi11          `            o                  blsp2-spi6-default-state            [gpio81 gpio82 gpio83 gpio84         blsp_spi12          `            o                  mdp-vsync-p-state           [gpio10          mdp_vsync_a         `                  nfc-ven-state           [gpio12          gpio             o        `                  cam-mclk0-active-state          [gpio13        	  cam_mclk            `            o      cam-mclk1-active-state          [gpio14        	  cam_mclk            `            o      cci0-default-state          [gpio18 gpio19           cci_i2c          o        `         cci1-default-state          [gpio19 gpio20           cci_i2c          o        `         main-cam-pwr-en-default-state           [gpio21          gpio             o        `                     tof-int-n-state         [gpio22          gpio             |        `                     chat-cam-pwr-en-default-state           [gpio25          gpio             o        `                     tof-reset-state         [gpio27          gpio             o        `                     cc-dir-active-state         [gpio38          gpio             o        `                     acc-cover-open-state            [gpio124         gpio             o        `                     ts-int-n-state          [gpio125         gpio            `            |            v      usb-detect-en-active-state          [gpio128         gpio             o        `                              ts-vddio-en-default-state           [gpio133         gpio             o        `                                 remoteproc@4080000           Lqcom,msm8998-mss-pil             p                 
  qdsp6 rmb         L                 *          *         *         *         *            0  wdog fatal ready handover stop-ack shutdown-ack       @  5   #      #   $   #      #      #      #                      2  iface bus mem gpll0_mss snoc_axi mnoc_axi qdss xo              +            stop               #   l        mss_restart            ,  0   P   @         |   -       -           cx mx         	  Tdisabled       mba            .      mpss               /      metadata               0      glink-edge                            	modem                      <               gpu@5000000          Lqcom,adreno-540.1 qcom,adreno            p              kgsl_3d0_reg_memory       0  5   #   M   1      #      #   K   1      1         )  iface rbbmtimer mem mem_iface rbcpr core                   ,              2            k   3        |   -         	  Tdisabled       opp-table            Loperating-points-v2             3   opp-710000097               *Q                           opp-670000048               'c          @                 opp-596000097               #=a                            opp-515000097               G!                            opp-414000000               #                            opp-342000000               b           @                 opp-257000000               Q@           0                       iommu@5040000         "   Lqcom,msm8998-smmu-v2 qcom,smmu-v2            p             5   #   M   #      #   K        iface mem mem_iface                              $         I         J         K           |   1         	  Tdisabled                2      clock-controller@5065000             Lqcom,msm8998-gpucc                                 W            pP            5          #         	  xo gpll0                1      remoteproc@5800000           Lqcom,msm8998-slpi-pas            p    @@      @                 4          4         4         4            #  wdog fatal ready handover stop-ack          .   5        5             @      
  xo aggre2              6           7            stop            |   -           ssc_cx        	  Tdisabled       glink-edge                             	dsps                       <               stm@6002000           Larm,coresight-stm arm,primecell          p      (             stm-base stm-stimulus-base        	  Tdisabled            5            	        apb_pclk atclk     out-ports      port       endpoint            8   8            :               funnel@6041000        +   Larm,coresight-dynamic-funnel arm,primecell           p          	  Tdisabled            5            	        apb_pclk atclk     out-ports      port       endpoint            8   9            >            in-ports                         ,       port@7           p      endpoint            8   :            8               funnel@6042000        +   Larm,coresight-dynamic-funnel arm,primecell           p           	  Tdisabled            5            	        apb_pclk atclk     out-ports      port       endpoint            8   ;            ?            in-ports                         ,       port@6           p      endpoint            8   <            R               funnel@6045000        +   Larm,coresight-dynamic-funnel arm,primecell           pP          	  Tdisabled            5            	        apb_pclk atclk     out-ports      port       endpoint            8   =            C            in-ports                         ,       port@0           p       endpoint            8   >            9         port@1           p      endpoint            8   ?            ;               replicator@6046000        /   Larm,coresight-dynamic-replicator arm,primecell           p`          	  Tdisabled            5            	        apb_pclk atclk     out-ports      port       endpoint            8   @            D            in-ports       port       endpoint            8   A            B               etf@6047000           Larm,coresight-tmc arm,primecell          pp          	  Tdisabled            5            	        apb_pclk atclk     out-ports      port       endpoint            8   B            A            in-ports       port       endpoint            8   C            =               etr@6048000           Larm,coresight-tmc arm,primecell          p          	  Tdisabled            5            	        apb_pclk atclk           H   in-ports       port       endpoint            8   D            @               etm@7840000       "   Larm,coresight-etm4x arm,primecell            p           	  Tdisabled            5            	        apb_pclk atclk                out-ports      port       endpoint            8   E            J               etm@7940000       "   Larm,coresight-etm4x arm,primecell            p           	  Tdisabled            5            	        apb_pclk atclk                out-ports      port       endpoint            8   F            K               etm@7a40000       "   Larm,coresight-etm4x arm,primecell            p           	  Tdisabled            5            	        apb_pclk atclk                out-ports      port       endpoint            8   G            L               etm@7b40000       "   Larm,coresight-etm4x arm,primecell            p           	  Tdisabled            5            	        apb_pclk atclk                out-ports      port       endpoint            8   H            M               funnel@7b60000        "   Larm,coresight-etm4x arm,primecell            p           	  Tdisabled            5            	        apb_pclk atclk     out-ports      port       endpoint            8   I            S            in-ports                         ,       port@0           p       endpoint            8   J            E         port@1           p      endpoint            8   K            F         port@2           p      endpoint            8   L            G         port@3           p      endpoint            8   M            H         port@4           p      endpoint            8   N            T         port@5           p      endpoint            8   O            U         port@6           p      endpoint            8   P            V         port@7           p      endpoint            8   Q            W               funnel@7b70000        +   Larm,coresight-dynamic-funnel arm,primecell           p           	  Tdisabled            5            	        apb_pclk atclk     out-ports      port       endpoint            8   R            <            in-ports       port       endpoint            8   S            I               etm@7c40000       "   Larm,coresight-etm4x arm,primecell            p           	  Tdisabled            5            	        apb_pclk atclk                port       endpoint            8   T            N            etm@7d40000       "   Larm,coresight-etm4x arm,primecell            p           	  Tdisabled            5            	        apb_pclk atclk                port       endpoint            8   U            O            etm@7e40000       "   Larm,coresight-etm4x arm,primecell            p           	  Tdisabled            5            	        apb_pclk atclk                port       endpoint            8   V            P            etm@7f40000       "   Larm,coresight-etm4x arm,primecell            p           	  Tdisabled            5            	        apb_pclk atclk                port       endpoint            8   W            Q            sram@290000          Lqcom,rpm-stats           p )           spmi@800f000             Lqcom,spmi-pmic-arb        (   p     @     	@     
@   "      0         core chnls obsrvr intr cnfg         periph_irq                 F           [            c                         ,             "        7      pmic@4           Lqcom,pm8005 qcom,spmi-pmic           p                            ,       gpio@c000             Lqcom,pm8005-gpio qcom,spmi-gpio          p                       X                   *            "        7           KNC NC SLB OPTION_1_PM8005               X         pmic@5           Lqcom,pm8005 qcom,spmi-pmic           p                            ,       regulators           Lqcom,pm8005-regulators     s1          N         f          p                       pmic@0           Lqcom,pm8998 qcom,spmi-pmic           p                             ,       pon@800          Lqcom,pm8998-pon          p                            pwrkey           Lqcom,pm8941-pwrkey                                   =	         |           t      resin            Lqcom,pm8941-resin                                   =	         |        Tokay               s         temp-alarm@2400          Lqcom,spmi-temp-alarm             p  $                 $                  Y           thermal                                charger@2800          *   Lqcom,pm8998-coincell qcom,pm8941-coincell            p  (       	  Tdisabled          adc@3100             Lqcom,spmi-adc-rev2           p  1                 1                            ,                           Y   adc-chan@6           p         	  	die_temp             adc-tm@3400          Lqcom,spmi-adc-tm-hc          p  4                 4                                       ,          	  Tdisabled          rtc@6000             Lqcom,pm8941-rtc          p  `   a       
  rtc alarm                   a            gpio@c000             Lqcom,pm8998-gpio qcom,spmi-gpio          p                                          *            "        7          KUIM_BATT_ALARM NC WLAN_SW_CTRL (DISALLOWED) SSC_PWR_EN VOL_DOWN_N VOL_UP_N SNAPSHOT_N FOCUS_N FLASH_THERM    DIV_CLK1 NC NC (DISALLOWED) DIV_CLK3 NC NC NC NC (DISALLOWED) NFC_CLK_REQ NC (DISALLOWED) WCSS_PWR_REQ OPTION_1 (DISALLOWED) OPTION_2 (DISALLOWED) PM_SLB (DISALLOWED)                vol-down-n-state            [gpio5           normal           |         	        	                      focus-n-state           [gpio7           normal           |         	        	                      snapshot-n-state            [gpio8           normal           |         	        	                      div-clk1-state          [gpio13          func2           	"                            pmic@1           Lqcom,pm8998 qcom,spmi-pmic           p                            ,          pmic@2           Lqcom,pmi8998 qcom,spmi-pmic          p                            ,       charger@1000             Lqcom,pmi8998-charger             p         @                                                         -  usb-plugin bat-ov wdog-bark usbin-icl-change               Z      Z           usbin_i usbin_v       	  Tdisabled          gpio@c000         !   Lqcom,pmi8998-gpio qcom,spmi-gpio             p                       [                   *            "        7         l  KMAIN_CAM_PWR_IO_EN NC NC TYPEC_UUSB_SEL VIB_LDO_EN NC DISPLAY_TYPE_SEL NC NC NC NC DIV_CLK3 SPMI_I2C_SEL NC             [   main-cam-pwr-io-en-state            [gpio1           normal           o         	/                 	           	"                     vib-ldo-en-state            [gpio5           normal           o         	/                 	            	"                         adc@4500             Lqcom,pmi8998-rradc           p  E                        Z         pmic@3           Lqcom,pmi8998 qcom,spmi-pmic          p                            ,       labibb           Lqcom,pmi8998-lab-ibb       ibb                                            sc-err ocp          	? 5         	V 5         p            	m         	        	           	  X        	           	        
  ,        N Us         f Us       lab                                            sc-err ocp          	? @        	V @        p           	m         	        	           	  P        	           	        N Us         f Us         
)            pwm          Lqcom,pmi8998-lpg                         ,            
<         	  Tdisabled          led-controller@d300       +   Lqcom,pmi8998-flash-led qcom,spmi-flash-led           p         	  Tdisabled          leds@d800            Lqcom,pmi8998-wled            p                                              
  ovp short         
  	backlight         	  Tdisabled                usb@a8f8800          Lqcom,msm8998-dwc3 qcom,dwc3          p
            Tokay                         ,             t      (  5   #   G   #   t   #       #   v   #   u      #  cfg_noc core iface sleep mock_utmi          
G   #   u   #   t        
W$ '                [                     hs_phy_irq ss_phy_irq           |   #              #      usb@a800000       
   Lsnps,dwc3            p
                                 
l         
        E   \   ]        Jusb2-phy usb3-phy            
        
           
peripheral          
   ^         phy@c010000          Lqcom,msm8998-qmp-usb3-phy            p            Tokay                         ,             t        5   #   w   #   y   #           aux cfg_ahb ref            #   E   #   F        phy common             &           '   phy@c010200       (   p   (          (                                     5   #   x        pipe0           
usb3_phy_pipe_clk_src               ]         phy@c012000          Lqcom,msm8998-qusb2-phy           p            Tokay                        5   #   y   #           cfg_ahb ref            #   j        
   _           `        
   a            \      mmc@c0a4900       %   Lqcom,msm8998-sdhci qcom,sdhci-msm-v4             p
I   
@            hc core                 }                     hc_irq pwr_irq          iface core xo           5   #   e   #   f               
           Tokay                %   _            	   b           c        'default sleep              d   e        "   f   e      dma-controller@c144000           Lqcom,bam-v1.7.0          p@  P                            5   #   %        bam_clk         ,           [             7        P           ]               g      serial@c171000        %   Lqcom,msm-uartdm-v1.4 qcom,msm-uartdm             p                    m           5   #   5   #   %        core iface          j   g      g           otx rx           'default            h        Tokay       bluetooth            Lqcom,wcn3990-bt         y              i           j           k         0         5               i2c@c175000          Lqcom,i2c-qup-v2.2.1          pP                    _           5   #   &   #   %        core iface          j   g      g           otx rx           'default sleep              l        "   m                	  Tdisabled                         ,          i2c@c176000          Lqcom,i2c-qup-v2.2.1          p`                    `           5   #   (   #   %        core iface          j   g      g   	        otx rx           'default sleep              n        "   o                	  Tdisabled                         ,          i2c@c177000          Lqcom,i2c-qup-v2.2.1          pp                    a           5   #   *   #   %        core iface          j   g   
   g           otx rx           'default sleep              p        "   q                	  Tdisabled                         ,          i2c@c178000          Lqcom,i2c-qup-v2.2.1          p                    b           5   #   ,   #   %        core iface          j   g      g           otx rx           'default sleep              r        "   s                	  Tdisabled                         ,          i2c@c179000          Lqcom,i2c-qup-v2.2.1          p                    c           5   #   .   #   %        core iface          j   g      g           otx rx           'default sleep              t        "   u          j        Tokay                         ,       touchscreen@2c           Lsyna,rmi4-i2c            p   ,                     ,               %   }           'default            v           w           x                        rmi4-f01@1           p                    rmi4-f11@11          p           
               i2c@c17a000          Lqcom,i2c-qup-v2.2.1          p                    d           5   #   0   #   %        core iface          j   g      g           otx rx           'default sleep              y        "   z                	  Tdisabled                         ,          spi@c175000          Lqcom,spi-qup-v2.2.1          pP                    _           5   #   '   #   %        core iface          j   g      g           otx rx           'default            {      	  Tdisabled                         ,          spi@c176000          Lqcom,spi-qup-v2.2.1          p`                    `           5   #   )   #   %        core iface          j   g      g   	        otx rx           'default            |      	  Tdisabled                         ,          spi@c177000          Lqcom,spi-qup-v2.2.1          pp                    a           5   #   +   #   %        core iface          j   g   
   g           otx rx           'default            }      	  Tdisabled                         ,          spi@c178000          Lqcom,spi-qup-v2.2.1          p                    b           5   #   -   #   %        core iface          j   g      g           otx rx           'default            ~      	  Tdisabled                         ,          spi@c179000          Lqcom,spi-qup-v2.2.1          p                    c           5   #   /   #   %        core iface          j   g      g           otx rx           'default                  	  Tdisabled                         ,          spi@c17a000          Lqcom,spi-qup-v2.2.1          p                    d           5   #   1   #   %        core iface          j   g      g           otx rx           'default                  	  Tdisabled                         ,          dma-controller@c184000           Lqcom,bam-v1.7.0          p@  P                            5   #   6        bam_clk         ,           [             7        P           ]                     serial@c1b0000        %   Lqcom,msm-uartdm-v1.4 qcom,msm-uartdm             p                     r           5   #   E   #   6        core iface          Tokay          i2c@c1b5000          Lqcom,i2c-qup-v2.2.1          pP                    e           5   #   7   #   6        core iface          j                    otx rx           'default sleep                      "                   	  Tdisabled                         ,          i2c@c1b6000          Lqcom,i2c-qup-v2.2.1          p`                    f           5   #   9   #   6        core iface          j            	        otx rx           'default sleep                      "                     Tokay                         ,       proximity@29             Lst,vl53l0x           p   )             %                          %                         'default                        i2c@c1b7000          Lqcom,i2c-qup-v2.2.1          pp                    g           5   #   ;   #   6        core iface          j      
              otx rx           'default sleep                      "                   	  Tdisabled                         ,          i2c@c1b8000          Lqcom,i2c-qup-v2.2.1          p                    h           5   #   =   #   6        core iface          j                    otx rx           'default sleep                      "                   	  Tdisabled                         ,          i2c@c1b9000          Lqcom,i2c-qup-v2.2.1          p                    i           5   #   ?   #   6        core iface          j                    otx rx           'default sleep                      "                   	  Tdisabled                         ,          i2c@c1ba000          Lqcom,i2c-qup-v2.2.1          p                    j           5   #   A   #   6        core iface          j                    otx rx           'default sleep                      "                   	  Tdisabled                         ,          spi@c1b5000          Lqcom,spi-qup-v2.2.1          pP                    e           5   #   8   #   6        core iface          j                    otx rx           'default                  	  Tdisabled                         ,          spi@c1b6000          Lqcom,spi-qup-v2.2.1          p`                    f           5   #   :   #   6        core iface          j            	        otx rx           'default                  	  Tdisabled                         ,          spi@c1b7000          Lqcom,spi-qup-v2.2.1          pp                    g           5   #   <   #   6        core iface          j      
              otx rx           'default                  	  Tdisabled                         ,          spi@c1b8000          Lqcom,spi-qup-v2.2.1          p                    h           5   #   >   #   6        core iface          j                    otx rx           'default                  	  Tdisabled                         ,          spi@c1b9000          Lqcom,spi-qup-v2.2.1          p                    i           5   #   @   #   6        core iface          j                    otx rx           'default                  	  Tdisabled                         ,          spi@c1ba000          Lqcom,spi-qup-v2.2.1          p                    j           5   #   B   #   6        core iface          j                    otx rx           'default                  	  Tdisabled                         ,          clock-controller@c8c0000             Lqcom,mmcc-msm8998                                  W            p           @  xo gpll0 dsi0dsi dsi0byte dsi1dsi dsi1byte hdmipll dplink dpvco       ,  5          #                                                 iommu@cd00000         "   Lqcom,msm8998-smmu-v2 qcom,smmu-v2            p                        5                          iface-mm iface-smmu bus-smmu                                        
                                                                                                                                                                                         |      	      remoteproc@17300000          Lqcom,msm8998-adsp-pas            p0    @@      @                                                          #  wdog fatal ready handover stop-ack          5               xo                                    stop            |   -            cx        	  Tdisabled       glink-edge                             	lpass                      <      	         mailbox@17911000          <   Lqcom,msm8998-apcs-hmss-global qcom,msm8994-apcs-kpss-global          p            '                     timer@17920000                       ,             t         Larm,armv7-timer-mem          p        frame@17921000          3                                          p               frame@17923000          3                   	            p0          	  Tdisabled          frame@17924000          3                   
            p@          	  Tdisabled          frame@17925000          3                               pP          	  Tdisabled          frame@17926000          3                               p`          	  Tdisabled          frame@17927000          3                               pp          	  Tdisabled          frame@17928000          3                               p          	  Tdisabled             interrupt-controller@17a00000            Larm,gic-v3           p                  7                        ,             t         "        @           W                      	                     wifi@18800000            Lqcom,wcn3990-wifi         	  Tdisabled             p             membase                    5              cxo_ref_clk_pin                                                                                                                                                  l         vbat-regulator           Lregulator-fixed         VBAT            N =	         f =	                         cam0-vdig            Lregulator-fixed       
  cam0_vdig                                   %               'default                  cam1-vdig            Lregulator-fixed       
  cam1_vdig                                   %               'default                             cam-vio-vreg             Lregulator-fixed         cam_vio_vreg                                    [               'default                                         touch-vddio-vreg             Lregulator-fixed         touch_vddio_vreg              '           %               'default                        x      vph-pwr-regulator            Lregulator-fixed         vph_pwr                                     extcon-usb           Llinux,extcon-usb-gpio              %   &               %               'default                           ^      gpio-keys         
   Lgpio-keys           	Side buttons            'default                     button-vol-down         	Volume Down         C                               r                          button-camera-snapshot          	Camera Snapshot         C                                                button-camera-focus         	Camera Focus            C                                                  gpio-hall-sensor          
   Lgpio-keys           	Hall sensors            'default               event-hall-sensor0          	Cover Hall Sensor           C   %   |                                                       vibrator             Lgpio-vibrator           <   [               'default                     	interrupt-parent qcom,msm-id #address-cells #size-cells qcom,board-id model compatible chassis-type device_type reg ranges no-map phandle qcom,client-id qcom,vmid alloc-ranges size record-size console-size ftrace-size pmsg-size ecc-size #clock-cells clock-frequency clock-output-names pinctrl-0 pinctrl-names clocks enable-gpios enable-method capacity-dmips-mhz cpu-idle-states next-level-cache cache-level cache-unified cpu entry-method idle-state-name arm,psci-suspend-param entry-latency-us exit-latency-us min-residency-us local-timer-stop interrupts qcom,rpm-msg-ram mboxes qcom,glink-channels #power-domain-cells operating-points-v2 opp-level vdd_s1-supply vdd_s2-supply vdd_s3-supply vdd_s4-supply vdd_s5-supply vdd_s6-supply vdd_s7-supply vdd_s8-supply vdd_s9-supply vdd_s10-supply vdd_s11-supply vdd_s12-supply vdd_s13-supply vdd_l1_l27-supply vdd_l2_l8_l17-supply vdd_l3_l11-supply vdd_l4_l5-supply vdd_l6-supply vdd_l7_l12_l14_l15-supply vdd_l9-supply vdd_l10_l23_l25-supply vdd_l13_l19_l21-supply vdd_l16_l28-supply vdd_l18_l22-supply vdd_l20_l24-supply vdd_l26-supply vdd_lvs1_lvs2-supply regulator-min-microvolt regulator-max-microvolt regulator-system-load regulator-allow-set-load vdd_bob-supply memory-region hwlocks qcom,smem qcom,local-pid qcom,remote-pid qcom,entry-name #qcom,smem-state-cells interrupt-controller #interrupt-cells polling-delay-passive polling-delay thermal-sensors temperature hysteresis #reset-cells clock-names protected-clocks bits #qcom,sensors interrupt-names #thermal-sensor-cells #iommu-cells #global-interrupts reg-names linux,pci-domain bus-range num-lanes phys phy-names status interrupt-map-mask interrupt-map power-domains iommu-map perst-gpios resets reset-names vdda-phy-supply vdda-pll-supply #phy-cells lanes-per-direction freq-table-hz #hwlock-cells gpio-ranges gpio-controller #gpio-cells gpio-reserved-ranges gpio-line-names pins drive-strength bias-disable bias-pull-up function bias-pull-down output-low interrupts-extended qcom,smem-states qcom,smem-state-names qcom,halt-regs power-domain-names label iommus opp-hz opp-supported-hw px-supply remote-endpoint arm,scatter-gather qcom,ee qcom,channel regulator-enable-ramp-delay regulator-always-on mode-bootloader mode-recovery debounce linux,code io-channels io-channel-names #io-channel-cells input-enable qcom,drive-strength power-source drive-push-pull regulator-min-microamp regulator-max-microamp regulator-over-current-protection regulator-pull-down regulator-ramp-delay regulator-settling-time-up-us regulator-settling-time-down-us regulator-soft-start qcom,discharge-resistor-kohms qcom,soft-start-us #pwm-cells assigned-clocks assigned-clock-rates snps,dis_u2_susphy_quirk snps,dis_enblslpm_quirk snps,has-lpm-erratum snps,hird-threshold dr_mode extcon nvmem-cells vdda-phy-dpdm-supply bus-width cd-gpios vmmc-supply vqmmc-supply pinctrl-1 #dma-cells qcom,controlled-remotely num-channels qcom,num-ees dmas dma-names vddio-supply vddxo-supply vddrf-supply vddch0-supply max-speed vdd-supply vio-supply syna,reset-delay-ms syna,startup-delay-ms syna,nosleep-mode syna,sensor-type reset-gpios #mbox-cells frame-number #redistributor-regions redistributor-stride qcom,snoc-host-cap-8bit-quirk regulator-name regulator-boot-on startup-delay-us enable-active-high gpio vin-supply id-gpio vbus-gpio linux,input-type wakeup-source debounce-interval 