  ~   8  x   (              @                                                                   <   ,Toradex Apalis iMX8QM/QP on Apalis Ixora V1.1 Carrier Board       >   2toradex,apalis-imx8-ixora-v1.1 toradex,apalis-imx8 fsl,imx8qm      aliases          =/bus@5b000000/mmc@5b010000           B/bus@5b000000/mmc@5b020000           G/bus@5b000000/mmc@5b030000           L/bus@5a000000/serial@5a060000            T/bus@5a000000/serial@5a070000            \/bus@5a000000/serial@5a080000            d/bus@5a000000/serial@5a090000             l/vpu@2c000000/vpu-core@2d080000           v/vpu@2c000000/vpu-core@2d090000           /vpu@2c000000/vpu-core@2d0a0000       "   /bus@5a000000/i2c@5a820000/rtc@68            /system-controller/rtc        cpus                                 cpu-map    cluster0       core0                     core1                     core2                     core3                        cluster1       core0                     core1                           cpu@0            cpu          2arm,cortex-a53                            psci                            @                                    @                                       cpu@1            cpu          2arm,cortex-a53                           psci                            @                                    @                                       cpu@2            cpu          2arm,cortex-a53                           psci                            @                                    @                                       cpu@3            cpu          2arm,cortex-a53                           psci                            @                                    @                                       cpu@100          cpu          2arm,cortex-a72                           psci                            @                                    @                      	                 cpu@101          cpu          2arm,cortex-a72                          psci               	                 l2-cache0            2cache           '            3                        @                             l2-cache1            2cache           '            3                        @                       	         interrupt-controller@51a00000            2arm,gic-v3        P       Q             Q             R               R             R                 A            R        g      	                                 pmu          2arm,armv8-pmuv3         g               psci             2arm,psci-1.0             smc       timer            2arm,armv8-timer       0  g                                 
         system-controller            2fsl,imx-scu         rtx0 rx0 gip3          $  }   
           
          
         power-controller             2fsl,imx8qm-scu-pd fsl,scu-pd                                clock-controller             2fsl,imx8qm-clk fsl,scu-clk                        +      pinctrl          2fsl,imx8qm-iomuxc           default       H                                                                   {   adc0grp       0           `         `         `         `           J      adc1grp       0           `         `         `         `           L      cam1gpiosgrp               C      !   D      !   l      !   m      !   n      !   o      !   p      !   q      !   r      !   c      !   j      !   k      !                 dap1gpiosgrp          T     d      !         !   X      !   y      !         !   ~      !   ^      !                 esai0gpiosgrp              h      !   i      !                 fec1grp                                                                                                                                                                           9         3     `           j      fec1-sleepgrp                            @        @        @        @        @        @        @        @        @        @        @        @        @        @        @   9     @   3     @           k      fec2gpiosgrp                             !         !         !        !        !  	      !  
      !        !        !         !        !        !        !                 flexcan0grp                   !          !           N      flexcan1grp                   !          !           P      flexcan2grp                   !          !           R      gpio1grp               	     !      gpio2grp               
     !      gpio3grp                    !                 gpio4grp                    !                 gpio5grp                    !           E      gpio6grp                     !           F      gpio7grp                     !                 gpio8grp                     !                 gpiobklongrp               2      !                 gpiokeysgrp            e   p !      gpiousbhocngrp                  !                 hdmictrlgrp            N      a           |      lpi2c1grp                                        >      lpi2c2grp                                        C      lpi2c3grp                                        H      lpspi0grp         0     u      L   v      L   w      L   x     L           ,      lpspi2grp         0     z      L   {      L   |      L   }     L           0      lpuart0grp                                         3      lpuart1grp        0                                                     5      lpuart1ctrlgrp        0           !         !         !         !                 lpuart2grp             6         7                 7      lpuart3grp        0     <         =                                 9      lvds0i2c0gpiogrp               4      !                 lvds1i2c0gpiosgrp              :      !   ;      !                 mipidsi0-1engrp            5      !                 mipidsi1gpiosgrp               E      !                 mlbgpiosgrp                  !                 mmc1cdgrp              Z      !           ^      mmc1cdsleepgrp             Z     !           b      pciebgrp          $           !         !         !      pciesatarefclkgrp                    !           ~      pciewifirefclkgrp              \      !           }      pwm0grp                              t      pwm1grp                              v      pwm2grp                              x      pwm3grp                              z      pwmbklgrp              8             qspi1agpiosgrp        `           !         !         !         !         !         !         !         !                 resetmocigrp               &      !      sai1grp       0           l         L         L         L      sata1actgrp            Y      !                 sd1cdgrp                     !           f      sgtl5000grp            s      L      sim0gpiosgrp          0            !         !         !         !                 spdif0grp              `      @   _      @      touchctrlgpiosgrp         0     U      !   V      A   b      !   f      A                 touchctrlidlegrp          0           !         !         !         !                 usbh1activegrp                                    usbh1idlegrp                                      usb3503agrp       $     '      A   )      !   *      A           ?      usbhengrp                    !                 usbotg1grp                   !        !           V      usdhc1grp                    A          !          !          !          !          !          !          !          !          !         A          !           Y      usdhc1-100mhzgrp                     @                                                                                                            @                      Z      usdhc1-200mhzgrp                     @                                                                                                            @                      [      usdhc1gpiosgrp                   !                 usdhc2grp4bitgrp          T           A          !          !          !          !          !          !           ]      usdhc2-4bit100mhzgrp          T           @                                                                 !           _      usdhc2-4bit200mhzgrp          T           @                                                                 !           `      usdhc2grp8bitgrp          0            !          !          !          !      usdhc2-8bit100mhzgrp          0                                                    usdhc2-8bit200mhzgrp          0                                                    usdhc2-4bitsleepgrp       T           a         a         a         a         a         a          !           a      usdhc2-8bitsleepgrp       0           a         a         a         a      usdhc3grp         T           A          !          !          !          !          !          !           e      usdhc3-100mhzgrp          T           A          !          !          !          !          !          !           g      usdhc3-200mhzgrp          T           A          !          !          !          !          !          !           h      wifigrp            +     !   H     !      wifipdngrp             L     !                 lpi2c0grp              R     "   S     "           <      ledsixoragrp          0          a        a        a        a                 uart24forceoffgrp                    !                    rtc          2fsl,imx8qxp-sc-rtc           vpu@2c000000                                     ,       ,                   ,                               okay             2nxp,imx8qm-vpu     mailbox@2d000000             2fsl,imx6sx-mu            -              g                                         okay                     mailbox@2d020000             2fsl,imx6sx-mu            -             g                                         okay               !      mailbox@2d040000             2fsl,imx6sx-mu            -             g                                         okay               $      vpu-core@2d080000            -              2nxp,imx8q-vpu-decoder                        rtx0 tx1 rx        $  }                                       okay                         vpu-core@2d090000            -	              2nxp,imx8q-vpu-encoder                        rtx0 tx1 rx        $  }   !           !          !               okay               "   #      vpu-core@2d0a0000            -
              2nxp,imx8q-vpu-encoder                        rtx0 tx1 rx        $  }   $           $          $               okay               %   &         bus@58000000             2simple-bus                                   X       X         clock-img-ipg            2fixed-clock                              img_ipg_clk            )      jpegdec@58400000             X@           0  g      5         6         7         8              '       '           &per ipg         2   '       '           B        (                                 %   2nxp,imx8qm-jpgdec nxp,imx8qxp-jpgdec            okay          jpegenc@58450000             XE           0  g      1         2         3         4              (       (           &per ipg         2   (       (           B        (                                 %   2nxp,imx8qm-jpgenc nxp,imx8qxp-jpgenc            okay          clock-controller@585d0000            2fsl,imx8qxp-lpcg             X]                           )   )        W             0  img_jpeg_dec_lpcg_clk img_jpeg_dec_lpcg_ipg_clk                         '      clock-controller@585f0000            2fsl,imx8qxp-lpcg             X_                           )   )        W             0  img_jpeg_enc_lpcg_clk img_jpeg_enc_lpcg_ipg_clk                         (         bus@5a000000             2simple-bus                                   Z       Z         clock-dma-ipg            2fixed-clock                     '         dma_ipg_clk            :      spi@5a000000             2fsl,imx7ulp-spi          Z                                        g      P                           *       *           &per ipg         2   +   5           B               5        okay            default            ,        e   -            spi@5a010000             2fsl,imx7ulp-spi          Z                                       g      Q                           .       .           &per ipg         2   +   6           B               6      	  disabled          spi@5a020000             2fsl,imx7ulp-spi          Z                                       g      R                           /       /           &per ipg         2   +   7           B               7        okay            default            0        e   -   
         spi@5a030000             2fsl,imx7ulp-spi          Z                                       g      S                           1       1           &per ipg         2   +   8           B               8      	  disabled          serial@5a060000          Z             g                     2      2          	  &ipg baud            2   +   9           BĴ               9        okay          %   2fsl,imx8qm-lpuart fsl,imx8qxp-lpuart            default            3      serial@5a070000          Z             g                     4      4          	  &ipg baud            2   +   :           BĴ               :        okay          %   2fsl,imx8qm-lpuart fsl,imx8qxp-lpuart            default            5      serial@5a080000          Z             g                     6      6          	  &ipg baud            2   +   ;           BĴ               ;        okay          %   2fsl,imx8qm-lpuart fsl,imx8qxp-lpuart            default            7      serial@5a090000          Z	             g                     8      8          	  &ipg baud            2   +   <           BĴ               <        okay          %   2fsl,imx8qm-lpuart fsl,imx8qxp-lpuart            default            9      clock-controller@5a400000            2fsl,imx8qxp-lpcg             Z@                           +   5      :        W                spi0_lpcg_clk spi0_lpcg_ipg_clk               5           *      clock-controller@5a410000            2fsl,imx8qxp-lpcg             ZA                           +   6      :        W                spi1_lpcg_clk spi1_lpcg_ipg_clk               6           .      clock-controller@5a420000            2fsl,imx8qxp-lpcg             ZB                           +   7      :        W                spi2_lpcg_clk spi2_lpcg_ipg_clk               7           /      clock-controller@5a430000            2fsl,imx8qxp-lpcg             ZC                           +   8      :        W                spi3_lpcg_clk spi3_lpcg_ipg_clk               8           1      clock-controller@5a460000            2fsl,imx8qxp-lpcg             ZF                           +   9      :        W             '  uart0_lpcg_baud_clk uart0_lpcg_ipg_clk                9           2      clock-controller@5a470000            2fsl,imx8qxp-lpcg             ZG                           +   :      :        W             '  uart1_lpcg_baud_clk uart1_lpcg_ipg_clk                :           4      clock-controller@5a480000            2fsl,imx8qxp-lpcg             ZH                           +   ;      :        W             '  uart2_lpcg_baud_clk uart2_lpcg_ipg_clk                ;           6      clock-controller@5a490000            2fsl,imx8qxp-lpcg             ZI                           +   <      :        W             '  uart3_lpcg_baud_clk uart3_lpcg_ipg_clk                <           8      i2c@5a800000             Z    @         g                     ;       ;           &per ipg         2   +   `           Bn6               `      	  disabled          #   2fsl,imx8qm-lpi2c fsl,imx7ulp-lpi2c          default            <                                         i2c@5a810000             Z    @         g                     =       =           &per ipg         2   +   a           Bn6               a        okay          #   2fsl,imx8qm-lpi2c fsl,imx7ulp-lpi2c          default            >                                      usb-hub@8            2smsc,usb3503a                       default            ?        n   @              |              A               }x@           A               i2c@5a820000             Z    @         g                     B       B           &per ipg         2   +   b           Bn6               b        okay          #   2fsl,imx8qm-lpi2c fsl,imx7ulp-lpi2c          default            C                                      touch@4a             2atmel,maxtouch              J             D        g              default            E   F           D            	  disabled          rtc@68        	   2st,m41t0                h        okay             i2c@5a830000             Z    @         g                     G       G           &per ipg         2   +   c           Bn6               c        okay          #   2fsl,imx8qm-lpi2c fsl,imx7ulp-lpi2c          default            H                                         adc@5a880000             2nxp,imx8qxp-adc                     Z             g                                  I       I           &per ipg         2   +   e           Bn6               e        okay            default            J      adc@5a890000             2nxp,imx8qxp-adc                     Z             g                                  K       K           &per ipg         2   +   f           Bn6               f        okay            default            L                 can@5a8d0000             2fsl,imx8qm-flexcan           Z             g                                  M      M            &ipg per         2   +   i           BbZ               i                               okay            default            N      can@5a8e0000             2fsl,imx8qm-flexcan           Z             g                                  O      O            &ipg per         2   +   j           BbZ               j                              okay            default            P      can@5a8f0000             2fsl,imx8qm-flexcan           Z             g                                  Q      Q            &ipg per         2   +   k           BbZ               k                            	  disabled            default            R      clock-controller@5ac00000            2fsl,imx8qxp-lpcg             Z                           +   `      :        W                i2c0_lpcg_clk i2c0_lpcg_ipg_clk               `           ;      clock-controller@5ac10000            2fsl,imx8qxp-lpcg             Z                           +   a      :        W                i2c1_lpcg_clk i2c1_lpcg_ipg_clk               a           =      clock-controller@5ac20000            2fsl,imx8qxp-lpcg             Z                           +   b      :        W                i2c2_lpcg_clk i2c2_lpcg_ipg_clk               b           B      clock-controller@5ac30000            2fsl,imx8qxp-lpcg             Z                           +   c      :        W                i2c3_lpcg_clk i2c3_lpcg_ipg_clk               c           G      clock-controller@5ac80000            2fsl,imx8qxp-lpcg             Z                           +   e      :        W                adc0_lpcg_clk adc0_lpcg_ipg_clk               e           I      clock-controller@5ac90000            2fsl,imx8qxp-lpcg             Z                           +   f      :        W                adc1_lpcg_clk adc1_lpcg_ipg_clk               f           K      clock-controller@5acd0000            2fsl,imx8qxp-lpcg             Z                           +   i      :   :        W                5  can0_lpcg_pe_clk can0_lpcg_ipg_clk can0_lpcg_chi_clk                  i           M      clock-controller@5a4a0000            2fsl,imx8qxp-lpcg             ZJ                           +   =      :        W             '  uart4_lpcg_baud_clk uart4_lpcg_ipg_clk                =      clock-controller@5ace0000            2fsl,imx8qxp-lpcg             Z                           +   j      :   :        W                5  can1_lpcg_pe_clk can1_lpcg_ipg_clk can1_lpcg_chi_clk                  j           O      clock-controller@5acf0000            2fsl,imx8qxp-lpcg             Z                           +   k      :   :        W                5  can2_lpcg_pe_clk can2_lpcg_ipg_clk can2_lpcg_chi_clk                  k           Q         bus@5b000000             2simple-bus                                   [       [         clock-conn-axi           2fixed-clock                     CU        conn_axi_clk               q      clock-conn-ahb           2fixed-clock                     	!        conn_ahb_clk               r      clock-conn-ipg           2fixed-clock                             conn_ipg_clk               p      usb@5b0d0000          -   2fsl,imx7ulp-usb fsl,imx6ul-usb fsl,imx27-usb             [                          g                    S           T               U                                                           okay            default            V         0         <         H         `         r      usbmisc@5b0d0200            ~         8   2fsl,imx7ulp-usbmisc fsl,imx7d-usbmisc fsl,imx6q-usbmisc          [               T      usbphy@5b100000          2fsl,imx7ulp-usbphy           [                U                        okay               W           S      mmc@5b010000            g                   [                X      X       X           &ipg ahb per                       okay          3   2fsl,imx8qm-usdhc fsl,imx8qxp-usdhc fsl,imx7d-usdhc        "  default state_100mhz state_200mhz              Y           Z           [                          mmc@5b020000            g                   [                \      \       \           &ipg ahb per                                             okay          3   2fsl,imx8qm-usdhc fsl,imx8qxp-usdhc fsl,imx7d-usdhc        (  default state_100mhz state_200mhz sleep            ]   ^           _   ^           `   ^           a   b                      c   	                  mmc@5b030000            g                   [                d      d       d           &ipg ahb per                     	  disabled          3   2fsl,imx8qm-usdhc fsl,imx8qxp-usdhc fsl,imx7d-usdhc        "  default state_100mhz state_200mhz              e   f           g   f           h   f                      D                     ethernet@5b040000            [           0  g                                                 i      i      i      i            &ipg ahb enet_clk_ref ptp            2   +         +              B沀sY@                                            okay             2fsl,imx8qm-fec fsl,imx6sx-fec           default sleep              j           k         +        <   l        Grgmii-rxid           P   mdio                                 ethernet-phy@7           2ethernet-phy-ieee802.3-c22                           A        g              b            r                         A            
  phy-reset              l            ethernet@5b050000            [           0  g                                                m      m      m      m            &ipg ahb enet_clk_ref ptp            2   +         +              B沀sY@                                          	  disabled             2fsl,imx8qm-fec fsl,imx6sx-fec         usb@5b110000             2fsl,imx8qm-usb3          [                                             (     n      n       n      n      n           &lpm bus aclk ipg core           2   +             B沀                   	  disabled       usb@5b120000          
   2cdns,usb3            [     [     [             xhci dev otg                                                0  g                                            host peripheral otg wakeup             o        cdns3,usb3-phy                   	  disabled             usb-phy@5b160000             2nxp,salvo-phy            [                n           &salvo_phy_clk                                  	  disabled               o      clock-controller@5b200000            2fsl,imx8qxp-lpcg             [                            +         p   q        W                9  sdhc0_lpcg_per_clk sdhc0_lpcg_ipg_clk sdhc0_lpcg_ahb_clk                             X      clock-controller@5b210000            2fsl,imx8qxp-lpcg             [!                           +         p   q        W                9  sdhc1_lpcg_per_clk sdhc1_lpcg_ipg_clk sdhc1_lpcg_ahb_clk                             \      clock-controller@5b220000            2fsl,imx8qxp-lpcg             ["                           +         p   q        W                9  sdhc2_lpcg_per_clk sdhc2_lpcg_ipg_clk sdhc2_lpcg_ahb_clk                             d      clock-controller@5b230000            2fsl,imx8qxp-lpcg             [#                      0     +         +         q   +         p   p        W                           enet0_lpcg_timer_clk enet0_lpcg_txc_sampling_clk enet0_lpcg_ahb_clk enet0_lpcg_rgmii_txc_clk enet0_lpcg_ipg_clk enet0_lpcg_ipg_s_clk                             i      clock-controller@5b240000            2fsl,imx8qxp-lpcg             [$                      0     +         +         q   +         p   p        W                           enet1_lpcg_timer_clk enet1_lpcg_txc_sampling_clk enet1_lpcg_ahb_clk enet1_lpcg_rgmii_txc_clk enet1_lpcg_ipg_clk enet1_lpcg_ipg_s_clk                             m      clock-controller@5b270000            2fsl,imx8qxp-lpcg             ['                           r   p        W            "  usboh3_ahb_clk usboh3_phy_ipg_clk                           U      clock-controller@5b280000            2fsl,imx8qxp-lpcg             [(                        W                         0     +        +        p   p   p   +           M  usb3_app_clk usb3_lpm_clk usb3_ipg_clk usb3_core_pclk usb3_phy_clk usb3_aclk                            n         bus@5d000000             2simple-bus                                    ]       ]                      clock-lsio-mem           2fixed-clock                              lsio_mem_clk          clock-lsio-bus           2fixed-clock                              lsio_bus_clk                     pwm@5d000000             2fsl,imx27-pwm            ]              &ipg per            s      s           2   +              Bn6                    okay            default            t      pwm@5d010000             2fsl,imx27-pwm            ]             &ipg per            u      u           2   +              Bn6                    okay            default            v      pwm@5d020000             2fsl,imx27-pwm            ]             &ipg per            w      w           2   +              Bn6                    okay            default            x      pwm@5d030000             2fsl,imx27-pwm            ]             &ipg per            y      y           2   +              Bn6                    okay            default            z      gpio@5d080000            ]             g                                       R        A                          2fsl,imx8qm-gpio fsl,imx35-gpio        0     {              {            {      $           MXM3_279 MXM3_277 MXM3_135 MXM3_203 MXM3_201 MXM3_275 MXM3_110 MXM3_120 MXM3_1/GPIO1 MXM3_3/GPIO2 MXM3_124 MXM3_122 MXM3_5/GPIO3 MXM3_7/GPIO4   MXM3_4 MXM3_211 MXM3_209 MXM3_2 MXM3_136 MXM3_134 MXM3_6 MXM3_8 MXM3_112 MXM3_118 MXM3_114 MXM3_116            @      gpio@5d090000            ]	             g                                       R        A                          2fsl,imx8qm-gpio fsl,imx35-gpio        @     {       (      {      2      {      ?      {      H         }      MXM3_286  MXM3_87 MXM3_99 MXM3_138 MXM3_140 MXM3_239  MXM3_281 MXM3_283 MXM3_126 MXM3_132     MXM3_173 MXM3_175 MXM3_123               A   hdmi-ctrl-hog           default            |         .        h               7CONNECTOR_IS_HDMI            A         gpio@5d0a0000            ]
             g                                       R        A                          2fsl,imx8qm-gpio fsl,imx35-gpio        0     {       P      {      U      {      h   
               MXM3_198 MXM3_35 MXM3_164     MXM3_217 MXM3_215   MXM3_193 MXM3_194 MXM3_37  MXM3_271 MXM3_273 MXM3_195 MXM3_197 MXM3_177 MXM3_179 MXM3_181 MXM3_183 MXM3_185 MXM3_187           M   e              X              c   pcie-wifi-hog           default            }         .        h               7PCIE_WIFI_CLK            A         gpio@5d0b0000            ]             g                                       R        A                          2fsl,imx8qm-gpio fsl,imx35-gpio             {       r      {      u      {            {            {            {            {            {            {            {            {            {                 MXM3_191  MXM3_221 MXM3_225 MXM3_223 MXM3_227 MXM3_200 MXM3_235 MXM3_231 MXM3_229 MXM3_233 MXM3_204 MXM3_196  MXM3_202    MXM3_305 MXM3_307 MXM3_309 MXM3_311 MXM3_315 MXM3_317 MXM3_319 MXM3_321 MXM3_15/GPIO7 MXM3_63 MXM3_17/GPIO8 MXM3_12 MXM3_14 MXM3_16              -      gpio@5d0c0000            ]             g                                       R        A                          2fsl,imx8qm-gpio fsl,imx35-gpio        `     {             {            {            {            {            {                 MXM3_18 MXM3_11/GPIO5 MXM3_13/GPIO6 MXM3_274 MXM3_84 MXM3_262 MXM3_96      MXM3_190    MXM3_269 MXM3_251 MXM3_253 MXM3_295 MXM3_299 MXM3_301 MXM3_297 MXM3_293 MXM3_291 MXM3_289 MXM3_287              D   pcie-sata-hog           default            ~         .        h               7PCIE_SATA_CLK            A         gpio@5d0d0000            ]             g                                       R        A                          2fsl,imx8qm-gpio fsl,imx35-gpio             {             {            {            {            {            {            {            {              /  gpio5-00 gpio5-01 gpio5-02 gpio5-03 gpio5-04 gpio5-05 gpio5-06 gpio5-07 gpio5-08 gpio5-09 gpio5-10 gpio5-11 gpio5-12 gpio5-13 gpio5-14 gpio5-15 gpio5-16 gpio5-17 gpio5-18 gpio5-19 LED-5-GREEN LED-5-RED gpio5-22 gpio5-23 gpio5-24 UART24-FORCEOFF gpio5-26 LED-4-GREEN gpio5-28 LED-4-RED gpio5-30 gpio5-31          g                     gpio@5d0e0000            ]             g                                       R        A                          2fsl,imx8qm-gpio fsl,imx35-gpio              {          
   {   
            v            MXM3_261 MXM3_263 MXM3_259 MXM3_257 MXM3_255 MXM3_128 MXM3_130 MXM3_265 MXM3_249 MXM3_247 MXM3_245 MXM3_243         gpio@5d0f0000            ]             g                                       R        A                          2fsl,imx8qm-gpio fsl,imx35-gpio        spi@5d120000                                       2nxp,imx8qxp-fspi             ]                   fspi_base fspi_mmap         g       \              +         +              &fspi_en fspi                        	  disabled          mailbox@5d1b0000             ]             g                           	  disabled          ,   2fsl,imx8-mu-scu fsl,imx8qm-mu fsl,imx6sx-mu       mailbox@5d1c0000             ]             g                           ,   2fsl,imx8-mu-scu fsl,imx8qm-mu fsl,imx6sx-mu            
      mailbox@5d1d0000             ]             g                           	  disabled          ,   2fsl,imx8-mu-scu fsl,imx8qm-mu fsl,imx6sx-mu       mailbox@5d1e0000             ]             g                           	  disabled          ,   2fsl,imx8-mu-scu fsl,imx8qm-mu fsl,imx6sx-mu       mailbox@5d1f0000             ]             g                           	  disabled          ,   2fsl,imx8-mu-scu fsl,imx8qm-mu fsl,imx6sx-mu       mailbox@5d200000             ]              g                                         	  disabled             2fsl,imx8qm-mu fsl,imx6sx-mu       mailbox@5d210000             ]!             g                                         	  disabled             2fsl,imx8qm-mu fsl,imx6sx-mu       mailbox@5d280000             ](             g                                            2fsl,imx8qm-mu fsl,imx6sx-mu       clock-controller@5d400000            2fsl,imx8qxp-lpcg             ]@                      4     +         +         +            +              W                      h  pwm0_lpcg_ipg_clk pwm0_lpcg_ipg_hf_clk pwm0_lpcg_ipg_s_clk pwm0_lpcg_ipg_slv_clk pwm0_lpcg_ipg_mstr_clk                          s      clock-controller@5d410000            2fsl,imx8qxp-lpcg             ]A                      4     +         +         +            +              W                      h  pwm1_lpcg_ipg_clk pwm1_lpcg_ipg_hf_clk pwm1_lpcg_ipg_s_clk pwm1_lpcg_ipg_slv_clk pwm1_lpcg_ipg_mstr_clk                          u      clock-controller@5d420000            2fsl,imx8qxp-lpcg             ]B                      4     +         +         +            +              W                      h  pwm2_lpcg_ipg_clk pwm2_lpcg_ipg_hf_clk pwm2_lpcg_ipg_s_clk pwm2_lpcg_ipg_slv_clk pwm2_lpcg_ipg_mstr_clk                          w      clock-controller@5d430000            2fsl,imx8qxp-lpcg             ]C                      4     +         +         +            +              W                      h  pwm3_lpcg_ipg_clk pwm3_lpcg_ipg_hf_clk pwm3_lpcg_ipg_s_clk pwm3_lpcg_ipg_slv_clk pwm3_lpcg_ipg_mstr_clk                          y      clock-controller@5d440000            2fsl,imx8qxp-lpcg             ]D                      4     +         +         +            +              W                      h  pwm4_lpcg_ipg_clk pwm4_lpcg_ipg_hf_clk pwm4_lpcg_ipg_s_clk pwm4_lpcg_ipg_slv_clk pwm4_lpcg_ipg_mstr_clk                     clock-controller@5d450000            2fsl,imx8qxp-lpcg             ]E                      4     +         +         +            +              W                      h  pwm5_lpcg_ipg_clk pwm5_lpcg_ipg_hf_clk pwm5_lpcg_ipg_s_clk pwm5_lpcg_ipg_slv_clk pwm5_lpcg_ipg_mstr_clk                     clock-controller@5d460000            2fsl,imx8qxp-lpcg             ]F                      4     +         +         +            +              W                      h  pwm6_lpcg_ipg_clk pwm6_lpcg_ipg_hf_clk pwm6_lpcg_ipg_s_clk pwm6_lpcg_ipg_slv_clk pwm6_lpcg_ipg_mstr_clk                     clock-controller@5d470000            2fsl,imx8qxp-lpcg             ]G                      4     +         +         +            +              W                      h  pwm7_lpcg_ipg_clk pwm7_lpcg_ipg_hf_clk pwm7_lpcg_ipg_s_clk pwm7_lpcg_ipg_slv_clk pwm7_lpcg_ipg_mstr_clk                        chosen          n/bus@5a000000/serial@5a070000         backlight            2pwm-backlight           default                     z       -   ?   X   w                               A             	  disabled          gpio-fan          	   2gpio-fan            default                    h   -                                  regulator-ext-rgmii          2regulator-fixed                       2Z         2Z        VDD_EXT_RGMII (LDO1)       regulator-state-mem                   regulator-module-3v3             2regulator-fixed          2Z         2Z        +V3.3         regulator-module-3v3-avdd            2regulator-fixed          2Z         2Z        +V3.3_AUDIO       regulator-module-wifi            2regulator-fixed         default                       A                "        wifi_pwrdn_fake_regulator           5   d   regulator-state-mem                   regulator-pcie-switch            2regulator-fixed         default                       -                "         w@         w@        pcie_switch         P       regulator-usb-host-vbus          2regulator-fixed         default                       D                "         a         LK@         LK@        VCC_USBH(2|4)         regulator-usb-hsic           2regulator-fixed          -         -        usb-hsic-dummy        regulator-usb-hsic1          2regulator-fixed          -         -        usb-phy-dummy              W      reserved-memory                                      decoder-boot@84000000                                   u                 encoder1-boot@86000000                                   u           "      encoder2-boot@86200000                                   u           %      m4@88000000                                 u      rpmsg@90200000                                   u      vdevbuffer@90400000          2shared-dma-pool              @                  u      decoder-rpc@92000000                                     u                  dsp@92400000                 @                  u      encoder1-rpc@94400000                @       p           u           #      encoder2-rpc@94b00000                       p           u           &      linux,cma            2shared-dma-pool         |           <                                  <            touchscreen          2toradex,vf50-touchscreen                 -        g              idle default                             L                                                           c                 c                  c                 c             	  disabled          leds          
   2gpio-leds           default               led-1                      off         status          h                led-2                      off         status          h                led-3                      off         status          h                led-4                      off         status          h                      	interrupt-parent #address-cells #size-cells model compatible mmc0 mmc1 mmc2 serial0 serial1 serial2 serial3 vpu_core0 vpu_core1 vpu_core2 rtc0 rtc1 cpu device_type reg enable-method i-cache-size i-cache-line-size i-cache-sets d-cache-size d-cache-line-size d-cache-sets next-level-cache phandle cache-level cache-unified #interrupt-cells interrupt-controller interrupts mbox-names mboxes #power-domain-cells #clock-cells pinctrl-names pinctrl-0 fsl,pins ranges power-domains status #mbox-cells memory-region clock-frequency clock-output-names clocks clock-names assigned-clocks assigned-clock-rates clock-indices cs-gpios connect-gpios initial-mode intn-gpios refclk-frequency reset-gpios #io-channel-cells fsl,clk-source fsl,scu-index fsl,usbphy fsl,usbmisc ahb-burst-config tx-burst-size-dword rx-burst-size-dword adp-disable hnp-disable over-current-active-low power-active-high srp-disable #index-cells phy-3p0-supply pinctrl-1 pinctrl-2 bus-width non-removable fsl,tuning-start-tap fsl,tuning-step pinctrl-3 cd-gpios no-1-8-v fsl,num-tx-queues fsl,num-rx-queues fsl,magic-packet phy-handle phy-mode fsl,rgmii_txc_dly micrel,led-mode reset-assert-us reset-deassert-us reset-names reg-names interrupt-names phys phy-names cdns,on-chip-buff-size #phy-cells #pwm-cells gpio-controller #gpio-cells gpio-ranges gpio-line-names gpio-hog line-name output-high pad-wakeup pad-wakeup-num ngpios stdout-path brightness-levels default-brightness-level enable-gpios gpio-fan,speed-map regulator-max-microvolt regulator-min-microvolt regulator-name regulator-off-in-suspend gpio enable-active-high regulator-settling-time-us startup-delay-us regulator-always-on no-map alloc-ranges linux,cma-default reusable io-channels vf50-ts-min-pressure xp-gpios xm-gpios yp-gpios ym-gpios color default-state function 