╨ ■эГH}<(╟|ЇАfsl,lx2160a-qdsfsl,lx2160a+7NXP Layerscape LX2160AQDSaliases=/soc/timer@2800000B/soc/crypto@8000000I/soc/esdhc@2140000N/soc/esdhc@2150000S/soc/serial@21c0000cpus+cpu@0[cpuarm,cortex-a72gpsciuyААН@ЯАм└╣@╦└╪щ∙cpu@1[cpuarm,cortex-a72gpsciuyААН@ЯАм└╣@╦└╪щ∙cpu@100[cpuarm,cortex-a72gpsciuyААН@ЯАм└╣@╦└╪щ∙cpu@101[cpuarm,cortex-a72gpsciuyААН@ЯАм└╣@╦└╪щ∙cpu@200[cpuarm,cortex-a72gpsciuyААН@ЯАм└╣@╦└╪щ∙cpu@201[cpuarm,cortex-a72gpsciuyААН@ЯАм└╣@╦└╪щ∙cpu@300[cpuarm,cortex-a72gpsciuyААН@ЯАм└╣@╦└╪щ∙cpu@301[cpuarm,cortex-a72gpsciuyААН@ЯАм└╣@╦└╪щ∙cpu@400[cpuarm,cortex-a72gpsciuyААН@ЯАм└╣@╦└╪щ∙cpu@401[cpuarm,cortex-a72gpsciuyААН@ЯАм└╣@╦└╪щ∙cpu@500[cpuarm,cortex-a72gpsciuyААН@ЯАм└╣@╦└╪ щ∙cpu@501[cpuarm,cortex-a72gpsciuyААН@ЯАм└╣@╦└╪ щ∙cpu@600[cpuarm,cortex-a72gpsciuyААН@ЯАм└╣@╦└╪ щ∙cpu@601[cpuarm,cortex-a72gpsciuyААН@ЯАм└╣@╦└╪ щ∙cpu@700[cpuarm,cortex-a72gpsciuyААН@ЯАм└╣@╦└╪щ∙cpu@701[cpuarm,cortex-a72gpsciuyААН@ЯАм└╣@╦└╪щ∙l2-cache0cacheВП@бl2-cache1cacheВП@бl2-cache2cacheВП@бl2-cache3cacheВП@бl2-cache4cacheВП@бl2-cache5cacheВП@б l2-cache6cacheВП@б l2-cache7cacheВП@бcpu-pw15arm,idle-state*PW15:Q╨b╨rpinterrupt-controller@6000000arm,gic-v3Pu Г+ФЫ░ msi-controller@6020000arm,gic-v3-its╗u"timerarm,armv8-timer0░ pmuarm,cortex-a72-pmu░psci arm,psci-0.2nsmcmemory@80000000[memoryuААmemory-controller@1080000fsl,qoriq-memory-controlleru░╩memory-controller@1090000fsl,qoriq-memory-controlleru ░╩sysclkfixed-clock╪хїсїsysclkthermal-zonescluster6-7шИ,tripscluster6-7-alert<LH╨bpassive cluster6-7-crit<sH╨ bcriticalcooling-mapsmap0S └X ddr-cluster5шИ,tripsddr-cluster5-alert<LH╨bpassiveddr-cluster5-crit<sH╨ bcriticalwriopшИ,tripswriop-alert<LH╨bpassivewriop-crit<sH╨ bcriticaldce-qbman-hsio2шИ,tripsdce-qbman-alert<LH╨bpassivedce-qbman-crit<sH╨ bcriticalccn-dpaa-tbuшИ,tripsccn-dpaa-alert<LH╨bpassiveccn-dpaa-crit<sH╨ bcriticalcluster4-hsio3шИ,tripsclust4-hsio3-alert<LH╨bpassiveclust4-hsio3-crit<sH╨ bcriticalcluster2-3шИ,tripscluster2-3-alert<LH╨bpassivecluster2-3-crit<sH╨ bcriticalsocsimple-bus+Фgphy@1ea0000 fsl,lynx-28guъ0rcrypto@8000000fsl,sec-v5.0fsl,sec-v4.0} +Фu░ЛЙЦokayjr@10000,fsl,sec-v5.0-job-ringfsl,sec-v4.0-job-ringu░Мjr@20000,fsl,sec-v5.0-job-ringfsl,sec-v4.0-job-ringu░Нjr@30000,fsl,sec-v5.0-job-ringfsl,sec-v4.0-job-ringu░Оjr@40000,fsl,sec-v5.0-job-ringfsl,sec-v4.0-job-ringu░Пclock-controller@1300000fsl,lx2160a-clockgenu0 ╪ysyscon@1e00000fsl,lx2160a-dcfgsysconuр╩efuse@1e80000fsl,ls1028a-sfpuшyЭsfpsyscon@1f70000fsl,lx2160a-iscsysconuў╩+Фўinterrupt-controller@14&fsl,lx2160a-extirqfsl,ls1088a-extirqГЫu й ╖tmu@1f80000fsl,qoriq-tmuu°░╩АцА}╪5T╩ьi2c@2000000fsl,vf610-i2c+u░"Эi2cyЦokayfpga@662fsl,lx2160aqds-fpgafsl,fpga-qixis-i2csimple-mfdufmux-controllerreg-muxT°T6i2c-mux@77nxp,pca9547uw+i2c@2+upower-monitor@40 ti,ina220u@-Їpower-monitor@41 ti,ina220uA-шi2c@3+utemperature-sensor@4cnxp,sa56004uL< temperature-sensor@4dnxp,sa56004uM< rtc@51nxp,pcf2129uQi2c@2010000fsl,vf610-i2c+u░"Эi2cy Цdisabledi2c@2020000fsl,vf610-i2c+u░#Эi2cy Цdisabledi2c@2030000fsl,vf610-i2c+u░#Эi2cy Цdisabledi2c@2040000fsl,vf610-i2c+u░JЭi2cy Цdisabledi2c@2050000fsl,vf610-i2c+u░JЭi2cy Цdisabledi2c@2060000fsl,vf610-i2c+u░KЭi2cy Цdisabledi2c@2070000fsl,vf610-i2c+u░KЭi2cy Цdisabledspi@20c0000nxp,lx2160a-fspi+ u Gfspi_basefspi_mmap░y Эfspi_enfspiЦokayflash@0+jedec,spi-norQ`·ЁАurГspi@2100000"fsl,lx2160a-dspifsl,ls2085a-dspi+u░yЭdspiФиЦokayflash@0+jedec,spi-noru`B@spi@2110000"fsl,lx2160a-dspifsl,ls2085a-dspi+u░yЭdspiФиЦokayflash@0+jedec,spi-noru`B@spi@2120000"fsl,lx2160a-dspifsl,ls2085a-dspi+u░ёyЭdspiФиЦokayflash@0+jedec,spi-noru`B@esdhc@2140000 fsl,esdhcu░yЙ░фф┐╩yЦokayesdhc@2150000 fsl,esdhcu░?yЙ░фф┐╨╩yЦokaycan@2180000fsl,lx2160ar1-flexcanu░yЭipgper┌Цokaycan@2190000fsl,lx2160ar1-flexcanu░yЭipgper┌Цokayserial@21c0000arm,sbsa-uartarm,pl011u░ щ┬Цokayserial@21d0000arm,sbsa-uartarm,pl011u░!щ┬Цokayserial@21e0000arm,sbsa-uartarm,pl011u░Hщ┬ Цdisabledserial@21f0000arm,sbsa-uartarm,pl011u░Iщ┬ Цdisabledgpio@2300000fsl,qoriq-gpiou0░$ў╩ЫГgpio@2310000fsl,qoriq-gpiou1░$ў╩ЫГgpio@2320000fsl,qoriq-gpiou2░%ў╩ЫГgpio@2330000fsl,qoriq-gpiou3░%ў╩ЫГwatchdog@23a0000arm,sbsa-gwdt u:9░;power-controller@1e34040%fsl,lx2160a-rcpmfsl,qoriq-rcpm-2.1+uу@@╩!timer@2800000fsl,lx2160a-ftm-alarmuА 6!@░,usb@3100000 snps,dwc3u░PFhostN qВЬЦokayusb@3110000 snps,dwc3u░QFhostN qВЬЦokaysata@3200000fsl,lx2160a-ahci u Gahcisata-ecc░ЕyЙЦokaysata@3210000fsl,lx2160a-ahci u! Gahcisata-ecc░ИyЙЦokaysata@3220000fsl,lx2160a-ahci u" Gahcisata-ecc░ayЙЦokaysata@3230000fsl,lx2160a-ahci u# Gahcisata-ecc░dyЙЦokaypcie@3400000fsl,lx2160a-pcie u@А Gcsr_axi_slaveconfig_axi_slave$░lll ╝aerpmeintr+[pciЙ╠╓р ФВ@А@@ъ"Г╖айmnopї# Цdisabledpcie@3500000fsl,lx2160a-pcie uPИ Gcsr_axi_slaveconfig_axi_slave$░qqq ╝aerpmeintr+[pciЙ╠╓р ФВ@И@@ъ"Г╖айrstuї# Цdisabledpcie@3600000fsl,lx2160a-pcie u`Р Gcsr_axi_slaveconfig_axi_slave$░vvv ╝aerpmeintr+[pciЙ╠╓р ФВ@Р@@ъ"Г╖айwxyzї# Цdisabledpcie@3700000fsl,lx2160a-pcie upШ Gcsr_axi_slaveconfig_axi_slave$░{{{ ╝aerpmeintr+[pciЙ╠╓р ФВ@Ш@@ъ"Г╖ай|}~ї# Цdisabledpcie@3800000fsl,lx2160a-pcie uАа Gcsr_axi_slaveconfig_axi_slave$░ААА ╝aerpmeintr+[pciЙ╠╓р ФВ@а@@ъ"Г╖айБВГДї# Цdisabledpcie@3900000fsl,lx2160a-pcie uРи Gcsr_axi_slaveconfig_axi_slave$░ggg ╝aerpmeintr+[pciЙ╠╓р ФВ@и@@ъ"Г╖айhijkї# Цdisablediommu@5000000arm,mmu-500uА и░ ╙╘╒╓╫╪┘┌█▄ТУФХЦЧШЩЪЫЬЭЮЯабвгдежзийклмноп░▒▓│┤╡╢╖╕╣║╗╝╜╛┐└┴┬├─┼╞╟╚╔╩╦╠═╬╧╨╤Й#console@8340020fsl,dpaa2-consoleu4 ptp-timer@8b95000fsl,dpaa2-ptpu╣Py╩mdio@8b96000fsl,fman-memac-mdiou╣`░Z+╩х&%аyЦokay7mdio@8b97000fsl,fman-memac-mdiou╣p░[╩+х&%аyЦokay8mdio@8c07000fsl,fman-memac-mdiou└p╩+ Цdisabledethernet-phy@0u$mdio@8c0b000fsl,fman-memac-mdiou└░╩+ Цdisabledethernet-phy@0u%mdio@8c0f000fsl,fman-memac-mdiou└Ё╩+ Цdisabledethernet-phy@0u&mdio@8c13000fsl,fman-memac-mdiou┴0╩+ Цdisabledethernet-phy@0u'mdio@8c17000fsl,fman-memac-mdiou┴p╩+ Цdisabledethernet-phy@0u(mdio@8c1b000fsl,fman-memac-mdiou┴░╩+ Цdisabledethernet-phy@0u)mdio@8c1f000fsl,fman-memac-mdiou┴Ё╩+ Цdisabledethernet-phy@0u*mdio@8c23000fsl,fman-memac-mdiou┬0╩+ Цdisabledethernet-phy@0u+mdio@8c27000fsl,fman-memac-mdiou┬p╩+ Цdisabledethernet-phy@0u,mdio@8c2b000fsl,fman-memac-mdiou┬░╩+ Цdisabledethernet-phy@0u-mdio@8c2f000fsl,fman-memac-mdiou┬Ё╩+ Цdisabledethernet-phy@0u.mdio@8c33000fsl,fman-memac-mdiou├0╩+ Цdisabledethernet-phy@0u/mdio@8c37000fsl,fman-memac-mdiou├p╩+ Цdisabledethernet-phy@0u0mdio@8c3b000fsl,fman-memac-mdiou├░╩+ Цdisabledethernet-phy@0u1mdio@8c3f000fsl,fman-memac-mdiou├Ё╩+ Цdisabledethernet-phy@0u2mdio@8c43000fsl,fman-memac-mdiou─0╩+ Цdisabledethernet-phy@0u3mdio@8c47000fsl,fman-memac-mdiou─p╩+ Цdisabledethernet-phy@0u4mdio@8c4b000fsl,fman-memac-mdiou─░╩+ Цdisabledethernet-phy@0u5fsl-mc@80c000000 fsl,qoriq-mc u@4ъ"ї#Й+0Фdpmacs+ethernet@1fsl,qoriq-mc-dpmacu.$ethernet@2fsl,qoriq-mc-dpmacu.%ethernet@3fsl,qoriq-mc-dpmacu.&ethernet@4fsl,qoriq-mc-dpmacu.'ethernet@5fsl,qoriq-mc-dpmacu.(ethernet@6fsl,qoriq-mc-dpmacu.)ethernet@7fsl,qoriq-mc-dpmacu.*ethernet@8fsl,qoriq-mc-dpmacu.+ethernet@9fsl,qoriq-mc-dpmacu .,ethernet@afsl,qoriq-mc-dpmacu .-ethernet@bfsl,qoriq-mc-dpmacu..ethernet@cfsl,qoriq-mc-dpmacu./ethernet@dfsl,qoriq-mc-dpmacu .0ethernet@efsl,qoriq-mc-dpmacu.1ethernet@ffsl,qoriq-mc-dpmacu.2ethernet@10fsl,qoriq-mc-dpmacu.3ethernet@11fsl,qoriq-mc-dpmacu.4ethernet@12fsl,qoriq-mc-dpmacu.5firmwareopteelinaro,optee-tznsmcЦokaychosen9serial0:115200n8regulator-sb3v3regulator-fixedEMC34717-3.3VSBT2Zаl2ZаДЦ mdio-mux-1mdio-mux-multiplexerк6╖7+mdio@0u+mdio@8u+mdio@18u+mdio@19u+mdio@1au+mdio@1bu+mdio@1cu+mdio@1du+mdio@1eu+mdio@1fu+mdio-mux-2mdio-mux-multiplexerк6╖8+mdio@0u+mdio@1u+mdio@2u+mdio@3u+mdio@4u+mdio@5u+mdio@6u+mdio@7u+ compatibleinterrupt-parent#address-cells#size-cellsmodelrtc1cryptommc0mmc1serial0device_typeenable-methodregclocksd-cache-sized-cache-line-sized-cache-setsi-cache-sizei-cache-line-sizei-cache-setsnext-level-cachecpu-idle-states#cooling-cellsphandlecache-unifiedcache-levelidle-state-namearm,psci-suspend-paramentry-latency-usexit-latency-usmin-residency-us#interrupt-cellsrangesinterrupt-controllerinterruptsmsi-controllerlittle-endian#clock-cellsclock-frequencyclock-output-namespolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicedma-ranges#phy-cellsfsl,sec-eradma-coherentstatusclock-namesinterrupt-mapinterrupt-map-maskfsl,tmu-rangefsl,tmu-calibration#thermal-sensor-cellsscl-gpios#mux-control-cellsmux-reg-masksshunt-resistorvcc-supplyreg-namesm25p,fast-readspi-max-frequencyspi-rx-bus-widthspi-tx-bus-widthspi-num-chipselectsbus-numvoltage-rangessdhci,auto-cmd12broken-cdfsl,clk-sourcecurrent-speedgpio-controller#gpio-cellstimeout-sec#fsl,rcpm-wakeup-cellsfsl,rcpm-wakeupdr_modesnps,quirk-frame-length-adjustmentusb3-lpm-capablesnps,dis_rxdet_inp3_quirksnps,incr-burst-type-adjustmentinterrupt-namesapio-winsppio-winsbus-rangemsi-parentiommu-map#iommu-cells#global-interruptsfsl,extts-fifopcs-handlestdout-pathregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-boot-onregulator-always-onmux-controlsmdio-parent-bus