     8     (                                               nvidia,venice2 nvidia,tegra124                                   +            7NVIDIA Tegra124 Venice2    opp-table-emc             operating-points-v2          =      opp-12750000-800             E 5  5  0         S              Z         opp-12750000-950             E ~ ~ 0         S              Z         opp-12750000-1050            E   0         S              Z         opp-12750000-1110            E   0         S              Z         opp-20400000-800             E 5  5  0         S    7G         Z         opp-20400000-950             E ~ ~ 0         S    7G         Z         opp-20400000-1050            E   0         S    7G         Z         opp-20400000-1110            E   0         S    7G         Z         opp-40800000-800             E 5  5  0         S    n          Z         opp-40800000-950             E ~ ~ 0         S    n          Z         opp-40800000-1050            E   0         S    n          Z         opp-40800000-1110            E   0         S    n          Z         opp-68000000-800             E 5  5  0         S              Z         opp-68000000-950             E ~ ~ 0         S              Z         opp-68000000-1050            E   0         S              Z         opp-68000000-1110            E   0         S              Z         opp-102000000-800            E 5  5  0         S    e         Z         opp-102000000-950            E ~ ~ 0         S    e         Z         opp-102000000-1050           E   0         S    e         Z         opp-102000000-1110           E   0         S    e         Z         opp-204000000-800            E 5  5  0         S    (          Z             k      opp-204000000-950            E ~ ~ 0         S    (          Z             k      opp-204000000-1050           E   0         S    (          Z             k      opp-204000000-1110           E   0         S    (          Z             k      opp-264000000-800            E 5  5  0         S    R          Z         opp-264000000-950            E ~ ~ 0         S    R          Z         opp-264000000-1050           E   0         S    R          Z         opp-264000000-1110           E   0         S    R          Z         opp-300000000-850            E P P 0         S              Z         opp-300000000-950            E ~ ~ 0         S              Z         opp-300000000-1050           E   0         S              Z         opp-300000000-1110           E   0         S              Z         opp-348000000-850            E P P 0         S              Z         opp-348000000-950            E ~ ~ 0         S              Z         opp-348000000-1050           E   0         S              Z         opp-348000000-1110           E   0         S              Z         opp-396000000-950            E ~ ~ 0         S    {          Z         opp-396000000-1000           E B@ B@ 0         S    {          Z         opp-396000000-1050           E   0         S    {          Z         opp-396000000-1110           E   0         S    {          Z         opp-528000000-950            E ~ ~ 0         S    x          Z         opp-528000000-1000           E B@ B@ 0         S    x          Z         opp-528000000-1050           E   0         S    x          Z         opp-528000000-1110           E   0         S    x          Z         opp-600000000-950            E ~ ~ 0         S    #F          Z         opp-600000000-1000           E B@ B@ 0         S    #F          Z         opp-600000000-1050           E   0         S    #F          Z         opp-600000000-1110           E   0         S    #F          Z         opp-792000000-1000           E B@ B@ 0         S    /4          Z         opp-792000000-1050           E   0         S    /4          Z         opp-792000000-1110           E   0         S    /4          Z         opp-924000000-1100           E   0         S    7          Z         opp-1200000000-1100          E   0         S    G          Z            opp-table-actmon              operating-points-v2          =      opp-12750000             S              Z            w       opp-20400000             S    7G         Z            w        opp-40800000             S    n          Z            w 	       opp-68000000             S              Z            w        opp-102000000            S    e         Z            w        opp-204000000            S    (          Z            w 1           k      opp-264000000            S    R          Z            w @t       opp-300000000            S              Z            w I>       opp-348000000            S              Z            w T       opp-396000000            S    {          Z            w `       opp-528000000            S    x          Z            w        opp-600000000            S    #F          Z            w |       opp-792000000            S    /4          Z            w \       opp-924000000            S    7          Z            w        opp-1200000000           S    G          Z            w$          memory@80000000          memory                               pcie@1003000              nvidia,tegra124-pcie             pci       0        0             8                               pads afi cs                 b          c         	   intr msi                                                                             b                                        +                                                                                                           B                                           F      H                   pex afi pll_e cml                 F      H      J        pex afi pcie_x        	  #disabled       pci@1,0          pci         *                                                                  	  #disabled                         +                     =         pci@2,0          pci         *                                                                 	  #disabled                         +                     =            host1x@50000000           nvidia,tegra124-host1x               P        @                 A          C            syncpt host1x                          host1x                            
  host1x mc           N                           +                T       T             vi@54080000           nvidia,tegra124-vi               T                         E                                        vi          N            	  #disabled          isp@54600000              nvidia,tegra124-isp              T`                         G                                        isp         N            	  #disabled          isp@54680000              nvidia,tegra124-isp              Th                         F                                        isp         N            	  #disabled          dc@54200000           nvidia,tegra124-dc               T                          I                          dc                        dc          N              U          H  a                                          s         Z            owina winb winc cursor wind wint       dc@54240000           nvidia,tegra124-dc               T$                         J                          dc                        dc          N              U         0  a                                            owina winb winc cursor         hdmi@54280000             nvidia,tegra124-hdmi                 T(                         K                  3              hdmi parent               3        hdmi            #okay                                                	           
   o             =         dsi@54300000              nvidia,tegra124-dsi              T0                        0                    dsi lp parent                 0        dsi               `      	  #disabled                         +          vic@54340000              nvidia,tegra124-vic              T4                         H                          vic                       vic         N            dsi@54400000              nvidia,tegra124-dsi              T@                        R                    dsi lp parent                 R        dsi                    	  #disabled                         +          msenc@544c0000            nvidia,tegra124-msenc                TL                         D                  [              [        mpe         N            	  #disabled          tsec@54500000             nvidia,tegra124-tsec                 TP                         2                  S              S        N            	  #disabled          sor@54540000              nvidia,tegra124-sor              TT                         L         (              7                         sor out parent dp safe                        sor         #okay                                                      dpaux@545c0000            nvidia,tegra124-dpaux                T\                                                        dpaux parent                          dpaux           #okay                        =      i2c-bus                      +          aux-bus    panel             lg,lp129qe          %           2            =                  interrupt-controller@50041000             arm,cortex-a15-gic                       <      @       P            P             P@             P`                        	                       =         gpu@57000000              nvidia,gk20a                  W              X                                                stall nonstall                              gpu pwr                       gpu         N            	  #disabled                     interrupt-controller@60004000         +    nvidia,tegra124-ictlr nvidia,tegra30-ictlr        P       ` @            ` A            ` B            ` C            ` D                 <                                 =         timer@60005000        +    nvidia,tegra124-timer nvidia,tegra30-timer               ` P              H                               )          *          y          z                        clock@60006000            nvidia,tegra124-car              ` `                Q           ^           k            =         flow-controller@60007000              nvidia,tegra124-flowctrl                 ` p              actmon@6000c800           nvidia,tegra124-actmon               `                         -                  w      9        actmon emc                w        actmon                     a      '         	  ocpu-read                     gpio@6000d000         )    nvidia,tegra124-gpio nvidia,tegra30-gpio                 `               `                     !          "          #          7          W          Y          }                                            <                               =   
      dma@60020000          .    nvidia,tegra124-apbdma nvidia,tegra148-apbdma                `                        h          i          j          k          l          m          n          o          p          q          r          s          t          u          v          w                                                                                                                                                                                  "              "        dma                     =         apbmisc@70000800          /    nvidia,tegra124-apbmisc nvidia,tegra20-apbmisc                p         d    p d             pinmux@70000868           nvidia,tegra124-pinmux        0       p h      d    p 0       4    p                 boot                        =      pinmux           =      dap_mclk1_pw4           dap_mclk1_pw4           extperiph1                      +            7          dap1_din_pn1            dap1_din_pn1            i2s0                       +            7         dap1_dout_pn2         (  dap1_dout_pn2 dap1_fs_pn0 dap1_sclk_pn3         i2s0                        +            7         dap2_din_pa4            dap2_din_pa4            i2s1                       +            7          dap2_dout_pa5         (  dap2_dout_pa5 dap2_fs_pa2 dap2_sclk_pa3         i2s1                        +            7          dvfs_pwm_px0            dvfs_pwm_px0 dvfs_clk_px2           cldvfs                      +            7          ulpi_clk_py0          '  ulpi_clk_py0 ulpi_nxt_py2 ulpi_stp_py3          spi1                        +            7          ulpi_dir_py1            ulpi_dir_py1            spi1                       +            7          cam_i2c_scl_pbb1          "  cam_i2c_scl_pbb1 cam_i2c_sda_pbb2           i2c3                       +            7            G            S         gen2_i2c_scl_pt5          "  gen2_i2c_scl_pt5 gen2_i2c_sda_pt6           i2c2                       +            7            G            S         pg4         pg4 pg5 pg6 pi3         spi4                        +            7          pg7         pg7         spi4                       +            7          ph1         ph1         pwm1                        +            7          pk0       !  pk0 kb_row15_ps7 clk_32k_out_pa0            soc         +           7                     sdmmc1_clk_pz0          sdmmc1_clk_pz0          sdmmc1                      +            7          sdmmc1_cmd_pz1        O  sdmmc1_cmd_pz1 sdmmc1_dat0_py7 sdmmc1_dat1_py6 sdmmc1_dat2_py5 sdmmc1_dat3_py4          sdmmc1                     +           7          sdmmc3_clk_pa6          sdmmc3_clk_pa6          sdmmc3                     +            7          sdmmc3_cmd_pa7        |  sdmmc3_cmd_pa7 sdmmc3_dat0_pb7 sdmmc3_dat1_pb6 sdmmc3_dat2_pb5 sdmmc3_dat3_pb4 sdmmc3_clk_lb_out_pee4 sdmmc3_clk_lb_in_pee5         sdmmc3                     +           7          sdmmc4_clk_pcc4         sdmmc4_clk_pcc4         sdmmc4                     +            7          sdmmc4_cmd_pt7          sdmmc4_cmd_pt7 sdmmc4_dat0_paa0 sdmmc4_dat1_paa1 sdmmc4_dat2_paa2 sdmmc4_dat3_paa3 sdmmc4_dat4_paa4 sdmmc4_dat5_paa5 sdmmc4_dat6_paa6 sdmmc4_dat7_paa7          sdmmc4                     +           7          pwr_i2c_scl_pz6          pwr_i2c_scl_pz6 pwr_i2c_sda_pz7         i2cpwr                     +            7            G            S         jtag_rtck         
  jtag_rtck           rtck                        +           7          clk_32k_in          clk_32k_in          clk                    +            7          core_pwr_req            core_pwr_req            pwron                       +            7          cpu_pwr_req         cpu_pwr_req         cpu                     +            7          pwr_int_n         
  pwr_int_n           pmi                    +           7          reset_out_n         reset_out_n         reset_out_n                     +            7          clk3_out_pee0           clk3_out_pee0           extperiph3                      +            7          dap4_din_pp5            dap4_din_pp5            i2s3                       +            7         dap4_dout_pp6         (  dap4_dout_pp6 dap4_fs_pp4 dap4_sclk_pp7         i2s3                        +            7         gen1_i2c_sda_pc5          "  gen1_i2c_sda_pc5 gen1_i2c_scl_pc4           i2c1                       +            7            G            S         uart2_cts_n_pj5         uart2_cts_n_pj5         uartb                      +            7          uart2_rts_n_pj6         uart2_rts_n_pj6         uartb                       +            7          uart2_rxd_pc3           uart2_rxd_pc3           irda                       +            7          uart2_txd_pc2           uart2_txd_pc2           irda                        +            7          uart3_cts_n_pa1         uart3_cts_n_pa1 uart3_rxd_pw7           uartc                      +            7          uart3_rts_n_pc0         uart3_rts_n_pc0 uart3_txd_pw6           uartc                       +            7          hdmi_cec_pee3           hdmi_cec_pee3           cec                    +            7            G            S          hdmi_int_pn7            hdmi_int_pn7            rsvd1                      +           7          ddc_scl_pv4         ddc_scl_pv4 ddc_sda_pv5         i2c4                       +            7            G            e         pj7         pj7 pk7         uartd           +            7                      pb0         pb0 pb1         uartd           +           7                     ph0         ph0         pwm0            +            7                      kb_row10_ps2            kb_row10_ps2            uarta           +           7                     kb_row9_ps1         kb_row9_ps1         uarta           +            7                      kb_row6_pr6         kb_row6_pr6         displaya_alt            +           7                     usb_vbus_en0_pn4          "  usb_vbus_en0_pn4 usb_vbus_en1_pn5           usb                    +            7            G            S         drive_sdio1         drive_sdio1         t                                      *                              drive_sdio3         drive_sdio3         t                                     $                              drive_gma         
  drive_gma           t                                                                                         als_irq_l           gpio_x3_aud_px3         gmi         +            7                    codec_irq_l         ph4         gmi         +            7                     lcd_bl_en           ph2         gmi         +           7                      touch_irq_l         gpio_w3_aud_pw3         spi6            +            7                    tpm_davint_l            ph6         gmi         +            7                    ts_irq_l            pk2         gmi         +            7                    ts_reset_l          pk4         gmi         +           7                      ts_shdn_l           pk1         gmi         +           7                      ph7         ph7         gmi         +            7                     kb_col0_ap          kb_col0_pq0         rsvd4           +           7                     lid_open            kb_row4_pr4         rsvd3           +           7                     en_vdd_sd           kb_row0_pr0         rsvd4           +            7                      ac_ok           pj0         gmi         +           7                    sensor_irq_l            pi6         gmi         +            7                     wifi_en         gpio_x7_aud_px7         rsvd4           +            7                      wifi_rst_l          clk2_req_pcc5           dap         +            7                     hp_det_l            ulpi_data1_po2          spi3            +            7                           serial@70006000       )    nvidia,tegra124-uart nvidia,tegra20-uart                 p `        @        %                   $                                        #okay          serial@70006040       )    nvidia,tegra124-uart nvidia,tegra20-uart                 p `@       @        %                   %                                        /      	      	        4rx tx         	  #disabled          serial@70006200       )    nvidia,tegra124-uart nvidia,tegra20-uart                 p b        @        %                   .                  7              7        /      
      
        4rx tx         	  #disabled          serial@70006300       )    nvidia,tegra124-uart nvidia,tegra20-uart                 p c        @        %                   Z                  A              A        /                    4rx tx         	  #disabled          pwm@7000a000          '    nvidia,tegra124-pwm nvidia,tegra20-pwm               p                 >                                        pwm         #okay             =   9      i2c@7000c000              nvidia,tegra124-i2c              p                         &                        +                           div-clk                       i2c         /                    4rx tx           #okay            I    audio-codec@10            maxim,max98090                          
            <            =   =         i2c@7000c400              nvidia,tegra124-i2c              p                         T                        +                   6        div-clk               6        i2c         /                    4rx tx           #okay            I    trackpad@4b           atmel,maxtouch              K            
                       Y                       i2c@7000c500              nvidia,tegra124-i2c              p                         \                        +                   C        div-clk               C        i2c         /                    4rx tx           #okay            I       i2c@7000c700              nvidia,tegra124-i2c              p                         x                        +                   g        div-clk               g        i2c         /                    4rx tx           #okay            I          =   	      i2c@7000d000              nvidia,tegra124-i2c              p                         5                        +                   /        div-clk               /        i2c         /                    4rx tx           #okay            I    pmic@40           ams,as3722              @                V            k                     <                            default                     =   ;   pinmux           =      gpio0           gpio0           gpio                   gpio1_2_4_7         gpio1 gpio2 gpio4 gpio7         gpio                   gpio3_6         gpio3 gpio6                gpio5           gpio5           clk32k-out           regulators                                                                                       -           ?           R      sd0         c+VDD_CPU_AP         r 
`         \         5g         5g                                   sd1       
  c+VDD_CORE           r 
`         p         &%         &%                                   sd2         c+1.35V_LP0(sd2)         r p         p                           =         sd3         c+1.35V_LP0(sd3)         r p         p                        sd4         c+1.05V_RUN          r                   =         sd5         c+1.8V_VDDIO         r w@         w@                           =         sd6         c+VDD_GPU_AP         r 	         O         5g         5g                           =         ldo0            c+1.05V_RUN_AVDD         r                                                =   &      ldo1            c+1.8V_RUN_CAM           r w@         w@      ldo2            c+1.2V_GEN_AVDD          r O         O                        ldo3            c+1.00V_LP0_VDD_RTC          r B@         B@                                 ldo4            c+3.3V_RUN_CAM           r *         *         =   (      ldo5            c+1.2V_RUN_CAM_FRONT         r O         O      ldo6            c+VDDIO_SDMMC3           r w@         2Z         =   *      ldo7            c+1.05V_RUN_CAM_REAR         r                ldo9            c+2.8V_RUN_TOUCH         r *         *      ldo10           c+2.8V_RUN_CAM_AF            r *         *      ldo11           c+1.8V_RUN_VPP_FUSE          r w@         w@               i2c@7000d100              nvidia,tegra124-i2c              p                         ?                        +                           div-clk                       i2c         /                    4rx tx         	  #disabled          spi@7000d400          (    nvidia,tegra124-spi nvidia,tegra114-spi              p                         ;                        +                   )        spi               )        spi         /                    4rx tx           #okay       cros-ec@0             google,cros-ec-spi           =	             
                                     ,        :     i2c-tunnel            google,cros-ec-i2c-tunnel                        +            W       bq24735@9             ti,bq24735              	            
            H           i   
   H          sbs-battery@b             sbs,sbs-battery                     |                       keyboard-controller           google,cros-ec-keyb                                     D    ; < = > ? @ A	 B	 C  D  }  0  Y  1   
 d  " # (  \       V 
 |  } )   	  + ^  a    !  % $ '	 &
 +  , . / - 3 2 * 5	 4 9     	  	 

 8 l j       6 	  g i            spi@7000d600          (    nvidia,tegra124-spi nvidia,tegra114-spi              p                         R                        +                   ,        spi               ,        spi         /                    4rx tx         	  #disabled          spi@7000d800          (    nvidia,tegra124-spi nvidia,tegra114-spi              p                         S                        +                   .        spi               .        spi         /                    4rx tx         	  #disabled          spi@7000da00          (    nvidia,tegra124-spi nvidia,tegra114-spi              p                         ]                        +                   D        spi               D        spi         /                    4rx tx           #okay            }x@   flash@0           winbond,w25q32dw jedec,spi-nor                       1-          spi@7000dc00          (    nvidia,tegra124-spi nvidia,tegra114-spi              p                         ^                        +                   h        spi               h        spi         /                    4rx tx         	  #disabled          spi@7000de00          (    nvidia,tegra124-spi nvidia,tegra114-spi              p                         O                        +                   i        spi               i        spi         /                    4rx tx         	  #disabled          rtc@7000e000          '    nvidia,tegra124-rtc nvidia,tegra20-rtc               p                                                 pmc@7000e400              nvidia,tegra124-pmc              p                                  pclk clk32k_in          Q                                         4  ,        L            f  l                           =   ,      fuse@7000f800             nvidia,tegra124-efuse                p                                fuse                  '        fuse          cec@70015000              nvidia,tegra124-cec              pP                                                  cec       	  #disabled                     memory-controller@70019000            nvidia,tegra124-mc               p                                mc                  M                      ^                       =         external-memory-controller@7001b000           nvidia,tegra124-emc              p                       9        emc                                            =         sata@70020000             nvidia,tegra124-ahci                  pp             p        p                                   |      {        sata sata-oob                 |            {        sata sata-cold sata-oob       	  #disabled          hda@70030000          '    nvidia,tegra124-hda nvidia,tegra30-hda               p                         Q                  }            o        hda hda2hdmi hda2codec_2x                 }            o        hda hda2hdmi hda2codec_2x           #okay          usb@70090000              nvidia,tegra124-xusb          0       p	             p	            p	                 hcd fpci ipfs                   '          (         X         Y                       8                                         x  xusb_host xusb_host_src xusb_falcon_src xusb_ss xusb_ss_div2 xusb_ss_src xusb_hs_src xusb_fs_src pll_u_480m clk_m pll_e               Y                    xusb_host xusb_ss xusb_src          	           #okay                   !   "   #   $      #  !usb2-0 usb2-1 usb2-2 usb3-0 usb3-1          +           =           O   %        _           u   &                      %           %      padctl@7009f000           nvidia,tegra124-xusb-padctl              p	                              padctl          _           u   &                      %         =      pads       usb2            #okay       lanes      usb2-0          #okay                        xusb             =          usb2-1          #okay                        xusb             =   !      usb2-2          #okay                        xusb             =   "            ulpi          	  #disabled       lanes      ulpi-0        	  #disabled                            hsic          	  #disabled       lanes      hsic-0        	  #disabled                      hsic-1        	  #disabled                            pcie            #okay       lanes      pcie-0          #okay                        usb3-ss          =   #      pcie-1          #okay                        usb3-ss          =   $      pcie-2        	  #disabled                      pcie-3        	  #disabled                      pcie-4        	  #disabled                            sata          	  #disabled       lanes      sata-0        	  #disabled                               ports      usb2-0          #okay            otg          	        	   '      usb2-1          #okay            host            	   (      usb2-2          #okay            host            	   )      ulpi-0        	  #disabled          hsic-0        	  #disabled          hsic-1        	  #disabled          usb3-0          #okay            	          usb3-1          #okay            	               mmc@700b0000              nvidia,tegra124-sdhci                p                                                   sdhci                         sdhci         	  #disabled          mmc@700b0200              nvidia,tegra124-sdhci                p                                          	        sdhci                 	        sdhci         	  #disabled          mmc@700b0400              nvidia,tegra124-sdhci                p                                          E        sdhci                 E        sdhci           #okay            	5   
               	>   
               	J   
              	S           	]   *      mmc@700b0600              nvidia,tegra124-sdhci                p                                                  sdhci                         sdhci           #okay            	S            	j      thermal-sensor@700e2000           nvidia,tegra124-soctherm                  p             ` `                 soctherm-reg car-reg                    0          3            thermal edp                d      N        tsensor soctherm                  N      	  soctherm            	x            =   4   throttle-cfgs      heavy           	   d        	   U        	                       =   6            mipi@700e3000             nvidia,tegra124-mipi                 p0                       8      	  mipi-cal            	            =         clock@70110000            nvidia,tegra124-dfll          @       p             p             p            p                        >                 	           /        soc ref i2c                       dvco            Q            	dfllCPU_out         	  0        
           
#           
5   
        
?            
I         	  #disabled             =   /      ahub@70300000             nvidia,tegra124-ahub          0       p0             p0            p0                        g                  j      k        d_audio apbif                 j      k                        e      f      l      m      n      
                                                                  l  d_audio apbif i2s0 i2s1 i2s2 i2s3 i2s4 dam0 dam1 dam2 spdif amx amx1 adx adx1 afc0 afc1 afc2 afc3 afc4 afc5         /                                                                                                                              P  4rx0 tx0 rx1 tx1 rx2 tx2 rx3 tx3 rx4 tx4 rx5 tx5 rx6 tx6 rx7 tx7 rx8 tx8 rx9 tx9                                +      i2s@70301000              nvidia,tegra124-i2s              p0                
S                                           i2s       	  #disabled          i2s@70301100              nvidia,tegra124-i2s              p0                
S                                           i2s         #okay             =   <      i2s@70301200              nvidia,tegra124-i2s              p0                
S                                           i2s       	  #disabled          i2s@70301300              nvidia,tegra124-i2s              p0                
S                     e              e        i2s       	  #disabled          i2s@70301400              nvidia,tegra124-i2s              p0                
S                     f              f        i2s       	  #disabled             usb@7d000000          )    nvidia,tegra124-ehci nvidia,tegra30-ehci                 }         @                            
gutmi                                         usb         
p   +        #okay          usb-phy@7d000000          /    nvidia,tegra124-usb-phy nvidia,tegra30-usb-phy                }         @     }         @                            
gutmi                                       reg pll_u utmi-pads                             usb utmi-pads                       
{            
           
           
           
   	        
            
                      (           >            Q        o   ,            #okay            	   '         =   +      usb@7d004000          )    nvidia,tegra124-ehci nvidia,tegra30-ehci                 } @       @                            
gutmi                   :              :        usb         
p   -        #okay          usb-phy@7d004000          /    nvidia,tegra124-usb-phy nvidia,tegra30-usb-phy                } @       @     }         @                            
gutmi                   :                    reg pll_u utmi-pads               :              usb utmi-pads                       
{            
           
           
           
   	        
            
                      (           >           o   ,           #okay            	   (         =   -      usb@7d008000          )    nvidia,tegra124-ehci nvidia,tegra30-ehci                 }        @                 a           
gutmi                   ;              ;        usb         
p   .        #okay          usb-phy@7d008000          /    nvidia,tegra124-usb-phy nvidia,tegra30-usb-phy                }        @     }         @                 a           
gutmi                   ;                    reg pll_u utmi-pads               ;              usb utmi-pads                       
{            
           
           
           
   	        
            
                      (           >           o   ,           #okay            	   )         =   .      cpus                         +       cpu@0            cpu           arm,cortex-a15                     $                            /        cpu_g cpu_lp pll_x pll_p dfll           z          =   0      cpu@1            cpu           arm,cortex-a15                       =   1      cpu@2            cpu           arm,cortex-a15                       =   2      cpu@3            cpu           arm,cortex-a15                       =   3         pmu           arm,cortex-a15-pmu        0                                                      0   1   2   3      thermal-zones      cpu-thermal                                4       trips      cpu-shutdown-trip            X                  	   critical          throttle-trip                               hot          =   5         cooling-maps       map0               5           6                  mem-thermal                                4      trips      mem-shutdown-trip            X                  	   critical          mem-throttle-trip                               hot          cooling-maps             gpu-thermal                                4      trips      gpu-shutdown-trip                              	   critical          throttle-trip                               hot          =   7         cooling-maps       map0               7           6                  pllx-thermal                                   4      trips      pllx-shutdown-trip           X                  	   critical          pllx-throttle-trip                              hot          cooling-maps                timer             arm,armv7-timer       0                                 
                    aliases         /i2c@7000d000/pmic@40           /rtc@7000e000           /serial@70006000          chosen          serial0:115200n8          backlight             pwm-backlight              
   :            %   8        %   9    B@         *                    @              <            =         clock-32k             fixed-clock         I           Q             =         gpio-keys         
    gpio-keys      key-power           UPower           v   
              [   t        f   
         ,         regulator-mux             regulator-fixed       	  c+VDD_MUX            r                                       =   :      regulator-5v0sys              regulator-fixed         c+5V_SYS         r LK@         LK@                          x   :         =         regulator-3v3sys              regulator-fixed       
  c+3.3V_SYS           r 2Z         2Z                          x   :         =         regulator-3v3run              regulator-fixed       
  c+3.3V_RUN           r 2Z         2Z                             ;                        x            =         regulator-hdmi            regulator-fixed         c+3.3V_AVDD_HDMI_AP_GATED            r 2Z         2Z        x            =         regulator-led             regulator-fixed       	  c+VDD_LED            r 2Z         2Z           
   z                     x   :         =   8      regulator-ts              regulator-fixed         c+5V_VDD_TS_SW           r LK@         LK@                    
   Q                     x         regulator-usb1            regulator-fixed         c+5V_USB_HS          r LK@         LK@           
   l                              x            =   '      regulator-usb3            regulator-fixed         c+5V_USB_SS          r LK@         LK@           
   m                              x            =   )      regulator-panel           regulator-fixed         c+3.3V_PANEL         r 2Z         2Z           ;                        x            =         regulator-lp0             regulator-fixed       
  c+3.3V_LP0           r 2Z         2Z                    ;                        x            =   %      regulator-hdmipll             regulator-fixed         c+1.05V_RUN_AVDD_HDMI_PLL            r                     
   ?           x            =         regulator-hdmicon             regulator-fixed         c+5V_HDMI_CON            r LK@         LK@           
   V                     x            =         sound         @    nvidia,tegra-audio-max98090-venice2 nvidia,tegra-audio-max98090         NVIDIA Tegra Venice2          Y  Headphones HPR Headphones HPL Speakers SPKR Speakers SPKL Mic Jack MICBIAS IN34 Mic Jack               <           =                        ,            pll_a pll_a_out0 mclk                 x   ,                        x         	compatible interrupt-parent #address-cells #size-cells model phandle opp-microvolt opp-hz opp-supported-hw opp-suspend opp-peak-kBps device_type reg reg-names interrupts interrupt-names #interrupt-cells interrupt-map-mask interrupt-map bus-range ranges clocks clock-names resets reset-names status assigned-addresses nvidia,num-lanes iommus nvidia,head interconnects interconnect-names vdd-supply pll-supply hdmi-supply nvidia,ddc-i2c-bus nvidia,hpd-gpio nvidia,mipi-calibrate avdd-io-hdmi-dp-supply vdd-hdmi-dp-pll-supply nvidia,dpaux nvidia,panel power-supply backlight interrupt-controller #clock-cells #reset-cells nvidia,external-memory-controller operating-points-v2 #cooling-cells #gpio-cells gpio-controller gpio-ranges #dma-cells pinctrl-names pinctrl-0 nvidia,pins nvidia,function nvidia,enable-input nvidia,pull nvidia,tristate nvidia,lock nvidia,open-drain nvidia,rcv-sel nvidia,high-speed-mode nvidia,schmitt nvidia,pull-down-strength nvidia,pull-up-strength nvidia,slew-rate-rising nvidia,slew-rate-falling nvidia,low-power-mode nvidia,drive-type reg-shift dmas dma-names #pwm-cells clock-frequency linux,gpio-keymap ams,system-power-controller bias-pull-down bias-pull-up bias-high-impedance vsup-sd2-supply vsup-sd3-supply vsup-sd4-supply vsup-sd5-supply vin-ldo0-supply vin-ldo1-6-supply vin-ldo2-5-7-supply vin-ldo3-4-supply vin-ldo9-10-supply vin-ldo11-supply regulator-name regulator-min-microvolt regulator-max-microvolt regulator-min-microamp regulator-max-microamp regulator-always-on regulator-boot-on ams,ext-control ams,enable-tracking spi-max-frequency wakeup-source google,cros-ec-spi-msg-delay google,remote-bus ti,ac-detect-gpios sbs,i2c-retry-count sbs,poll-retry-count keypad,num-rows keypad,num-columns google,needs-ghost-filter linux,keymap nvidia,invert-interrupt nvidia,suspend-mode nvidia,cpu-pwr-good-time nvidia,cpu-pwr-off-time nvidia,core-pwr-good-time nvidia,core-pwr-off-time nvidia,core-power-req-active-high nvidia,sys-clock-req-active-high hdmi-phandle #iommu-cells #interconnect-cells nvidia,memory-controller nvidia,xusb-padctl phys phy-names avddio-pex-supply dvddio-pex-supply avdd-usb-supply avdd-pll-utmip-supply avdd-pll-erefe-supply avdd-usb-ss-pll-supply hvdd-usb-ss-supply hvdd-usb-ss-pll-e-supply avdd-pex-pll-supply hvdd-pex-pll-e-supply #phy-cells usb-role-switch vbus-supply nvidia,usb2-companion cd-gpios power-gpios wp-gpios bus-width vqmmc-supply non-removable #thermal-sensor-cells nvidia,priority nvidia,cpu-throt-percent nvidia,gpu-throt-level #nvidia,mipi-calibrate-cells clock-output-names nvidia,sample-rate nvidia,droop-ctrl nvidia,force-mode nvidia,cf nvidia,ci nvidia,cg nvidia,ahub-cif-ids phy_type nvidia,phy nvidia,hssync-start-delay nvidia,idle-wait-delay nvidia,elastic-limit nvidia,term-range-adj nvidia,xcvr-setup nvidia,xcvr-lsfslew nvidia,xcvr-lsrslew nvidia,hssquelch-level nvidia,hsdiscon-level nvidia,xcvr-hsslew nvidia,has-utmi-pad-registers nvidia,pmc clock-latency interrupt-affinity polling-delay-passive polling-delay thermal-sensors temperature hysteresis trip cooling-device rtc0 rtc1 serial0 stdout-path enable-gpios pwms brightness-levels default-brightness-level label linux,code debounce-interval vin-supply enable-active-high gpio-open-drain nvidia,model nvidia,audio-routing nvidia,i2s-controller nvidia,audio-codec assigned-clocks assigned-clock-parents 