  l   8  b   (            	  b|                                                                  +   ,NetCube Systems Nagami Basic Carrier Board        B   2netcube,nagami-basic-carrier netcube,nagami allwinner,sun8i-t113s      dcxo-clk             2fixed-clock          =dcxo             P             ]n6          m         display-engine        #   2allwinner,sun20i-d1-display-engine           u            	   disabled             m   6      soc          2simple-bus                                                  pinctrl@2000000          2allwinner,sun20i-d1-pinctrl                      H          E          G          I          K          M          O                                     apb hosc losc                                                                             '           5           C           Q        {  _                                  CAN0_TX CAN0_RX CAN1_TX CAN1_RX UART3_TX UART3_RX                           eMMC_CLK eMMC_CMD eMMC_D2 eMMC_D1 eMMC_D0 eMMC_D3                                  USB_SEC_EN SPI1_CS SPI1_CLK SPI1_MOSI SPI1_MISO SPI1_HOLD SPI1_WP PD16    I2C2_SCL I2C2_SDA PD22          ETH_CRSDV ETH_RXD0 ETH_RXD1 ETH_TXCK ETH_TXD0 ETH_TXD1 ETH_TXEN  ETH_MDC ETH_MDIO QWIIC_nINT                      SD_D1 SD_D0 SD_CLK SD_CLK SD_D3 SD_D2 PF6                          ESP_CLK ESP_CMD ESP_D0 ESP_D1 ESP_D2 ESP_D3 UART1_TXD UART1_RXD ESP_nBOOT ESP_nRST I2C3_SCL I2C3_SDA I2S1_WS I2S1_CLK I2S1_DIN0 I2S1_DOUT0                           m      can0-pins           oPB2 PB3         tcan0             m         can1-pins           oPB4 PB5         tcan1             m         clk-pg11-pin            oPG11            tclk          m   7      dsi-4lane-pins        (  oPD0 PD1 PD2 PD3 PD4 PD5 PD6 PD7 PD8 PD9         }           tdsi          m   8      i2c2-pd-pins          
  oPD20 PD21           ti2c2             m         i2c3-pg-pins          
  oPG10 PG11           ti2c3             m         i2s1-pins         
  oPG12 PG13           ti2s1             m   	      i2s1-din0-pin           oPG14          	  ti2s1_din             m   
      i2s1-dout0-pin          oPG15          
  ti2s1_dout            m         lcd-rgb666-pins       d  oPD0 PD1 PD2 PD3 PD4 PD5 PD6 PD7 PD8 PD9 PD10 PD11 PD12 PD13 PD14 PD15 PD16 PD17 PD18 PD19 PD20 PD21         tlcd0             m   9      mmc0-pins           oPF0 PF1 PF2 PF3 PF4 PF5         tmmc0             m         mmc1-pins           oPG0 PG1 PG2 PG3 PG4 PG5         tmmc1             m         mmc2-pins           oPC2 PC3 PC4 PC5 PC6 PC7         tmmc2             m         rgmii-pe-pins         A  oPE0 PE1 PE2 PE3 PE4 PE5 PE6 PE7 PE8 PE9 PE11 PE12 PE13 PE14 PE15            temac             m   :      rmii-pe-pins          $  oPE0 PE1 PE2 PE3 PE4 PE5 PE6 PE8 PE9         temac             m         spi0-pins           oPC2 PC3 PC4 PC5         tspi0             m   ;      spi1-pins           oPD10 PD11 PD12 PD13         tspi1             m         spi1-hold-pin           oPD14            tspi1             m         spi1-wp-pin         oPD15            tspi1             m         uart1-pg6-pins          oPG6 PG7         tuart1            m         uart1-pg8-rts-cts-pins          oPG8 PG9         tuart1            m   <      uart3-pb-pins           oPB6 PB7         tuart3            m            clock-controller@2001000             2allwinner,sun20i-d1-ccu                                                 hosc losc iosc           P                       m         adc@2009000          2allwinner,sun20i-d1-gpadc                                P                               9         	   disabled                        m   =      dmic@2031000          2   2allwinner,sun20i-d1-dmic allwinner,sun50i-h6-dmic                                                  ]      \         bus mod               &                      rx        	   disabled                         m   >      i2s@2033000       2   2allwinner,sun20i-d1-i2s allwinner,sun50i-r329-i2s            0                                      W      S         apb mod               #                            rx tx            okay                           	   
           default          m   ?      i2s@2034000       2   2allwinner,sun20i-d1-i2s allwinner,sun50i-r329-i2s            @                                      X      T         apb mod               $                            rx tx         	   disabled                         m   @      timer@2050000         4   2allwinner,sun20i-d1-timer allwinner,sun8i-a23-timer                               ;          <                        m   A      watchdog@20500a0          6   2allwinner,sun20i-d1-wdt-reset allwinner,sun20i-d1-wdt                                 ?                            
   hosc losc         	   reserved             m   B      serial@2500000           2snps,dw-apb-uart             P                                                             >                                          tx rx         	   disabled             m   C      serial@2500400           2snps,dw-apb-uart             P                                                            ?                                          tx rx            okay                       default          m   D      serial@2500800           2snps,dw-apb-uart             P                                                            @                                          tx rx         	   disabled             m   E      serial@2500c00           2snps,dw-apb-uart             P                                                            A                                          tx rx            okay                       default          m   F      serial@2501000           2snps,dw-apb-uart             P                                                            B                                          tx rx         	   disabled             m   G      serial@2501400           2snps,dw-apb-uart             P                                                            C                                          tx rx         	   disabled             m   H      i2c@2502000       I   2allwinner,sun20i-d1-i2c allwinner,sun8i-v536-i2c allwinner,sun6i-a31-i2c             P                     	                  D                            +      +        rx tx         	   disabled                                       m   I      i2c@2502400       I   2allwinner,sun20i-d1-i2c allwinner,sun8i-v536-i2c allwinner,sun6i-a31-i2c             P$                    
                  E                            ,      ,        rx tx         	   disabled                                       m   J      i2c@2502800       I   2allwinner,sun20i-d1-i2c allwinner,sun8i-v536-i2c allwinner,sun6i-a31-i2c             P(                                      F                            -      -        rx tx            okay                                                 default          m   K      i2c@2502c00       I   2allwinner,sun20i-d1-i2c allwinner,sun8i-v536-i2c allwinner,sun6i-a31-i2c             P,                                      G                            .      .        rx tx            okay                                                 default          m   L   eeprom@50            2atmel,24c02             P                    
                                             m   M   macaddress@fa                           m               can@2504000          2allwinner,sun20i-d1-can          P@                                                    B        default                     okay             m   N      can@2504400          2allwinner,sun20i-d1-can          PD                                                    C        default                     okay             m   O      syscon@3000000        #   2allwinner,sun20i-d1-system-control                                                             m      regulators@3000150            2allwinner,sun20i-d1-system-ldos           P      ldoa             m   P      ldob             m   Q            dma-controller@3002000           2allwinner,sun20i-d1-dma                                2                  %      0      	   bus mbus                                     ,   0        9            m         efuse@3006000            2allwinner,sun20i-d1-sid           `                                      m   R      crypto@3040000           2allwinner,sun20i-d1-crypto                                4                   "      !      2               bus mod ram trng                           m   S      dram-controller@3102000          2allwinner,sun20i-d1-mbus                  0          
  Dmbus dram                   +                        /      7         mbus dram bus           N    @                                       Y            m   T      mmc@4020000          2allwinner,sun20i-d1-mmc                               (                  ;      8         ahb mmc                       mahb          y        р                  okay                                                 default                                                  m   U      mmc@4021000          2allwinner,sun20i-d1-mmc                              )                  <      9         ahb mmc                       mahb          y        р                  okay                                                 default                                                    m   V      mmc@4022000       4   2allwinner,sun20i-d1-emmc allwinner,sun50i-a100-emmc                               *                  =      :         ahb mmc                       mahb                  р                                             okay                                                 default                                                    m   W      spi@4025000       2   2allwinner,sun20i-d1-spi allwinner,sun50i-r329-spi            P                                      J      H         ahb mod                             rx tx                       	   disabled                                       m   X      spi@4026000       T   2allwinner,sun20i-d1-spi-dbi allwinner,sun50i-r329-spi-dbi allwinner,sun50i-r329-spi          `                                      K      I         ahb mod                             rx tx                          okay                                                       default         *             m   Y      usb@4100000       2   2allwinner,sun20i-d1-musb allwinner,sun8i-a33-musb                                            3mc                 g              .        C               J               Ousb          okay            Yotg          m   Z      phy@4100400          2allwinner,sun20i-d1-usb-phy                               Dphy_ctrl pmu0 pmu1                          usb0_phy usb1_phy                 (      )        musb0_reset usb1_reset            okay            a           l                      m         usb@4101000       &   2allwinner,sun20i-d1-ehci generic-ehci                                                  c      e      a              *      ,        J               Ousb          okay             m   [      usb@4101400       &   2allwinner,sun20i-d1-ohci generic-ohci                                                  c      a              *        J               Ousb          okay             m   \      usb@4200000       &   2allwinner,sun20i-d1-ehci generic-ehci                                  !                  d      f      b              +      -        J              Ousb          okay             m   ]      usb@4200400       &   2allwinner,sun20i-d1-ohci generic-ohci                                 "                  d      b              +        J              Ousb          okay             m   ^      ethernet@4500000          3   2allwinner,sun20i-d1-emac allwinner,sun50i-a64-emac           P                     .           3macirq                 M      
   stmmaceth                       
  mstmmaceth           ~            okay                       mac-address                    rmii                       default          m   _   mdio             2snps,dwmac-mdio                                    m   `   ethernet-phy@0           2ethernet-phy-ieee802.3-c22                        m               clock-controller@5000000          8   2allwinner,sun20i-d1-de2-clk allwinner,sun50i-h5-de2-clk                                              bus mod                        P                       m         mixer@5100000             2allwinner,sun20i-d1-de2-mixer-0                                              bus mod                         m      ports                                port@1                       m   a   endpoint                         m   %               mixer@5200000             2allwinner,sun20i-d1-de2-mixer-1                                              bus mod                        m      ports                                port@1                       m   b   endpoint               !         m   (               dsi@5450000       <   2allwinner,sun20i-d1-mipi-dsi allwinner,sun50i-a100-mipi-dsi          E                     \                  o   "            bus mod               3        J   #        Odphy          	   disabled             m   c   port       endpoint               $         m   .            phy@5451000       >   2allwinner,sun20i-d1-mipi-dphy allwinner,sun50i-a100-mipi-dphy            E                    \                  o      n         bus mod               3        a             m   #      tcon-top@5460000             2allwinner,sun20i-d1-tcon-top             F                     i      r      t      p         bus tcon-tv0 tve0 dsi            =tcon-top-tv0 tcon-top-dsi                 0         P            m   "   ports                                port@0                        m   d   endpoint               %         m             port@1                                                 m   e   endpoint@0                          &         m   ,      endpoint@2                         '         m   /         port@2                                                 m   f   endpoint@1                         (         m   !         port@3                                                 m   g   endpoint@0                          )         m   -      endpoint@2                         *         m   0         port@4                       m   h   endpoint               +         m   1         port@5                       m   i            lcd-controller@5461000           2allwinner,sun20i-d1-tcon-lcd             F                    Z                  q      p         ahb tcon-ch0             =tcon-pixel-clock                  4      6      	  mlcd lvds             P             m   j   ports                                port@0                                                  m   k   endpoint@0                          ,         m   &      endpoint@1                         -         m   )         port@1                                                 m   l   endpoint@1                         .         m   $               lcd-controller@5470000           2allwinner,sun20i-d1-tcon-tv          G                     [                  s   "             ahb tcon-ch1                  5        mlcd          m   m   ports                                port@0                                                  m   n   endpoint@0                          /         m   '      endpoint@1                         0         m   *         port@1                       m   o   endpoint               1         m   +               power-controller@7001000             2allwinner,sun20i-d1-ppu                           2              2                       m   p      clock-controller@7010000             2allwinner,sun20i-d1-r-ccu                                                         hosc losc iosc pll-periph            P                       m   2      rtc@7090000       2   2allwinner,sun20i-d1-rtc allwinner,sun50i-r329-rtc            	                                    2         2             bus hosc ahb             P            m         watchdog@1700400             2allwinner,sun20i-d1-wdt          p                     z                            
   hosc losc         	   reserved             m   q         cpus                                 cpu@0            2arm,cortex-a7           cpu                                      cpu            3         m   4      cpu@1            2arm,cortex-a7           cpu                                     cpu            3         m   5         interrupt-controller@1c81000             2arm,gic-400                     @     `                    	                                 m         timer            2arm,armv7-timer       0                                 
        pmu          2arm,cortex-a7-pmu                                           4   5      aliases         /soc/serial@2500400         /soc/serial@2500c00         /soc/ethernet@4500000         chosen          serial3:115200n8          regulator-3v3            2regulator-fixed         *vcc-3v3         9 2Z        Q 2Z         i         m         regulator-core           2regulator-fixed       	  *vcc-core            9 m        Q m        }            m   3      mux-controller        	   2gpio-mux                                 	                        m   r      wifi-pwrseq          2mmc-pwrseq-simple                    	                                 m         __symbols__       
  /dcxo-clk           ^/display-engine         /soc/pinctrl@2000000            /soc/pinctrl@2000000/can0-pins          /soc/pinctrl@2000000/can1-pins        "  /soc/pinctrl@2000000/clk-pg11-pin         $  /soc/pinctrl@2000000/dsi-4lane-pins       "  /soc/pinctrl@2000000/i2c2-pd-pins         "  ,/soc/pinctrl@2000000/i2c3-pg-pins           9/soc/pinctrl@2000000/i2s1-pins        #  C/soc/pinctrl@2000000/i2s1-din0-pin        $  Q/soc/pinctrl@2000000/i2s1-dout0-pin       %  `/soc/pinctrl@2000000/lcd-rgb666-pins            p/soc/pinctrl@2000000/mmc0-pins          z/soc/pinctrl@2000000/mmc1-pins          /soc/pinctrl@2000000/mmc2-pins        #  /soc/pinctrl@2000000/rgmii-pe-pins        "  /soc/pinctrl@2000000/rmii-pe-pins           /soc/pinctrl@2000000/spi0-pins          /soc/pinctrl@2000000/spi1-pins        #  /soc/pinctrl@2000000/spi1-hold-pin        !  /soc/pinctrl@2000000/spi1-wp-pin          $  /soc/pinctrl@2000000/uart1-pg6-pins       ,  /soc/pinctrl@2000000/uart1-pg8-rts-cts-pins       #  /soc/pinctrl@2000000/uart3-pb-pins          /soc/clock-controller@2001000           /soc/adc@2009000            /soc/dmic@2031000           /soc/i2s@2033000            /soc/i2s@2034000            $/soc/timer@2050000          */soc/watchdog@20500a0           ./soc/serial@2500000         4/soc/serial@2500400         :/soc/serial@2500800         @/soc/serial@2500c00         F/soc/serial@2501000         L/soc/serial@2501400         R/soc/i2c@2502000            W/soc/i2c@2502400            \/soc/i2c@2502800            a/soc/i2c@2502c00            f/soc/i2c@2502c00/eeprom@50        )  n/soc/i2c@2502c00/eeprom@50/macaddress@fa            ~/soc/can@2504000            /soc/can@2504400            ~/soc/syscon@3000000       ,  /soc/syscon@3000000/regulators@3000150/ldoa       ,  /soc/syscon@3000000/regulators@3000150/ldob         /soc/dma-controller@3002000         /soc/efuse@3006000          /soc/crypto@3040000         /soc/dram-controller@3102000            /soc/mmc@4020000            /soc/mmc@4021000            /soc/mmc@4022000            /soc/spi@4025000            /soc/spi@4026000            /soc/usb@4100000            /soc/phy@4100400            /soc/usb@4101000            /soc/usb@4101400            /soc/usb@4200000            /soc/usb@4200400            /soc/ethernet@4500000           /soc/ethernet@4500000/mdio        *  /soc/ethernet@4500000/mdio/ethernet-phy@0           /soc/clock-controller@5000000           /soc/mixer@5100000           /soc/mixer@5100000/ports/port@1       )  "/soc/mixer@5100000/ports/port@1/endpoint            =/soc/mixer@5200000           D/soc/mixer@5200000/ports/port@1       )  O/soc/mixer@5200000/ports/port@1/endpoint            j/soc/dsi@5450000            n/soc/dsi@5450000/port/endpoint          /soc/phy@5451000            /soc/tcon-top@5460000         #  /soc/tcon-top@5460000/ports/port@0        ,  /soc/tcon-top@5460000/ports/port@0/endpoint       #  /soc/tcon-top@5460000/ports/port@1        .  /soc/tcon-top@5460000/ports/port@1/endpoint@0         .  /soc/tcon-top@5460000/ports/port@1/endpoint@2         #  	/soc/tcon-top@5460000/ports/port@2        .  /soc/tcon-top@5460000/ports/port@2/endpoint@1         #  6/soc/tcon-top@5460000/ports/port@3        .  J/soc/tcon-top@5460000/ports/port@3/endpoint@0         .  h/soc/tcon-top@5460000/ports/port@3/endpoint@2         #  /soc/tcon-top@5460000/ports/port@4        ,  /soc/tcon-top@5460000/ports/port@4/endpoint       #  /soc/tcon-top@5460000/ports/port@5          u/soc/lcd-controller@5461000       )  /soc/lcd-controller@5461000/ports/port@0          4  /soc/lcd-controller@5461000/ports/port@0/endpoint@0       4  /soc/lcd-controller@5461000/ports/port@0/endpoint@1       )  		/soc/lcd-controller@5461000/ports/port@1          4  	/soc/lcd-controller@5461000/ports/port@1/endpoint@1          /soc/lcd-controller@5470000       )  	)/soc/lcd-controller@5470000/ports/port@0          4  	5/soc/lcd-controller@5470000/ports/port@0/endpoint@0       4  	Q/soc/lcd-controller@5470000/ports/port@0/endpoint@1       )  	m/soc/lcd-controller@5470000/ports/port@1          2  	z/soc/lcd-controller@5470000/ports/port@1/endpoint           	/soc/power-controller@7001000           	/soc/clock-controller@7010000           	/soc/rtc@7090000            	/soc/watchdog@1700400           	/cpus/cpu@0         	/cpus/cpu@1         	/interrupt-controller@1c81000           	/regulator-3v3          	/regulator-core         	/mux-controller         	/wifi-pwrseq             	#address-cells #size-cells interrupt-parent model compatible clock-output-names #clock-cells clock-frequency phandle allwinner,pipelines status ranges dma-noncoherent reg interrupts clocks clock-names gpio-controller interrupt-controller #gpio-cells #interrupt-cells vcc-pb-supply vcc-pc-supply vcc-pd-supply vcc-pe-supply vcc-pf-supply vcc-pg-supply gpio-line-names pins function drive-strength #reset-cells resets #io-channel-cells dmas dma-names #sound-dai-cells pinctrl-0 pinctrl-names reg-io-width reg-shift pagesize read-only vcc-supply dma-channels dma-requests #dma-cells reg-names dma-ranges #interconnect-cells reset-names cap-sd-highspeed max-frequency no-mmc vmmc-supply broken-cd disable-wp bus-width non-removable mmc-pwrseq cap-mmc-highspeed mmc-ddr-1_8v mmc-ddr-3_3v no-sd no-sdio vqmmc-supply cs-gpios interrupt-names extcon phys phy-names dr_mode #phy-cells usb0_id_det-gpios syscon nvmem-cells nvmem-cell-names phy-handle phy-mode remote-endpoint #power-domain-cells device_type cpu-supply interrupt-affinity serial1 serial3 ethernet0 stdout-path regulator-name regulator-min-microvolt regulator-max-microvolt regulator-always-on vin-supply #mux-control-cells mux-gpios idle-state reset-gpios post-power-on-delay-ms power-off-delay-us dcxo pio can0_pins can1_pins clk_pg11_pin dsi_4lane_pins i2c2_pd_pins i2c3_pg_pins i2s1_pins i2s1_din0_pin i2s1_dout0_pin lcd_rgb666_pins mmc0_pins mmc1_pins mmc2_pins rgmii_pe_pins rmii_pe_pins spi0_pins spi1_pins spi1_hold_pin spi1_wp_pin uart1_pg6_pins uart1_pg8_rts_cts_pins uart3_pb_pins ccu gpadc dmic i2s1 i2s2 timer wdt uart0 uart1 uart2 uart3 uart4 uart5 i2c0 i2c1 i2c2 i2c3 eeprom0 eth0_macaddress can0 can1 reg_ldoa reg_ldob dma sid crypto mbus mmc0 mmc1 mmc2 spi0 spi1 usb_otg usbphy ehci0 ohci0 ehci1 ohci1 emac mdio lan8720a display_clocks mixer0 mixer0_out mixer0_out_tcon_top_mixer0 mixer1 mixer1_out mixer1_out_tcon_top_mixer1 dsi dsi_in_tcon_lcd0 dphy tcon_top tcon_top_mixer0_in tcon_top_mixer0_in_mixer0 tcon_top_mixer0_out tcon_top_mixer0_out_tcon_lcd0 tcon_top_mixer0_out_tcon_tv0 tcon_top_mixer1_in tcon_top_mixer1_in_mixer1 tcon_top_mixer1_out tcon_top_mixer1_out_tcon_lcd0 tcon_top_mixer1_out_tcon_tv0 tcon_top_hdmi_in tcon_top_hdmi_in_tcon_tv0 tcon_top_hdmi_out tcon_lcd0_in tcon_lcd0_in_tcon_top_mixer0 tcon_lcd0_in_tcon_top_mixer1 tcon_lcd0_out tcon_lcd0_out_dsi tcon_tv0_in tcon_tv0_in_tcon_top_mixer0 tcon_tv0_in_tcon_top_mixer1 tcon_tv0_out tcon_tv0_out_tcon_top_hdmi ppu r_ccu rtc dsp_wdt cpu0 cpu1 gic reg_vcc3v3 reg_vcc_core usb0_sec_mux wifi_pwrseq 