     8  $   (            
                                                          google,veyron-mickey-rev8 google,veyron-mickey-rev7 google,veyron-mickey-rev6 google,veyron-mickey-rev5 google,veyron-mickey-rev4 google,veyron-mickey-rev3 google,veyron-mickey-rev2 google,veyron-mickey-rev1 google,veyron-mickey-rev0 google,veyron-mickey google,veyron rockchip,rk3288             &            7Google Mickey      aliases          =/ethernet@ff290000           G/pinctrl/gpio@ff750000           M/pinctrl/gpio@ff780000           S/pinctrl/gpio@ff790000           Y/pinctrl/gpio@ff7a0000           _/pinctrl/gpio@ff7b0000           e/pinctrl/gpio@ff7c0000           k/pinctrl/gpio@ff7d0000           q/pinctrl/gpio@ff7e0000           w/pinctrl/gpio@ff7f0000           }/i2c@ff650000            /i2c@ff140000            /i2c@ff660000            /i2c@ff150000            /i2c@ff160000            /i2c@ff170000            /serial@ff180000             /serial@ff190000             /serial@ff690000             /serial@ff1b0000             /serial@ff1c0000             /spi@ff110000            /spi@ff120000            /spi@ff130000            /mmc@ff0f0000         arm-pmu          arm,cortex-a12-pmu        0                                                                      cpus                                       rockchip,rk3066-smp               cpu@500         cpu          arm,cortex-a12                                     '           ;           J              Q  r        k   	        w         cpu@501         cpu          arm,cortex-a12                                   '           ;           J              Q  r        w         cpu@502         cpu          arm,cortex-a12                                   '           ;           J              Q  r        w         cpu@503         cpu          arm,cortex-a12                                   '           ;           J              Q  r        w            opp-table-0          operating-points-v2                  w      opp-126000000                                  @      opp-216000000                               opp-408000000               Q                opp-600000000               #F                opp-696000000               )|          ~      opp-816000000               0,          B@      opp-1008000000              <                opp-1200000000              G                opp-1416000000              Tfr          O      opp-1512000000              ZJ                opp-1608000000              _"                 opp-1704000000              e          p      opp-1800000000              kI          \         reserved-memory                                      dma-unusable@fe000000                                  oscillator           fixed-clock         n6         xin24m                      w   
      timer            arm,armv7-timer                0                                 
          n6                timer@ff810000           rockchip,rk3288-timer                                         H           J     a   
        "pclk timer        display-subsystem            rockchip,display-subsystem          .            mmc@ff0c0000             rockchip,rk3288-dw-mshc         4р         J           D      r      v        "biu ciu ciu-drive ciu-sample            B                                           @                        Mreset         	  Ydisabled          mmc@ff0d0000             rockchip,rk3288-dw-mshc         4р         J           E      s      w        "biu ciu ciu-drive ciu-sample            B                   !                       @                        Mreset           Yokay            `            j         {                                     default                                                                                  mmc@ff0e0000             rockchip,rk3288-dw-mshc         4р         J           F      t      x        "biu ciu ciu-drive ciu-sample            B                   "                       @                        Mreset         	  Ydisabled          mmc@ff0f0000             rockchip,rk3288-dw-mshc         4р         J           G      u      y        "biu ciu ciu-drive ciu-sample            B                   #                       @                        Mreset           Yokay            `                    /            M         X                            default                        saradc@ff100000          rockchip,saradc                                      $           g           J      I     [        "saradc apb_pclk                W        Msaradc-apb        	  Ydisabled          spi@ff110000          (   rockchip,rk3288-spi rockchip,rk3066-spi         J      A     R        "spiclk apb_pclk         y                    ~tx rx                   ,           default                                                                          	  Ydisabled          spi@ff120000          (   rockchip,rk3288-spi rockchip,rk3066-spi         J      B     S        "spiclk apb_pclk         y                    ~tx rx                   -           default                                                                          	  Ydisabled          spi@ff130000          (   rockchip,rk3288-spi rockchip,rk3066-spi         J      C     T        "spiclk apb_pclk         y                    ~tx rx                   .           default                !   "   #                                                       Yokay                  flash@0          jedec,spi-nor                                i2c@ff140000             rockchip,rk3288-i2c                                      >                                     "i2c         J     M        default            $        Yokay                        2           d   tpm@20           infineon,slb9645tt                                i2c@ff150000             rockchip,rk3288-i2c                                      ?                                     "i2c         J     O        default            %      	  Ydisabled          i2c@ff160000             rockchip,rk3288-i2c                                      @                                     "i2c         J     P        default            &      	  Ydisabled                        2          ,      i2c@ff170000             rockchip,rk3288-i2c                                      A                                     "i2c         J     Q        default            '      	  Ydisabled          serial@ff180000       &   rockchip,rk3288-uart snps,dw-apb-uart                                        7                                 J      M     U        "baudclk apb_pclk            y                    ~tx rx           default            (   )   *        Yokay       bluetooth           default            +   ,   -         brcm,bcm43540-bt               .                  .               ,   .               @ -        J             serial@ff190000       &   rockchip,rk3288-uart snps,dw-apb-uart                                        8                                 J      N     V        "baudclk apb_pclk            y                    ~tx rx           default            /        Yokay          serial@ff690000       &   rockchip,rk3288-uart snps,dw-apb-uart               i                         9                                 J      O     W        "baudclk apb_pclk            default            0        Yokay          serial@ff1b0000       &   rockchip,rk3288-uart snps,dw-apb-uart                                        :                                 J      P     X        "baudclk apb_pclk            y                    ~tx rx           default            1      	  Ydisabled          serial@ff1c0000       &   rockchip,rk3288-uart snps,dw-apb-uart                                        ;                                 J      Q     Y        "baudclk apb_pclk            y      	      
        ~tx rx           default            2      	  Ydisabled          dma-controller@ff250000          arm,pl330 arm,primecell             %        @                                      a            l                 J            	  "apb_pclk            w         thermal-zones      reserve-thermal                                3          cpu-thermal            d                     3      trips      cpu_crit             _                	  critical          cpu_alert_almost_warm                               passive       cpu_alert_warm                              passive         w   4      cpu_alert_almost_hot             8                  passive         w   6      cpu_alert_hot            @P                  passive         w   7      cpu_alert_hotter             H                   passive         w   8      cpu_alert_very_hot           L                  passive         w   9         cooling-maps       cpu_warm_limit_cpu             4      0                                cpu_warm_limit_gpu             4           5            cpu_almost_hot_limit_cpu               6      0                                            cpu_hot_limit_cpu              7      0                                            cpu_hotter_limit_cpu               8      0                                            cpu_very_hot_limit_cpu             9      0                                cpu_very_hot_limit_gpu             9           5                  gpu-thermal            d                     3      trips      gpu_crit             _                	  critical          gpu_alert_warmish             `                  passive         w   :      gpu_alert_warm                              passive         w   ;      gpu_alert_hotter             H                   passive         w   <      gpu_alert_very_very_hot          O                  passive         w   =         cooling-maps       gpu_warmish_limit_gpu              :           5         gpu_warm_limit_cpu             ;      0                                            gpu_hotter_limit_gpu               <           5            gpu_very_very_hot_limit_gpu            =           5                  tsadc@ff280000           rockchip,rk3288-tsadc               (                         %           J      H     Z        "tsadc apb_pclk                       
  Mtsadc-apb           init default sleep             >           ?           >                   '   @        4 H        Yokay            K           b           w   3      ethernet@ff290000            rockchip,rk3288-gmac                )                                              }macirq eth_wake_irq         '   @      8  J            f      g      c                 ]      M  "stmmaceth mac_clk_rx mac_clk_tx clk_mac_ref clk_mac_refout aclk_mac pclk_mac                   B      
  Mstmmaceth         	  Ydisabled          usb@ff500000             generic-ehci                P                                    J                A        usb       	  Ydisabled                   usb@ff520000             generic-ohci                R                         )           J                A        usb       	  Ydisabled          usb@ff540000          2   rockchip,rk3288-usb rockchip,rk3066-usb snps,dwc2               T                                    J             "otg         host               B      	  usb2-phy                   	  Ydisabled                   usb@ff580000          2   rockchip,rk3288-usb rockchip,rk3066-usb snps,dwc2               X                                    J             "otg         host                                 	            @   @               C      	  usb2-phy            Yokay                  z        (   C               usb@ff5c0000             generic-ehci                \                                    J           	  Ydisabled          dma-controller@ff600000          arm,pl330 arm,primecell             `        @                                       a            l                 J            	  "apb_pclk          	  Ydisabled          i2c@ff650000             rockchip,rk3288-i2c             e                         <                                     "i2c         J     L        default            D        Yokay                        2           d   pmic@1b          rockchip,rk808                     xin32k wifibt_32kin          &   E                       default            F   G   H         ?         `                   n           z                                                          I           J          J                          w      regulators     DCDC_REG1           vdd_arm                            q        '          ?  q        w   	   regulator-state-mem          T         DCDC_REG2           vdd_gpu                            5         '         ?  q        w   {   regulator-state-mem          T         DCDC_REG3           vcc135_ddr                       regulator-state-mem          m         DCDC_REG4           vcc_18                             w@        ' w@        w      regulator-state-mem          m         w@         LDO_REG3            vdd_10                             B@        ' B@   regulator-state-mem          m         B@         LDO_REG7          
  vdd10_lcd                              B@        ' B@               SWITCH_REG1       
  vcc33_lcd                             w   ^   regulator-state-mem          T         LDO_REG8                               w@        ' w@      
  vcc18_lcd                           i2c@ff660000             rockchip,rk3288-i2c             f                         =                                     "i2c         J     N        default            K      	  Ydisabled                        2                 pwm@ff680000             rockchip,rk3288-pwm             h                            default            L        J     _      	  Ydisabled          pwm@ff680010             rockchip,rk3288-pwm             h                           default            M        J     _        Yokay            w         pwm@ff680020             rockchip,rk3288-pwm             h                            default            N        J     _      	  Ydisabled          pwm@ff680030             rockchip,rk3288-pwm             h 0                          default            O        J     _      	  Ydisabled          sram@ff700000         
   mmio-sram               p                                                 p       smp-sram@0           rockchip,rk3066-smp-sram                            sram@ff720000         #   rockchip,rk3288-pmu-sram mmio-sram              r               power-management@ff730000         &   rockchip,rk3288-pmu syscon simple-mfd               s                 w      power-controller          !   rockchip,rk3288-power-controller                                                 w   b   power-domain@9             	        J                                                                                   c     h     g     f     d     e      h      i      l      k      j      $     P   Q   R   S   T   U   V   W   X                  power-domain@11                    J            o      p           Y   Z                  power-domain@12                    J                      [                  power-domain@13                    J                 \   ]                     reboot-mode          syscon-reboot-mode                     RB         RB        RB	        RB         syscon@ff740000          rockchip,rk3288-sgrf syscon             t               clock-controller@ff760000            rockchip,rk3288-cru             v                 J   
        "xin24m          '   @                   #         H                                    j                k      $  0#gׄ e  рxh рxh        w         syscon@ff770000       &   rockchip,rk3288-grf syscon simple-mfd               w                 w   @   edp-phy          rockchip,rk3288-dp-phy          J      h        "24m         E          	  Ydisabled            w   r      io-domains        "   rockchip,rk3288-io-voltage-domain           Yokay            P   I        Z           e           s   I           I           ^                 usbphy           rockchip,rk3288-usb-phy                                   Yokay       usb-phy@320         E                       J      ]        "phyclk                                   
  Mphy-reset           w   C      usb-phy@334         E              4        J      ^        "phyclk                                   
  Mphy-reset           w   A      usb-phy@348         E              H        J      _        "phyclk                                   
  Mphy-reset           w   B            watchdog@ff800000             rockchip,rk3288-wdt snps,dw-wdt                              J     p                O           Yokay          sound@ff8b0000        ,   rockchip,rk3288-spdif rockchip,rk3066-spdif                                          J      T           
  "mclk hclk           y   _           ~tx                  6           default            `        '   @      	  Ydisabled          i2s@ff890000          (   rockchip,rk3288-i2s rockchip,rk3066-i2s                                                  5           J      R             "i2s_clk i2s_hclk            y   _       _           ~tx rx           default            a                              Yokay            w         crypto@ff8a0000          rockchip,rk3288-crypto                      @                 0            J                 }              "aclk hclk sclk apb_pclk                        Mcrypto-rst        iommu@ff900800           rockchip,iommu                      @                           J                   "aclk iface                    	  Ydisabled          iommu@ff914000           rockchip,iommu               @            P                                   J                   "aclk iface                             	  Ydisabled          rga@ff920000             rockchip,rk3288-rga                                                J                 j        "aclk hclk sclk          	   b   	               i      l      m        Mcore axi ahb          vop@ff930000             rockchip,rk3288-vop                                                             J                         "aclk_vop dclk_vop hclk_vop          	   b   	               d      e      f        Maxi ahb dclk            	%   c        Yokay       port                                      w      endpoint@0                      	,   d        w   w      endpoint@1                     	,   e        w   s      endpoint@2                     	,   f        w   m      endpoint@3                     	,   g        w   p            iommu@ff930300           rockchip,iommu                                                 J                   "aclk iface          	   b   	                    Yokay            w   c      vop@ff940000             rockchip,rk3288-vop                                                             J                         "aclk_vop dclk_vop hclk_vop          	   b   	                                   Maxi ahb dclk            	%   h      	  Ydisabled       port                                      w      endpoint@0                      	,   i        w   x      endpoint@1                     	,   j        w   t      endpoint@2                     	,   k        w   n      endpoint@3                     	,   l        w   q            iommu@ff940300           rockchip,iommu                                                 J                   "aclk iface          	   b   	                  	  Ydisabled            w   h      dsi@ff960000          *   rockchip,rk3288-mipi-dsi snps,dw-mipi-dsi                       @                            J      ~     d      	  "ref pclk            	   b   	        '   @      	  Ydisabled       ports                                port@0                                           endpoint@0                      	,   m        w   f      endpoint@1                     	,   n        w   k         port@1                         lvds@ff96c000            rockchip,rk3288-lvds                       @         J     g      
  "pclk_lvds           lcdc               o        	   b   	        '   @      	  Ydisabled       ports                                port@0                                           endpoint@0                      	,   p        w   g      endpoint@1                     	,   q        w   l         port@1                         dp@ff970000          rockchip,rk3288-dp                      @                 b                 h        (   
        J      i     c        "dp pclk            r        dp          	   b   	               o        Mdp          '   @      	  Ydisabled       ports                                port@0                                           endpoint@0                      	,   s        w   e      endpoint@1                     	,   t        w   j         port@1                         hdmi@ff980000            rockchip,rk3288-dw-hdmi                                                 g           J     h      m      n        "iahb isfr cec           	   b   	        '   @                    Yokay            default unwedge            u           v        w      ports                                port@0                                           endpoint@0                      	,   w        w   d      endpoint@1                     	,   x        w   i         port@1                         video-codec@ff9a0000             rockchip,rk3288-vpu                                      	          
         
  }vepu vdpu           J                 
  "aclk hclk           	%   y        	   b         iommu@ff9a0800           rockchip,iommu                                                 J                   "aclk iface                      	   b           w   y      iommu@ff9c0440           rockchip,iommu               @       @           @                o           J                   "aclk iface                    	  Ydisabled          gpu@ffa30000          #   rockchip,rk3288-mali arm,mali-t760                             $                                         }job mmu gpu         J              '   z        ;           	   b           Yokay            	<   {        w   5      opp-table-1          operating-points-v2         w   z   opp-100000000                         ~      opp-200000000                         ~      opp-300000000                         B@      opp-400000000               ׄ                opp-600000000               #F                   qos@ffaa0000             rockchip,rk3288-qos syscon                                w   \      qos@ffaa0080             rockchip,rk3288-qos syscon                               w   ]      qos@ffad0000             rockchip,rk3288-qos syscon                                w   Q      qos@ffad0100             rockchip,rk3288-qos syscon                               w   R      qos@ffad0180             rockchip,rk3288-qos syscon                              w   S      qos@ffad0400             rockchip,rk3288-qos syscon                               w   T      qos@ffad0480             rockchip,rk3288-qos syscon                              w   U      qos@ffad0500             rockchip,rk3288-qos syscon                               w   P      qos@ffad0800             rockchip,rk3288-qos syscon                               w   V      qos@ffad0880             rockchip,rk3288-qos syscon                              w   W      qos@ffad0900             rockchip,rk3288-qos syscon              	                 w   X      qos@ffae0000             rockchip,rk3288-qos syscon                                w   [      qos@ffaf0000             rockchip,rk3288-qos syscon                                w   Y      qos@ffaf0080             rockchip,rk3288-qos syscon                               w   Z      dma-controller@ffb20000          arm,pl330 arm,primecell                     @                                       a            l                 J            	  "apb_pclk            w   _      efuse@ffb40000           rockchip,rk3288-efuse                                                          J     q        "pclk_efuse     cpu-id@7                        cpu_leakage@17                         interrupt-controller@ffc01000            arm,gic-400          	H        	]                       @                                @             `                        	          w         pinctrl          rockchip,rk3288-pinctrl         '   @                                                     default            |   }   ~   gpio@ff750000            rockchip,gpio-bank              u                         Q           J     @         	n        	~            	H        	]         |  	PMIC_SLEEP_AP    PMIC_INT_L POWER_BUTTON_L    RECOVERY_SW_L OT_RESET   AP_WARM_RESET_H  I2C0_SDA_PMIC I2C0_SCL_PMIC  nFALUT         w   E      gpio@ff780000            rockchip,gpio-bank              x                         R           J     A         	n        	~            	H        	]         gpio@ff790000            rockchip,gpio-bank              y                         S           J     B         	n        	~            	H        	]         0  	CONFIG0 CONFIG1 CONFIG2     CONFIG3  EMMC_RST_L         w         gpio@ff7a0000            rockchip,gpio-bank              z                         T           J     C         	n        	~            	H        	]           	FLASH0_D0 FLASH0_D1 FLASH0_D2 FLASH0_D3 FLASH0_D4 FLASH0_D5 FLASH0_D6 FLASH0_D7         FLASH0_CS2/EMMC_CMD  FLASH0_DQS/EMMC_CLKO         gpio@ff7b0000            rockchip,gpio-bank              {                         U           J     D         	n        	~            	H        	]           	                UART0_RXD UART0_TXD UART0_CTS_L UART0_RTS_L SDIO0_D0 SDIO0_D1 SDIO0_D2 SDIO0_D3 SDIO0_CMD SDIO0_CLK BT_DEV_WAKE  WIFI_ENABLE_H BT_ENABLE_L WIFI_HOST_WAKE BT_HOST_WAKE          w   .      gpio@ff7c0000            rockchip,gpio-bank              |                         V           J     E         	n        	~            	H        	]         gpio@ff7d0000            rockchip,gpio-bank              }                         W           J     F         	n        	~            	H        	]         gpio@ff7e0000            rockchip,gpio-bank              ~                         X           J     G         	n        	~            	H        	]           	 PWM_LOG   TPM_INT_H SDMMC_DET_L AP_FLASH_WP_L  CPU_NMI DVSOK HDMI_WAKE POWER_HDMI_ON DVS1   DVS2 HDMI_CEC   I2C5_SDA_HDMI I2C5_SCL_HDMI  UART2_RXD UART2_TXD           w   J      gpio@ff7f0000            rockchip,gpio-bank                                       Y           J     H         	n        	~            	H        	]         ^  	RAM_ID0 RAM_ID1 RAM_ID2 RAM_ID3 I2C1_SDA_TPM I2C1_SCL_TPM SPI2_CLK SPI2_CS0 SPI2_RXD SPI2_TXD         hdmi       hdmi-cec-c0         	                  hdmi-cec-c7         	                  hdmi-ddc             	                                w   u      hdmi-ddc-unwedge             	                                 w   v      power-hdmi-on           	                     w            pcfg-output-low          	        w         pcfg-pull-up             	        w         pcfg-pull-down           	        w         pcfg-pull-none           	        w         pcfg-pull-none-12ma          	        	           w         suspend    global-pwroff           	                      w   ~      ddrio-pwroff            	                     w   }      ddr0-retention          	                     w   |      ddr1-retention          	                      edp    edp-hpd         	                     i2c0       i2c0-xfer            	                                  w   D         i2c1       i2c1-xfer            	                                w   $         i2c2       i2c2-xfer            	      	            
              w   K         i2c3       i2c3-xfer            	                                w   %         i2c4       i2c4-xfer            	                                w   &         i2c5       i2c5-xfer            	                                w   '         i2s0       i2s0-bus          `  	                                                                                 w   a         lcdc       lcdc-ctl          @  	                                                        w   o         sdmmc      sdmmc-clk           	                  sdmmc-cmd           	                  sdmmc-cd            	                  sdmmc-bus1          	                  sdmmc-bus4        @  	                                                         sdio0      sdio0-bus1          	                  sdio0-bus4        @  	                                                        w         sdio0-cmd           	                    w         sdio0-clk           	                    w         sdio0-cd            	                  sdio0-wp            	                  sdio0-pwr           	                  sdio0-bkpwr         	                  sdio0-int           	                  wifienable-h            	                     w         bt-enable-l         	                     w   ,      bt-host-wake            	                   bt-host-wake-l          	                     w   +      bt-dev-wake-sleep           	                   bt-dev-wake-awake           	                   bt-dev-wake         	                     w   -         sdio1      sdio1-bus1          	                  sdio1-bus4        @  	                                                      sdio1-cd            	                  sdio1-wp            	                  sdio1-bkpwr         	                  sdio1-int           	                  sdio1-cmd           	                  sdio1-clk           	                  sdio1-pwr           	      	               emmc       emmc-clk            	                    w         emmc-cmd            	                    w         emmc-pwr            	      	            emmc-bus1           	                   emmc-bus4         @  	                                                       emmc-bus8           	                                                                                                         w         emmc-reset          	      	               w            spi0       spi0-clk            	                    w         spi0-cs0            	                    w         spi0-tx         	                    w         spi0-rx         	                    w         spi0-cs1            	                     spi1       spi1-clk            	                    w         spi1-cs0            	                    w         spi1-rx         	                    w         spi1-tx         	                    w            spi2       spi2-cs1            	                  spi2-clk            	                    w          spi2-cs0            	                    w   #      spi2-rx         	                    w   "      spi2-tx         	      	              w   !         uart0      uart0-xfer           	                                w   (      uart0-cts           	                    w   )      uart0-rts           	                    w   *         uart1      uart1-xfer           	                  	              w   /      uart1-cts           	      
            uart1-rts           	                     uart2      uart2-xfer           	                                w   0         uart3      uart3-xfer           	                                w   1      uart3-cts           	      	            uart3-rts           	      
               uart4      uart4-xfer           	                                w   2      uart4-cts           	                  uart4-rts           	                     tsadc      otp-pin         	       
               w   >      otp-out         	       
              w   ?         pwm0       pwm0-pin            	                     w   L         pwm1       pwm1-pin            	                    w   M         pwm2       pwm2-pin            	                    w   N         pwm3       pwm3-pin            	                    w   O         gmac       rgmii-pins          	                                                                                                                                           	                                                rmii-pins           	                                                                                                                                  spdif      spdif-tx            	                    w   `         pcfg-pull-none-drv-8ma           	        	           w         pcfg-pull-up-drv-8ma             	        	         pcfg-output-high             	        w         buttons    pwr-key-l           	                      w            pmic       pmic-int-l          	                      w   F      dvs-1           	                     w   G      dvs-2           	                     w   H         reboot     ap-warm-reset-h         	                      w            recovery-switch    rec-mode-l          	       	                tpm    tpm-int-h           	                      write-protect      fw-wp-ap            	                         chosen          	serial2:115200n8          memory          memory                               power-button          
   gpio-keys           default               key-power           
Power              E              
	   t        
   d         `         gpio-restart             gpio-restart               E               default                    
&         emmc-pwrseq          mmc-pwrseq-emmc                    default         
/      	            w         sdio-pwrseq          mmc-pwrseq-simple           J            
  "ext_clock           default                    
/   .              w         regulator-vcc-5v             regulator-fixed         vcc_5v                             LK@        ' LK@        
;           w         regulator-vcc33-sys          regulator-fixed       
  vcc33_sys                              2Z        ' 2Z        w         regulator-vcc50-hdmi             regulator-fixed         vcc50_hdmi                            
;            
F        
Y   J               default                  regulator-vdd-logic          pwm-regulator         
  vdd_logic           
^                     
c           
n   {            
                              ~        ' p        ?        regulator-vcc33-io           regulator-fixed       	  vcc33_io                              
;           w   I      sound         !   rockchip,rockchip-audio-max98090            
VEYRON-HDMI         
           
            	#address-cells #size-cells compatible interrupt-parent model ethernet0 gpio0 gpio1 gpio2 gpio3 gpio4 gpio5 gpio6 gpio7 gpio8 i2c0 i2c1 i2c2 i2c3 i2c4 i2c5 serial0 serial1 serial2 serial3 serial4 spi0 spi1 spi2 mmc0 interrupts interrupt-affinity enable-method rockchip,pmu device_type reg resets operating-points-v2 #cooling-cells clocks dynamic-power-coefficient cpu0-supply phandle opp-shared opp-hz opp-microvolt clock-latency-ns ranges clock-frequency clock-output-names #clock-cells arm,cpu-registers-not-fw-configured arm,no-tick-in-suspend clock-names ports max-frequency fifo-depth reset-names status bus-width cap-sd-highspeed cap-sdio-irq keep-power-in-suspend mmc-pwrseq non-removable pinctrl-names pinctrl-0 sd-uhs-sdr12 sd-uhs-sdr25 sd-uhs-sdr50 sd-uhs-sdr104 vmmc-supply vqmmc-supply cap-mmc-highspeed rockchip,default-sample-phase disable-wp mmc-hs200-1_8v #io-channel-cells dmas dma-names rx-sample-delay-ns spi-max-frequency i2c-scl-falling-time-ns i2c-scl-rising-time-ns powered-while-suspended reg-shift reg-io-width host-wakeup-gpios shutdown-gpios device-wakeup-gpios max-speed brcm,bt-pcm-int-params #dma-cells arm,pl330-broken-no-flushp arm,pl330-periph-burst polling-delay-passive polling-delay thermal-sensors temperature hysteresis trip cooling-device pinctrl-1 pinctrl-2 #thermal-sensor-cells rockchip,grf rockchip,hw-tshut-temp rockchip,hw-tshut-mode rockchip,hw-tshut-polarity interrupt-names phys phy-names needs-reset-on-resume dr_mode snps,reset-phy-on-wake snps,need-phy-for-wake g-np-tx-fifo-size g-rx-fifo-size g-tx-fifo-size assigned-clocks assigned-clock-parents rockchip,system-power-controller wakeup-source vcc1-supply vcc2-supply vcc3-supply vcc4-supply vcc7-supply vcc8-supply vddio-supply dvs-gpios vcc11-supply regulator-name regulator-always-on regulator-boot-on regulator-min-microvolt regulator-max-microvolt regulator-ramp-delay regulator-off-in-suspend regulator-on-in-suspend regulator-suspend-microvolt regulator-suspend-mem-disabled #pwm-cells #power-domain-cells pm_qos offset mode-normal mode-recovery mode-bootloader mode-loader #reset-cells assigned-clock-rates #phy-cells bb-supply dvp-supply flash0-supply gpio1830-supply gpio30-supply lcdc-supply wifi-supply #sound-dai-cells rockchip,playback-channels rockchip,capture-channels #iommu-cells rockchip,disable-mmu-reset power-domains iommus remote-endpoint mali-supply interrupt-controller #interrupt-cells gpio-controller #gpio-cells gpio-line-names rockchip,pins output-low bias-pull-up bias-pull-down bias-disable drive-strength output-high stdout-path label linux,code debounce-interval priority reset-gpios vin-supply enable-active-high gpio pwms pwm-supply pwm-dutycycle-range pwm-dutycycle-unit rockchip,model rockchip,hdmi-codec rockchip,i2s-controller 