  e   8  _   (            1  _`                                                                  $   ,rockchip,rk3229-evb rockchip,rk3229       !   7Rockchip RK3229 Evaluation board       aliases          =/pinctrl/gpio@11110000           C/pinctrl/gpio@11120000           I/pinctrl/gpio@11130000           O/pinctrl/gpio@11140000           U/serial@11010000             ]/serial@11020000             e/serial@11030000             m/spi@11090000            r/mmc@30020000         cpus                                 cpu@f00          wcpu          ,arm,cortex-a7                                                                              psci                                  cpu@f01          wcpu          ,arm,cortex-a7                                                              psci                                  cpu@f02          wcpu          ,arm,cortex-a7                                                              psci                                  cpu@f03          wcpu          ,arm,cortex-a7                                                              psci                                     opp-table-0          ,operating-points-v2                          opp-408000000                Q           ~           @         
      opp-600000000                #F                 opp-816000000                0,           B@      opp-1008000000               <                 opp-1200000000               G           tx      opp-1296000000               M?d           7      opp-1392000000               R<                 opp-1464000000               WB           \         arm-pmu          ,arm,cortex-a7-pmu         0         L          M          N          O           !                  psci             ,arm,psci-1.0 arm,psci-0.2            smc       timer            ,arm,armv7-timer          4      0                                
          Xn6       oscillator           ,fixed-clock         Xn6         hxin24m          {                +      display-subsystem            ,rockchip,display-subsystem             	      i2s1@100b0000         (   ,rockchip,rk3228-i2s rockchip,rk3066-i2s              @                           i2s_clk i2s_hclk                   Q                
      
           tx rx           default                  	  disabled          i2s0@100c0000         (   ,rockchip,rk3228-i2s rockchip,rk3066-i2s              @                           i2s_clk i2s_hclk                   P                
      
           tx rx         	  disabled          spdif@100d0000           ,rockchip,rk3228-spdif                                                  S           
  mclk hclk              
   
        tx          default                  	  disabled          i2s2@100e0000         (   ,rockchip,rk3228-i2s rockchip,rk3066-i2s              @                           i2s_clk i2s_hclk                   R                
       
           tx rx         	  disabled          syscon@11000000       &   ,rockchip,rk3228-grf syscon simple-mfd                                                       ,   io-domains        "   ,rockchip,rk3228-io-voltage-domain           okay                                           power-controller          !   ,rockchip,rk3228-power-controller                                                     2   power-domain@4                    8                                                                                 power-domain@5                                                                     power-domain@6                                                               power-domain@7                                                                               power-domain@8                                                             usb2phy@760          ,rockchip,rk3228-usb2phy            `                          phyclk          husb480m_phy0            {            okay                F   otg-port          $         ;          <          =           otg-bvalid otg-id linestate                     okay                E      host-port                  >         
  linestate                       okay            (               G         usb2phy@800          ,rockchip,rk3228-usb2phy                                       phyclk          husb480m_phy1            {            okay                H   otg-port                   D         
  linestate                       okay            (               I      host-port                  E         
  linestate                       okay            (               J            serial@11010000          ,snps,dw-apb-uart                                 7           Xn6                M     U        baudclk apb_pclk            default                          3           =         	  disabled          serial@11020000          ,snps,dw-apb-uart                                 8           Xn6                N     V        baudclk apb_pclk            default                    3           =         	  disabled          serial@11030000          ,snps,dw-apb-uart                                 9           Xn6                O     W        baudclk apb_pclk            default                    3           =           okay          efuse@11040000           ,rockchip,rk3228-efuse                                G        pclk_efuse                              id@7                         cpu_leakage@17                          i2c@11050000             ,rockchip,rk3228-i2c                              $                                     i2c               L        default                  	  disabled          i2c@11060000             ,rockchip,rk3228-i2c                              %                                     i2c               M        default                  	  disabled          i2c@11070000             ,rockchip,rk3228-i2c                              &                                     i2c               N        default                   	  disabled          i2c@11080000             ,rockchip,rk3228-i2c                              '                                     i2c               O        default            !      	  disabled          spi@11090000             ,rockchip,rk3228-spi          	                    1                                            A     R        spiclk apb_pclk         default            "   #   $   %   &      	  disabled          watchdog@110a0000             ,rockchip,rk3228-wdt snps,dw-wdt          
                    (                 b      	  disabled          pwm@110b0000             ,rockchip,rk3288-pwm                       J                 ^        default            '      	  disabled          pwm@110b0010             ,rockchip,rk3288-pwm                      J                 ^        default            (        okay                W      pwm@110b0020             ,rockchip,rk3288-pwm                       J                 ^        default            )        okay                X      pwm@110b0030             ,rockchip,rk3288-pwm           0           J                 ^        default            *      	  disabled          timer@110c0000        ,   ,rockchip,rk3228-timer rockchip,rk3288-timer                               +                 a   +        pclk timer        clock-controller@110e0000            ,rockchip,rk3228-cru                           +        xin24m          U   ,        {           b         H  o                                  k                b      $  #g0, e ррxhррxh                  dma-controller@110f0000          ,arm,pl330 arm,primecell              @                                                                       	  apb_pclk                
      thermal-zones      cpu-thermal            d                     -       trips      cpu_alert0           p                   ~passive             .      cpu_alert1           $                   ~passive             /      cpu_crit             _                	   ~critical             cooling-maps       map0               .      0                                map1               /      0                             tsadc@11150000           ,rockchip,rk3228-tsadc                                :                  H     X        tsadc apb_pclk          o      H                          W      
  tsadc-apb           init default sleep             0        !   1        +   0        5           K s        okay            b                -      hdmi-phy@12030000            ,rockchip,rk3228-hdmi-phy                                m   +              sysclk refoclk refpclk          {            hhdmiphy_phy                   	  disabled                7      gpu@20000000          "   ,rockchip,rk3228-mali arm,mali-400                         H                                                                      gp gpmmu pp0 ppmmu0 pp1 ppmmu1                             	  bus core            y   2                  ~      	  disabled          video-codec@20020000          (   ,rockchip,rk3228-vpu rockchip,rk3399-vpu                                         	         
  vepu vdpu                             
  aclk hclk              3        y   2         iommu@20020800           ,rockchip,iommu                               
                               aclk iface          y   2                           3      video-codec@20030000          *   ,rockchip,rk3228-vdec rockchip,rk3399-vdec                                                                            axi ahb cabac core          o                                 4        y   2         iommu@20030480           ,rockchip,iommu               @    @                                              aclk iface          y   2                           4      vop@20050000             ,rockchip,rk3228-vop                                                                    aclk_vop dclk_vop hclk_vop                 d      e      f        axi ahb dclk               5        y   2         	  disabled       port                                          	   endpoint@0                          6            ;            iommu@20053f00           ,rockchip,iommu            ?                                                   aclk iface          y   2                     	  disabled                5      rga@20060000          (   ,rockchip,rk3228-rga rockchip,rk3288-rga                               !                                     aclk hclk sclk          y   2                  k      m      n        core axi ahb          iommu@20070800           ,rockchip,iommu                                                              aclk iface          y   2                     	  disabled          hdmi@200a0000            ,rockchip,rk3228-dw-hdmi           
             =                  #           o                 7              l      {              iahb isfr cec           default            8   9   :               `        hdmi               7        hdmi            U   ,      	  disabled       ports                                port@0                  endpoint               ;            6         port@1                          mmc@30000000          0   ,rockchip,rk3228-dw-mshc rockchip,rk3288-dw-mshc          0     @                                        D      r      v        biu ciu ciu-drive ciu-sample                       default            <   =   >      	  disabled          mmc@30010000          0   ,rockchip,rk3228-dw-mshc rockchip,rk3288-dw-mshc          0    @                                        E      s      w        biu ciu ciu-drive ciu-sample                       default            ?   @   A      	  disabled          mmc@30020000          0   ,rockchip,rk3228-dw-mshc rockchip,rk3288-dw-mshc          0    @                           X<4`        <4`                     G      u      y        biu ciu ciu-drive ciu-sample                                             default            B   C   D               S        reset           okay                      $      usb@30040000          2   ,rockchip,rk3228-usb rockchip,rk3066-usb snps,dwc2            0                                             otg         2otg         :           L          [            @                  E      	  usb2-phy            okay          usb@30080000             ,generic-ehci             0                                        F           G        usb         okay          usb@300a0000             ,generic-ohci             0
                                        F           G        usb         okay          usb@300c0000             ,generic-ehci             0                                        H           I        usb         okay          usb@300e0000             ,generic-ohci             0                                        H           I        usb         okay          usb@30100000             ,generic-ehci             0                    B                    H           J        usb         okay          usb@30120000             ,generic-ohci             0                    C                    H           J        usb         okay          ethernet@30200000            ,rockchip,rk3228-gmac             0                                macirq        8         ~                                   o      M  stmmaceth mac_clk_rx mac_clk_tx clk_mac_ref clk_mac_refout aclk_mac pclk_mac                   8      
  stmmaceth           U   ,        okay            o      }      ~           K      }        jinput           (   L        wrgmii           default            M           N                             ' B@           0                 qos@31030080             ,rockchip,rk3228-qos syscon           1                       qos@31030100             ,rockchip,rk3228-qos syscon           1                       qos@31030180             ,rockchip,rk3228-qos syscon           1                      qos@31030200             ,rockchip,rk3228-qos syscon           1                       qos@31040000             ,rockchip,rk3228-qos syscon           1                        qos@31050000             ,rockchip,rk3228-qos syscon           1                        qos@31060000             ,rockchip,rk3228-qos syscon           1                        qos@31070000             ,rockchip,rk3228-qos syscon           1                        qos@31070080             ,rockchip,rk3228-qos syscon           1                       interrupt-controller@32010000            ,arm,gic-400                                             2    2      2@     2`                   	                    pinctrl          ,rockchip,rk3228-pinctrl         U   ,                                     gpio@11110000            ,rockchip,gpio-bank                               3                 @                 
                             gpio@11120000            ,rockchip,gpio-bank                               4                 A                 
                             gpio@11130000            ,rockchip,gpio-bank                               5                 B                 
                                   N      gpio@11140000            ,rockchip,gpio-bank                               6                 C                 
                                   S      pcfg-pull-up                         R      pcfg-pull-down           #            Q      pcfg-pull-none           2            P      pcfg-pull-none-drv-12ma         ?               O      sdmmc      sdmmc-clk           N            O            <      sdmmc-cmd           N            O            =      sdmmc-bus4        @  N            O            O            O            O            >         sdio       sdio-clk            N             O            ?      sdio-cmd            N            O            @      sdio-bus4         @  N            O            O            O            O            A         emmc       emmc-clk            N            P            B      emmc-cmd            N            P            C      emmc-bus8           N            P            P            P            P            P            P            P            P            D         gmac       rgmii-pins          N            P            P            P            O            O            O            O      	      O            O            P            P            P            P            P            P            M      rmii-pins           N            P            P            P            O            O            O            P            P            P            P      phy-pins             N            P            P         hdmi       hdmi-hpd            N             Q            9      hdmii2c-xfer             N             P             P            8      hdmi-cec            N             P            :         i2c0       i2c0-xfer            N              P             P                     i2c1       i2c1-xfer            N             P             P                     i2c2       i2c2-xfer            N            P            P                      i2c3       i2c3-xfer            N             P             P            !         spi0       spi0-clk            N       	      R            "      spi0-cs0            N             R            %      spi0-tx         N             R            #      spi0-rx         N             R            $      spi0-cs1            N            R            &         spi1       spi1-clk            N             R      spi1-cs0            N            R      spi1-rx         N             R      spi1-tx         N            R      spi1-cs1            N            R         i2s1       i2s1-bus            N             P       	      P             P             P             P             P            P            P            P                     pwm0       pwm0-pin            N            P            '         pwm1       pwm1-pin            N             P            (         pwm2       pwm2-pin            N            P            )         pwm3       pwm3-pin            N            P            *         spdif      spdif-tx            N            P                     tsadc      otp-pin         N              P            0      otp-out         N             P            1         uart0      uart0-xfer           N            P            P                  uart0-cts           N            P                  uart0-rts           N             P                     uart1      uart1-xfer           N      	      P      
      P                  uart1-cts           N            P      uart1-rts           N            P         uart2      uart2-xfer           N            R            P                  uart21-xfer          N      
      R      	      P      uart2-cts           N             P      uart2-rts           N             P         keys       pwr-key         N             R            Y         usb    host-vbus-drv           N             P            T            memory@60000000          wmemory           `   @         regulator-dc-12v             ,regulator-fixed         \dc_12v           k                                         V      ext_gmac             ,fixed-clock         XsY@      	  hext_gmac            {                K      regulator-vcc-host           ,regulator-fixed                     S               default            T      	  \vcc_host             k                    U                  regulator-vcc-phy            ,regulator-fixed                  \vcc_phy          w@         w@         k                                L      regulator-vcc-sys            ,regulator-fixed         \vcc_sys          k                  LK@         LK@           V            U      regulator-vccio-1v8          ,regulator-fixed       
  \vccio_1v8            w@         w@         k           U                  regulator-vccio-3v3          ,regulator-fixed       
  \vccio_3v3            2Z         2Z         k           U                  regulator-vdd-arm            ,pwm-regulator              W      a              U        \vdd_arm          ~         \         k                           regulator-vdd-log            ,pwm-regulator              X      a              U        \vdd_log          B@                   k               gpio-keys         
   ,gpio-keys                    default            Y   power-key           GPIO Key Power              S                 t           d         #            	#address-cells #size-cells interrupt-parent compatible model gpio0 gpio1 gpio2 gpio3 serial0 serial1 serial2 spi0 mmc0 device_type reg resets operating-points-v2 #cooling-cells clocks enable-method cpu-supply phandle opp-shared opp-hz opp-microvolt clock-latency-ns opp-suspend interrupts interrupt-affinity arm,cpu-registers-not-fw-configured clock-frequency clock-output-names #clock-cells ports clock-names dmas dma-names pinctrl-names pinctrl-0 status vccio1-supply vccio2-supply vccio4-supply #power-domain-cells pm_qos interrupt-names #phy-cells phy-supply reg-shift reg-io-width #pwm-cells rockchip,grf #reset-cells assigned-clocks assigned-clock-rates #dma-cells arm,pl330-periph-burst polling-delay-passive polling-delay thermal-sensors temperature hysteresis trip cooling-device reset-names pinctrl-1 pinctrl-2 #thermal-sensor-cells rockchip,hw-tshut-temp rockchip,hw-tshut-mode power-domains iommus #iommu-cells remote-endpoint assigned-clock-parents phys phy-names fifo-depth max-frequency bus-width rockchip,default-sample-phase cap-mmc-highspeed non-removable dr_mode g-np-tx-fifo-size g-rx-fifo-size g-tx-fifo-size clock_in_out phy-mode snps,reset-gpio snps,reset-active-low snps,reset-delays-us tx_delay rx_delay interrupt-controller #interrupt-cells ranges gpio-controller #gpio-cells bias-pull-up bias-pull-down bias-disable drive-strength rockchip,pins regulator-name regulator-always-on regulator-boot-on regulator-min-microvolt regulator-max-microvolt enable-active-high vin-supply pwms pwm-supply autorepeat label gpios linux,code debounce-interval wakeup-source 