  sn   8  l   (              l                             #    geniatech,xpi-3128 rockchip,rk3128                                   +            7Geniatech XPI-3128     aliases          =/pinctrl/gpio@2007c000           C/pinctrl/gpio@20080000           I/pinctrl/gpio@20084000           O/pinctrl/gpio@20088000           U/i2c@20072000            Z/i2c@20056000            _/i2c@2005a000            d/i2c@2005e000            i/serial@20060000             q/serial@20064000             y/serial@20068000             /ethernet@2008c000           /mmc@1021c000            /mmc@10214000         arm-pmu           arm,cortex-a7-pmu         0          L          M          N          O                              cpus                         +             rockchip,rk3036-smp    cpu@f00          cpu           arm,cortex-a7                                                                                                 cpu@f01          cpu           arm,cortex-a7                                                          cpu@f02          cpu           arm,cortex-a7                                                          cpu@f03          cpu           arm,cortex-a7                                                             opp-table-0           operating-points-v2                        opp-216000000                         ' ~ ~ 7        5  @      opp-408000000                Q         ' ~ ~ 7        5  @      opp-600000000                #F         ' ~ ~ 7        5  @      opp-696000000                )|         '   7        5  @      opp-816000000                0,         ' g8 g8 7         F        5  @      opp-1008000000               <         ' O O 7        5  @      opp-1200000000               G         ' 7 7 7        5  @         display-subsystem             rockchip,display-subsystem          R   	        Xokay          opp-table-1           operating-points-v2            
   opp-200000000                         '         opp-300000000                         '         opp-400000000                ׄ         ' 0 0       opp-480000000                8         '            timer             arm,armv7-timer       0                                 
           _        n6       oscillator            fixed-clock         n6         xin24m                         1      sram@10080000         
    mmio-sram                                       +                        smp-sram@0            rockchip,rk3066-smp-sram                             gpu@10090000          "    rockchip,rk3128-mali arm,mali-400            	           H                                                                       gp gpmmu pp0 ppmmu0 pp1 ppmmu1                             	  bus core                
               x                      Xokay                     syscon@100a0000       &    rockchip,rk3128-pmu syscon simple-mfd            
        power-controller          !    rockchip,rk3128-power-controller                                    +                  power-domain@1                                                                        E     r                                                   z                                         power-domain@2                    (                                                            power-domain@3                                                                video-codec@10106000          (    rockchip,rk3128-vpu rockchip,rk3066-vpu          `                                       
  vepu vdpu                                         (  aclk_vdpu hclk_vdpu aclk_vepu hclk_vepu                                iommu@10106800            rockchip,iommu           h                    C                               aclk iface                                             vop@1010e000              rockchip,rk3126-vop                              	                                     aclk_vop dclk_vop hclk_vop                 d      e      f        axi ahb dclk                          Xokay       port                         +               	   endpoint@0                       +              6      endpoint@1                      +                          dsi@10110000          *    rockchip,rk3128-mipi-dsi snps,dw-mipi-dsi                @                 !                 E        pclk            ;           @dphy                                         apb         J         	  Xdisabled       ports                        +       port@0                  endpoint            +                       port@1                          qos@1012d000              rockchip,rk3128-qos syscon                                 qos@1012e000              rockchip,rk3128-qos syscon                                 qos@1012f000              rockchip,rk3128-qos syscon                                 qos@1012f080              rockchip,rk3128-qos syscon                                qos@1012f100              rockchip,rk3128-qos syscon                                 qos@1012f180              rockchip,rk3128-qos syscon                                qos@1012f200              rockchip,rk3128-qos syscon                                 interrupt-controller@10139000             arm,cortex-a7-gic                                              	           W        l                                 usb@10180000          2    rockchip,rk3128-usb rockchip,rk3066-usb snps,dwc2                                 
                         otg         }otg                                          @               ;         	  @usb2-phy            Xokay                                usb@101c0000              generic-ehci                                                           ;           @usb         Xokay          usb@101e0000              generic-ohci                                                            ;           @usb       	  Xdisabled          i2s@10200000          (    rockchip,rk3128-i2s rockchip,rk3066-i2s                                D                  P             i2s_clk i2s_hclk                                tx rx                     	  Xdisabled          spdif@10204000        ,    rockchip,rk3128-spdif rockchip,rk3066-spdif           @                    7                  S           
  mclk hclk                         tx          default                              	  Xdisabled          spi@1020c000              rockchip,sfc                                  2                               clk_sfc hclk_sfc          	  Xdisabled          mmc@10214000          0    rockchip,rk3128-dw-mshc rockchip,rk3288-dw-mshc          !@   @                                         D      r      v        biu ciu ciu-drive ciu-sample                  
        rx-tx           	           р               Q        reset           Xokay            "           ,            default            !   "   #   $         8         C         T         [      mmc@10218000          0    rockchip,rk3128-dw-mshc rockchip,rk3288-dw-mshc          !   @                                         E      s      w        biu ciu ciu-drive ciu-sample                          rx-tx           	           р               R        reset         	  Xdisabled          mmc@1021c000          0    rockchip,rk3128-dw-mshc rockchip,rk3288-dw-mshc          !   @                                         G      u      y        biu ciu ciu-drive ciu-sample                          rx-tx           	           р               S        reset           Xokay            "           ,           default            %   &   '         c         u                  [      i2s@10220000          (    rockchip,rk3128-i2s rockchip,rk3066-i2s          "                                       Q             i2s_clk i2s_hclk                                 tx rx                      default            (                  	  Xdisabled          nand-controller@10500000          (    rockchip,rk3128-nfc rockchip,rk2928-nfc          P    @                                        C        ahb nfc         default             )   *   +   ,   -   .   /   0      	  Xdisabled          clock-controller@20000000             rockchip,rk3128-cru                             1        xin24m          J                                               #g                 syscon@20008000       &    rockchip,rk3128-grf syscon simple-mfd                                       +                 usb2phy@17c           rockchip,rk3128-usb2phy            |                          phyclk          usb480m_phy                          2                    Xokay               2   host-port                   5         
  linestate                       Xokay                     otg-port          $          #          3          4           otg-bvalid otg-id linestate                     Xokay                           hdmi@20034000             rockchip,rk3128-inno-hdmi             @   @                 -                 G            	  pclk ref            default            3   4   5                                  Xokay       ports                        +       port@0                  endpoint            +   6                    port@1                 endpoint            +   7           R               phy@20038000              rockchip,rk3128-dsi-dphy                 @                     r      	  ref pclk                                             $        apb       	  Xdisabled                     timer@20044000        ,    rockchip,rk3128-timer rockchip,rk3288-timer           @                                      a      U        pclk timer        timer@20044020        ,    rockchip,rk3128-timer rockchip,rk3288-timer           @                                      a      V        pclk timer        timer@20044040        ,    rockchip,rk3128-timer rockchip,rk3288-timer           @@                    ;                 a      W        pclk timer        timer@20044060        ,    rockchip,rk3128-timer rockchip,rk3288-timer           @`                    <                 a      X        pclk timer        timer@20044080        ,    rockchip,rk3128-timer rockchip,rk3288-timer           @                    =                 a      Y        pclk timer        timer@200440a0        ,    rockchip,rk3128-timer rockchip,rk3288-timer           @                    >                 a      Z        pclk timer        watchdog@2004c000              rockchip,rk3128-wdt snps,dw-wdt                               "                 ?      	  Xdisabled          pwm@20050000          (    rockchip,rk3128-pwm rockchip,rk3288-pwm                              ^        default            8                 	  Xdisabled          pwm@20050010          (    rockchip,rk3128-pwm rockchip,rk3288-pwm                             ^        default            9                   Xokay               ^      pwm@20050020          (    rockchip,rk3128-pwm rockchip,rk3288-pwm                              ^        default            :                   Xokay               _      pwm@20050030          (    rockchip,rk3128-pwm rockchip,rk3288-pwm            0                 ^        default            ;                 	  Xdisabled          i2c@20056000          (    rockchip,rk3128-i2c rockchip,rk3288-i2c           `                               i2c               M        default            <                     +          	  Xdisabled          i2c@2005a000          (    rockchip,rk3128-i2c rockchip,rk3288-i2c                                          i2c               N        default            =                     +          	  Xdisabled          i2c@2005e000          (    rockchip,rk3128-i2c rockchip,rk3288-i2c                                          i2c               O        default            >                     +          	  Xdisabled          serial@20060000       &    rockchip,rk3128-uart snps,dw-apb-uart                                             n6                M     U        baudclk apb_pclk                                tx rx           default            ?   @   A                            	  Xdisabled          serial@20064000       &    rockchip,rk3128-uart snps,dw-apb-uart             @                               n6                N     V        baudclk apb_pclk                                tx rx           default            B                              Xokay          serial@20068000       &    rockchip,rk3128-uart snps,dw-apb-uart                                            n6                O     W        baudclk apb_pclk                                tx rx           default            C                            	  Xdisabled          saradc@2006c000           rockchip,saradc                                                 [     >        saradc apb_pclk                W        saradc-apb                     Xokay            +              Q      i2c@20072000          (    rockchip,rk3128-i2c rockchip,rk3288-i2c                                           i2c               L        default            D                     +          	  Xdisabled          spi@20074000          (    rockchip,rk3128-spi rockchip,rk3066-spi           @                                      A     R        spiclk apb_pclk                     	        tx rx           default            E   F   G   H   I                     +          	  Xdisabled          dma-controller@20078000           arm,pl330 arm,primecell              @                                        7         R                     	  apb_pclk            i                    ethernet@2008c000             rockchip,rk3128-gmac                 @                 8          9           macirq eth_wake_irq       8         ~                                   o      M  stmmaceth mac_clk_rx mac_clk_tx clk_mac_ref clk_mac_refout aclk_mac pclk_mac                   8      
  stmmaceth           J           t                      Xokay            output             J        rmii               K              |                default            L   mdio              snps,dwmac-mdio                      +       ethernet-phy@1            ethernet-phy-ieee802.3-c22                         d           
                      M              default            N           K            pinctrl           rockchip,rk3128-pinctrl         J                        +               gpio@2007c000             rockchip,gpio-bank                                $                 @                             W        l             HEADER_5 HEADER_3     HEADER_22 HEADER_23  HEADER_19 HEADER_26 HEADER_21 HEADER_24   HEADER_18       HEADER_36      HEADER_13                W      gpio@20080000             rockchip,gpio-bank                                 %                 A                             W        l         p  HEADER_7 HEADER_35 HEADER_33 HEADER_37 HEADER_40 HEADER_38   HEADER_11   HEADER_29 HEADER_31                               [      gpio@20084000             rockchip,gpio-bank            @                    &                 B                             W        l         :                      HEADER_27      HEADER_8 HEADER_10                  M      gpio@20088000             rockchip,gpio-bank                                '                 C                             W        l         ;                   HEADER_32      HEADER_12    HEADER_15                 S      pcfg-pull-default                        P      pcfg-pull-none           6           O      emmc       emmc-clk            C            O           %      emmc-cmd            C            P           &      emmc-cmd1           C            P      emmc-pwr            C            P      emmc-bus1           C            P      emmc-bus4         @  C            P            P            P            P      emmc-bus8           C            P            P            P            P            P            P            P            P           '         gmac       rgmii-pins          C            P      	      P            P            P            P            P            P            P            P            P            P            P            P            P            P      rmii-pins           C            P            P            P            P            P            P            P            P            P            P           L         hdmi       hdmii2c-xfer             C             O             O           3      hdmi-hpd            C             O           4      hdmi-cec            C             O           5         i2c0       i2c0-xfer            C              O             O           D         i2c1       i2c1-xfer            C             O             O           <         i2c2       i2c2-xfer            C            O            O           =         i2c3       i2c3-xfer            C             O             O           >         i2s    i2s-bus       `  C             O       	      O             O             O             O             O           (      i2s1-bus          `  C             O            O            O            O            O            O         lcdc       lcdc-dclk           C            O      lcdc-den            C            O      lcdc-hsync          C      	      O      lcdc-vsync          C      
      O      lcdc-rgb24          C            O            O            O            O            O            O            O            O            O            O            O            O            O            O         nfc    flash-ale           C             O           )      flash-cle           C            O           +      flash-wrn           C            O           0      flash-rdn           C            O           .      flash-rdy           C            O           /      flash-cs0           C            O           ,      flash-dqs           C            O           -      flash-bus8          C            O            O            O            O            O            O            O            O           *         pwm0       pwm0-pin            C             O           8         pwm1       pwm1-pin            C             O           9         pwm2       pwm2-pin            C             O           :         pwm3       pwm3-pin            C            O           ;         sdio       sdio-clk            C             O      sdio-cmd            C             P      sdio-pwren          C             P      sdio-bus4         @  C            P            P            P            P         sdmmc      sdmmc-clk           C            O           "      sdmmc-cmd           C            P           #      sdmmc-det           C            P           $      sdmmc-wp            C            P      sdmmc-pwren         C             P           \      sdmmc-bus4        @  C            P            P            P            P           !         sfc    sfc-bus2             C            P            P      sfc-bus4          @  C            P            P            P            P      sfc-clk         C            O      sfc-cs0         C            P      sfc-cs1         C            P         spdif      spdif-tx            C            O                    spi0       spi0-clk            C            P           G      spi0-cs0            C            P           H      spi0-tx         C      	      P           E      spi0-rx         C      
      P           F      spi0-cs1            C            P           I      spi1-clk            C             P      spi1-cs0            C            P      spi1-tx         C            P      spi1-rx         C            P      spi1-cs1            C            P      spi2-clk            C       	      P      spi2-cs0            C             P      spi2-tx         C             P      spi2-rx         C             P         uart0      uart0-xfer           C            P            O           ?      uart0-cts           C            O           @      uart0-rts           C             O           A         uart1      uart1-xfer           C      	      P      
      P           B      uart1-cts           C            O      uart1-rts           C            O         uart2      uart2-xfer           C            P            O           C      uart2-cts           C             O      uart2-rts           C             O         dp83848c       dp83848c-rst            C             O           N         ir-receiver    ir-int          C             O           V         leds       power-led           C              O           X      spd-led         C             O           Y         usb2       host-drv            C             O           U            memory@60000000          memory           `   @         chosen          Q/serial@20064000          adc-keys          	    adc-keys            ]   Q           ibuttons         z 2Z   button-recovery       	  Recovery              h                     regulator-dc-5v           regulator-fixed         DC_5V            LK@         LK@                             T      hdmi-connnector           hdmi-connector           a      port       endpoint            +   R           7            regulator-host-pwr-5v             regulator-fixed         $   S               )          HOST_PWR_5V          LK@         LK@        :   T        default            U         E               ir-receiver           gpio-ir-receiver               S              default            V      leds          
    gpio-leds      led-power              W               Xpower           a           gon          default            X      led-spd            S              Xlan         a           default            Y         regulator-mcu3v3              regulator-fixed         MCU3V3           2Z         2Z        :                           regulator-vcc-ddr             regulator-fixed         VCC_DDR          `         `        :   Z                        regulator-vcc-io              regulator-fixed         VCC_IO           2Z         2Z        :   Z                                   regulator-vcc-lan             regulator-fixed         VCC_LAN          2Z         2Z        :                                J      regulator-vcc-sd              regulator-fixed         $   [              )          VCC_SD           2Z         2Z        :           default            \                  regulator-vcc-sys             regulator-fixed         VCC_SYS          LK@         LK@        :   T                             Z      regulator-vcc33-hdmi              regulator-fixed         VCC33_HDMI           2Z         2Z        :   ]                        regulator-vcca-33             regulator-fixed         VCCA_33          2Z         2Z        :   Z                             ]      regulator-vdd-11              regulator-fixed         VDD_11                            :   Z                                   regulator-vdd11-hdmi              regulator-fixed         VDD11_HDMI                            :                           regulator-vdd-arm             pwm-regulator           VDD_ARM         u   ^      a           z   Z                  \                                   regulator-vdd-log             pwm-regulator           VDD_LOG         u   _      a                 d        z   Z                  \                                                	compatible interrupt-parent #address-cells #size-cells model gpio0 gpio1 gpio2 gpio3 i2c0 i2c1 i2c2 i2c3 serial0 serial1 serial2 ethernet0 mmc0 mmc1 interrupts interrupt-affinity enable-method device_type reg clocks resets operating-points-v2 #cooling-cells cpu-supply phandle opp-shared opp-hz opp-microvolt clock-latency-ns opp-suspend ports status arm,cpu-registers-not-fw-configured clock-frequency clock-output-names #clock-cells ranges interrupt-names clock-names power-domains mali-supply #power-domain-cells pm_qos iommus #iommu-cells reset-names remote-endpoint phys phy-names rockchip,grf interrupt-controller #interrupt-cells dr_mode g-np-tx-fifo-size g-rx-fifo-size g-tx-fifo-size vusb_a-supply vusb_d-supply dmas dma-names #sound-dai-cells pinctrl-names pinctrl-0 fifo-depth max-frequency bus-width vmmc-supply disable-wp cap-sd-highspeed no-mmc no-sdio cap-mmc-highspeed mmc-ddr-3_3v no-sd rockchip,playback-channels #reset-cells assigned-clocks assigned-clock-rates assigned-clock-parents #phy-cells #pwm-cells reg-io-width reg-shift #io-channel-cells vref-supply arm,pl330-broken-no-flushp arm,pl330-periph-burst #dma-cells rx-fifo-depth tx-fifo-depth clock_in_out phy-supply phy-mode phy-handle max-speed reset-assert-us reset-deassert-us reset-gpios gpio-controller #gpio-cells gpio-line-names bias-pull-pin-default bias-disable rockchip,pins stdout-path io-channels io-channel-names keyup-threshold-microvolt label linux,code press-threshold-microvolt regulator-name regulator-min-microvolt regulator-max-microvolt regulator-always-on regulator-boot-on gpio startup-delay-us vin-supply enable-active-high function color default-state pwms pwm-supply pwm-dutycycle-range regulator-ramp-delay 