  a3   8  \   (              \X                             $    rockchip,rk3128-evb rockchip,rk3128                                  +         !   7Rockchip RK3128 Evaluation board       aliases          =/pinctrl/gpio@2007c000           C/pinctrl/gpio@20080000           I/pinctrl/gpio@20084000           O/pinctrl/gpio@20088000           U/i2c@20072000            Z/i2c@20056000            _/i2c@2005a000            d/i2c@2005e000            i/serial@20060000             q/serial@20064000             y/serial@20068000             /mmc@1021c000         arm-pmu           arm,cortex-a7-pmu         0          L          M          N          O                              cpus                         +             rockchip,rk3036-smp    cpu@f00          cpu           arm,cortex-a7                                                                                       cpu@f01          cpu           arm,cortex-a7                                                           cpu@f02          cpu           arm,cortex-a7                                                           cpu@f03          cpu           arm,cortex-a7                                                              opp-table-0           operating-points-v2                          opp-216000000                         ~ ~ 7          @      opp-408000000               Q          ~ ~ 7          @      opp-600000000               #F          ~ ~ 7          @      opp-696000000               )|            7          @      opp-816000000               0,          g8 g8 7         ,          @      opp-1008000000              <          O O 7          @      opp-1200000000              G          7 7 7          @         display-subsystem             rockchip,display-subsystem          8         	  >disabled          opp-table-1           operating-points-v2             	   opp-200000000                                 opp-300000000                                 opp-400000000               ׄ          0 0       opp-480000000               8                     timer             arm,armv7-timer       0                                 
           E        in6       oscillator            fixed-clock         in6         yxin24m                          )      sram@10080000         
    mmio-sram                                       +                        smp-sram@0            rockchip,rk3066-smp-sram                             gpu@10090000          "    rockchip,rk3128-mali arm,mali-400            	           H                                                                       gp gpmmu pp0 ppmmu0 pp1 ppmmu1                             	  bus core                	               x           
         	  >disabled          syscon@100a0000       &    rockchip,rk3128-pmu syscon simple-mfd            
        power-controller          !    rockchip,rk3128-power-controller                                    +                
   power-domain@1                                                                        E     r                                                   z                                         power-domain@2                    (                                                            power-domain@3                                                                video-codec@10106000          (    rockchip,rk3128-vpu rockchip,rk3066-vpu          `                                       
  vepu vdpu                                         (  aclk_vdpu hclk_vdpu aclk_vepu hclk_vepu                       
         iommu@10106800            rockchip,iommu           h                    C                               aclk iface             
                                 vop@1010e000              rockchip,rk3126-vop                              	                                     aclk_vop dclk_vop hclk_vop                 d      e      f        axi ahb dclk               
         	  >disabled       port                         +                   endpoint@0                                      .      endpoint@1                                                 dsi@10110000          *    rockchip,rk3128-mipi-dsi snps,dw-mipi-dsi                @                 !                 E        pclk                       dphy               
                          apb         $         	  >disabled       ports                        +       port@0                  endpoint                                    port@1                          qos@1012d000              rockchip,rk3128-qos syscon                                  qos@1012e000              rockchip,rk3128-qos syscon                                  qos@1012f000              rockchip,rk3128-qos syscon                                  qos@1012f080              rockchip,rk3128-qos syscon                                 qos@1012f100              rockchip,rk3128-qos syscon                                  qos@1012f180              rockchip,rk3128-qos syscon                                 qos@1012f200              rockchip,rk3128-qos syscon                                  interrupt-controller@10139000             arm,cortex-a7-gic                                              	           1        F                                  usb@10180000          2    rockchip,rk3128-usb rockchip,rk3066-usb snps,dwc2                                 
                         otg         Wotg         _           q                      @                        	  usb2-phy            >okay                     usb@101c0000              generic-ehci                                                                      usb         >okay          usb@101e0000              generic-ohci                                                                       usb         >okay          i2s@10200000          (    rockchip,rk3128-i2s rockchip,rk3066-i2s                                D                  P             i2s_clk i2s_hclk                                tx rx                     	  >disabled          spdif@10204000        ,    rockchip,rk3128-spdif rockchip,rk3066-spdif           @                    7                  S           
  mclk hclk                         tx          default                              	  >disabled          spi@1020c000              rockchip,sfc                                  2                               clk_sfc hclk_sfc          	  >disabled          mmc@10214000          0    rockchip,rk3128-dw-mshc rockchip,rk3288-dw-mshc          !@   @                                         D      r      v        biu ciu ciu-drive ciu-sample                  
        rx-tx                      р               Q        reset         	  >disabled          mmc@10218000          0    rockchip,rk3128-dw-mshc rockchip,rk3288-dw-mshc          !   @                                         E      s      w        biu ciu ciu-drive ciu-sample                          rx-tx                      р               R        reset         	  >disabled          mmc@1021c000          0    rockchip,rk3128-dw-mshc rockchip,rk3288-dw-mshc          !   @                                         G      u      y        biu ciu ciu-drive ciu-sample                          rx-tx                      р               S        reset           >okay                       default                        i2s@10220000          (    rockchip,rk3128-i2s rockchip,rk3066-i2s          "                                       Q             i2s_clk i2s_hclk                                 tx rx                      default                               	  >disabled          nand-controller@10500000          (    rockchip,rk3128-nfc rockchip,rk2928-nfc          P    @                                        C        ahb nfc         default             !   "   #   $   %   &   '   (      	  >disabled          clock-controller@20000000             rockchip,rk3128-cru                             )        xin24m          $                                               .#g                  syscon@20008000       &    rockchip,rk3128-grf syscon simple-mfd                                       +                  usb2phy@17c           rockchip,rk3128-usb2phy            |                          phyclk          yusb480m_phy                       C   *                    >okay                *   host-port                   5         
  linestate           Z            >okay                      otg-port          $          #          3          4           otg-bvalid otg-id linestate         Z            >okay                            hdmi@20034000             rockchip,rk3128-inno-hdmi             @   @                 -                 G            	  pclk ref            default            +   ,   -           
                     	  >disabled       ports                        +       port@0                  endpoint               .                     port@1                          phy@20038000              rockchip,rk3128-dsi-dphy                 @                     r      	  ref pclk            Z               
                  $        apb       	  >disabled                      timer@20044000        ,    rockchip,rk3128-timer rockchip,rk3288-timer           @                                      a      U        pclk timer        timer@20044020        ,    rockchip,rk3128-timer rockchip,rk3288-timer           @                                      a      V        pclk timer        timer@20044040        ,    rockchip,rk3128-timer rockchip,rk3288-timer           @@                    ;                 a      W        pclk timer        timer@20044060        ,    rockchip,rk3128-timer rockchip,rk3288-timer           @`                    <                 a      X        pclk timer        timer@20044080        ,    rockchip,rk3128-timer rockchip,rk3288-timer           @                    =                 a      Y        pclk timer        timer@200440a0        ,    rockchip,rk3128-timer rockchip,rk3288-timer           @                    >                 a      Z        pclk timer        watchdog@2004c000              rockchip,rk3128-wdt snps,dw-wdt                               "                 ?      	  >disabled          pwm@20050000          (    rockchip,rk3128-pwm rockchip,rk3288-pwm                              ^        default            /        e         	  >disabled          pwm@20050010          (    rockchip,rk3128-pwm rockchip,rk3288-pwm                             ^        default            0        e         	  >disabled          pwm@20050020          (    rockchip,rk3128-pwm rockchip,rk3288-pwm                              ^        default            1        e         	  >disabled          pwm@20050030          (    rockchip,rk3128-pwm rockchip,rk3288-pwm            0                 ^        default            2        e         	  >disabled          i2c@20056000          (    rockchip,rk3128-i2c rockchip,rk3288-i2c           `                               i2c               M        default            3                     +            >okay       rtc@51            haoyu,hym8563               Q                    yxin32k           i2c@2005a000          (    rockchip,rk3128-i2c rockchip,rk3288-i2c                                          i2c               N        default            4                     +          	  >disabled          i2c@2005e000          (    rockchip,rk3128-i2c rockchip,rk3288-i2c                                          i2c               O        default            5                     +          	  >disabled          serial@20060000       &    rockchip,rk3128-uart snps,dw-apb-uart                                             in6                M     U        baudclk apb_pclk                                tx rx           default            6   7   8        p           }         	  >disabled          serial@20064000       &    rockchip,rk3128-uart snps,dw-apb-uart             @                               in6                N     V        baudclk apb_pclk                                tx rx           default            9        p           }         	  >disabled          serial@20068000       &    rockchip,rk3128-uart snps,dw-apb-uart                                            in6                O     W        baudclk apb_pclk                                tx rx           default            :        p           }         	  >disabled          saradc@2006c000           rockchip,saradc                                                 [     >        saradc apb_pclk                W        saradc-apb                   	  >disabled          i2c@20072000          (    rockchip,rk3128-i2c rockchip,rk3288-i2c                                           i2c               L        default            ;                     +          	  >disabled          spi@20074000          (    rockchip,rk3128-spi rockchip,rk3066-spi           @                                      A     R        spiclk apb_pclk                     	        tx rx           default            <   =   >   ?   @                     +          	  >disabled          dma-controller@20078000           arm,pl330 arm,primecell              @                                                                      	  apb_pclk                                 ethernet@2008c000             rockchip,rk3128-gmac                 @                 8          9           macirq eth_wake_irq       8         ~                                   o      M  stmmaceth mac_clk_rx mac_clk_tx clk_mac_ref clk_mac_refout aclk_mac pclk_mac                   8      
  stmmaceth           $                               	  >disabled       mdio              snps,dwmac-mdio                      +             pinctrl           rockchip,rk3128-pinctrl         $                        +               gpio@2007c000             rockchip,gpio-bank                                $                 @                             1        F               C      gpio@20080000             rockchip,gpio-bank                                 %                 A                             1        F         gpio@20084000             rockchip,gpio-bank            @                    &                 B                             1        F               E      gpio@20088000             rockchip,gpio-bank                                '                 C                             1        F         pcfg-pull-default                        B      pcfg-pull-none           $            A      emmc       emmc-clk            1            A                  emmc-cmd            1            B                  emmc-cmd1           1            B      emmc-pwr            1            B      emmc-bus1           1            B      emmc-bus4         @  1            B            B            B            B      emmc-bus8           1            B            B            B            B            B            B            B            B                     gmac       rgmii-pins          1            B      	      B            B            B            B            B            B            B            B            B            B            B            B            B            B      rmii-pins           1            B            B            B            B            B            B            B            B            B            B         hdmi       hdmii2c-xfer             1             A             A            +      hdmi-hpd            1             A            ,      hdmi-cec            1             A            -         i2c0       i2c0-xfer            1              A             A            ;         i2c1       i2c1-xfer            1             A             A            3         i2c2       i2c2-xfer            1            A            A            4         i2c3       i2c3-xfer            1             A             A            5         i2s    i2s-bus       `  1             A       	      A             A             A             A             A                   i2s1-bus          `  1             A            A            A            A            A            A         lcdc       lcdc-dclk           1            A      lcdc-den            1            A      lcdc-hsync          1      	      A      lcdc-vsync          1      
      A      lcdc-rgb24          1            A            A            A            A            A            A            A            A            A            A            A            A            A            A         nfc    flash-ale           1             A            !      flash-cle           1            A            #      flash-wrn           1            A            (      flash-rdn           1            A            &      flash-rdy           1            A            '      flash-cs0           1            A            $      flash-dqs           1            A            %      flash-bus8          1            A            A            A            A            A            A            A            A            "         pwm0       pwm0-pin            1             A            /         pwm1       pwm1-pin            1             A            0         pwm2       pwm2-pin            1             A            1         pwm3       pwm3-pin            1            A            2         sdio       sdio-clk            1             A      sdio-cmd            1             B      sdio-pwren          1             B      sdio-bus4         @  1            B            B            B            B         sdmmc      sdmmc-clk           1            A      sdmmc-cmd           1            B      sdmmc-det           1            B      sdmmc-wp            1            B      sdmmc-pwren         1             B      sdmmc-bus4        @  1            B            B            B            B         sfc    sfc-bus2             1            B            B      sfc-bus4          @  1            B            B            B            B      sfc-clk         1            A      sfc-cs0         1            B      sfc-cs1         1            B         spdif      spdif-tx            1            A                     spi0       spi0-clk            1            B            >      spi0-cs0            1            B            ?      spi0-tx         1      	      B            <      spi0-rx         1      
      B            =      spi0-cs1            1            B            @      spi1-clk            1             B      spi1-cs0            1            B      spi1-tx         1            B      spi1-rx         1            B      spi1-cs1            1            B      spi2-clk            1       	      B      spi2-cs0            1             B      spi2-tx         1             B      spi2-rx         1             B         uart0      uart0-xfer           1            B            A            6      uart0-cts           1            A            7      uart0-rts           1             A            8         uart1      uart1-xfer           1      	      B      
      B            9      uart1-cts           1            A      uart1-rts           1            A         uart2      uart2-xfer           1            B            A            :      uart2-cts           1             A      uart2-rts           1             A         usb-host       host-vbus-drv           1             A            F         usb-otg    otg-vbus-drv            1              A            D            chosen          ?/serial@20068000          memory@60000000          memory           `   @         regulator-vcc5v0-otg              regulator-fixed         K   C               default            D        Pvcc5v0_otg          _ LK@        w LK@                  regulator-vcc5v0-host             regulator-fixed         K   E               default            F        Pvcc5v0_host                  _ LK@        w LK@         	compatible interrupt-parent #address-cells #size-cells model gpio0 gpio1 gpio2 gpio3 i2c0 i2c1 i2c2 i2c3 serial0 serial1 serial2 mmc0 interrupts interrupt-affinity enable-method device_type reg clocks resets operating-points-v2 #cooling-cells phandle opp-shared opp-hz opp-microvolt clock-latency-ns opp-suspend ports status arm,cpu-registers-not-fw-configured clock-frequency clock-output-names #clock-cells ranges interrupt-names clock-names power-domains #power-domain-cells pm_qos iommus #iommu-cells reset-names remote-endpoint phys phy-names rockchip,grf interrupt-controller #interrupt-cells dr_mode g-np-tx-fifo-size g-rx-fifo-size g-tx-fifo-size vbus-supply dmas dma-names #sound-dai-cells pinctrl-names pinctrl-0 fifo-depth max-frequency bus-width rockchip,playback-channels #reset-cells assigned-clocks assigned-clock-rates assigned-clock-parents #phy-cells #pwm-cells reg-io-width reg-shift #io-channel-cells arm,pl330-broken-no-flushp arm,pl330-periph-burst #dma-cells rx-fifo-depth tx-fifo-depth gpio-controller #gpio-cells bias-pull-pin-default bias-disable rockchip,pins stdout-path gpio regulator-name regulator-min-microvolt regulator-max-microvolt regulator-always-on 