    8    (            =/                              9    tsd,rk3588-tiger-haikou tsd,rk3588-tiger rockchip,rk3588                                     +         1   7Theobroma Systems RK3588-Q7 SoM on Haikou devkit       aliases          =/pinctrl/gpio@fd8a0000           C/pinctrl/gpio@fec20000           I/pinctrl/gpio@fec30000           O/pinctrl/gpio@fec40000           U/pinctrl/gpio@fec50000           [/i2c@fd880000            `/i2c@fea90000            e/i2c@feaa0000            j/i2c@feab0000            o/i2c@feac0000            t/i2c@fead0000            y/i2c@fec80000            ~/i2c@fec90000            /i2c@feca0000            /serial@fd890000             /serial@feb40000             /serial@feb50000             /serial@feb60000             /serial@feb70000             /serial@feb80000             /serial@feb90000             /serial@feba0000             /serial@febb0000             /serial@febc0000             /spi@feb00000            /spi@feb10000            /spi@feb20000            /spi@feb30000            /spi@fecb0000         #   /i2c@fec80000/fan@18/i2c-mux/i2c@0           /mmc@fe2e0000         *   /i2c@fec80000/fan@18/i2c-mux/i2c@0/rtc@6f           /ethernet@fe1b0000          /mmc@fe2c0000         cpus                         +       cpu-map    cluster0       core0                    core1                    core2                    core3                       cluster1       core0                    core1                       cluster2       core0                    core1              	            cpu@0           cpu           arm,cortex-a55                       $psci            2          E   
            L           \           i   @        {                         @                                                                                   cpu@100         cpu           arm,cortex-a55                      $psci            2          E   
            L           \           i   @        {                         @                                                                                   cpu@200         cpu           arm,cortex-a55                      $psci            2          E   
            L           \           i   @        {                         @                                                                                   cpu@300         cpu           arm,cortex-a55                      $psci            2          E   
            L           \           i   @        {                         @                                                                                   cpu@400         cpu           arm,cortex-a76                      $psci            2           E   
           L           \           i   @        {                         @                                                                                  cpu@500         cpu           arm,cortex-a76                      $psci            2           E   
           L           \           i   @        {                         @                                                                                  cpu@600         cpu           arm,cortex-a76                      $psci            2           E   
           L           \           i   @        {                         @                                                                                  cpu@700         cpu           arm,cortex-a76                      $psci            2           E   
           L           \           i   @        {                         @                                                                            	      idle-states         psci       cpu-sleep             arm,idle-state           "        3           J   d        [   x        k                      l2-cache-l0           cache           ^           k   @        }           |                                        l2-cache-l1           cache           ^           k   @        }           |                                        l2-cache-l2           cache           ^           k   @        }           |                                        l2-cache-l3           cache           ^           k   @        }           |                                        l2-cache-b0           cache           ^           k   @        }           |                                        l2-cache-b1           cache           ^           k   @        }           |                                        l2-cache-b2           cache           ^           k   @        }           |                                        l2-cache-b3           cache           ^           k   @        }           |                                           l3-cache              cache           ^ 0          k   @        }           |                             display-subsystem             rockchip,display-subsystem                       B      firmware       scmi              arm,scmi-smc                                              +              C   protocol@14                                   
      protocol@16                                               hdmi0-sound           simple-audio-card           i2s                    hdmi0           okay              D   simple-audio-card,codec                  simple-audio-card,cpu                       pmu-a55           arm,cortex-a55-pmu          "                  pmu-a76           arm,cortex-a76-pmu          "                   psci              arm,psci-1.0            +smc       clock-0           fixed-clock         -)׫        =spll                          E      timer             arm,armv8-timer       P  "                                             
                          %  Psec-phys phys virt hyp-phys hyp-virt          clock-1           fixed-clock         -n6         =xin24m                        F      clock-2           fixed-clock         -           =xin32k                        G      reserved-memory                      +            `   shmem@10f000              arm,scmi-shmem                                 g                 hdmi-receiver-cma             shared-dma-pool         n                    d    
           {                g      	  disabled                       gpu@fb000000          *    rockchip,rk3588-mali arm,mali-valhall-csf                                                 
                    E   !     !     !          core coregroup stacks                   0  "       \              ]              ^               Pjob mmu gpu            "           okay               #           $                 usb@fc000000              rockchip,rk3588-dwc3 snps,dwc3                       @          "                      E   !     !     !          ref_clk suspend_clk bus_clk         otg            %   &           usb2-phy usb3-phy         
  utmi_wide              "              !  R                           '         ?         `                 okay               '          H      usb@fc800000          "    rockchip,rk3588-ehci generic-ehci                                 "                      E   !     !     !     (           )        usb            "           okay              I      usb@fc840000          "    rockchip,rk3588-ohci generic-ohci                                 "                      E   !     !     !     (           )        usb            "           okay              J      usb@fc880000          "    rockchip,rk3588-ehci generic-ehci                                 "                      E   !     !     !     *           +        usb            "           okay              K      usb@fc8c0000          "    rockchip,rk3588-ohci generic-ohci                                 "                      E   !     !     !     *           +        usb            "           okay              L      usb@fcd00000              rockchip,rk3588-dwc3 snps,dwc3                      @          "                    (  E   !  j   !  i   !  h   !  k   !  r      &  ref_clk suspend_clk bus_clk utmi pipe           host               ,         	  usb3-phy          
  utmi_wide              !  4                  ?         `                          okay              M      iommu@fc900000            arm,smmu-v3                              @  "      q             s             v             o               Peventq gerror priq cmdq-sync                                iommu@fcb00000            arm,smmu-v3                              @  "      }                                       {               Peventq gerror priq cmdq-sync                     	  disabled              N      syscon@fd58a000       )    rockchip,rk3588-pmugrf syscon simple-mfd                 X                         syscon@fd58c000           rockchip,rk3588-sys-grf syscon               X                   u      syscon@fd5e8000       !    rockchip,rk3588-dcphy-grf syscon                 ^       @                  syscon@fd5ec000       !    rockchip,rk3588-dcphy-grf syscon                 ^       @                  syscon@fd5a4000           rockchip,rk3588-vop-grf syscon               Z@                    v      syscon@fd5a6000           rockchip,rk3588-vo0-grf syscon               Z`                 E   !                   syscon@fd5a8000           rockchip,rk3588-vo1-grf syscon               Z       @         E   !             w      syscon@fd5ac000           rockchip,rk3588-usb-grf syscon               Z       @                  syscon@fd5b0000           rockchip,rk3588-php-grf syscon               [                    .      syscon@fd5b4000       #    rockchip,rk3588-csidphy-grf syscon               [@                         syscon@fd5b5000       #    rockchip,rk3588-csidphy-grf syscon               [P                         syscon@fd5bc000       $    rockchip,rk3588-pipe-phy-grf syscon              [                        syscon@fd5c4000       $    rockchip,rk3588-pipe-phy-grf syscon              \@                        syscon@fd5c8000       $    rockchip,rk3588-usbdpphy-grf syscon              \       @                  syscon@fd5d0000       .    rockchip,rk3588-usb2phy-grf syscon simple-mfd                ]        @                      +                 usb2phy@0             rockchip,rk3588-usb2phy                                     E   !          phyclk          =usb480m_phy0            "                        !  m   !          phy apb         okay                  otg-port                        okay               -           %            syscon@fd5d8000       .    rockchip,rk3588-usb2phy-grf syscon simple-mfd                ]       @                      +             O   usb2phy@8000              rockchip,rk3588-usb2phy                                    E   !          phyclk          =usb480m_phy2            "                        !  o   !          phy apb         okay               (   host-port                       okay               )            syscon@fd5dc000       .    rockchip,rk3588-usb2phy-grf syscon simple-mfd                ]       @                      +             P   usb2phy@c000              rockchip,rk3588-usb2phy                                    E   !          phyclk          =usb480m_phy3            "                        !  p   !           phy apb         okay               *   host-port                       okay               +            syscon@fd5e0000       $    rockchip,rk3588-hdptxphy-grf syscon              ^                          syscon@fd5f0000           rockchip,rk3588-ioc syscon               _                         sram@fd600000         
    mmio-sram                `                 `        `                          +             Q      clock-controller@fd7c0000             rockchip,rk3588-cru              |                   !      !      !      !      !      !      !      !      !     !     !     !     !  ]   !   q   !      !        @  A .  2Fq )׫ׄ e /  ׄ   e Zр            .                                 !      i2c@fd880000          (    rockchip,rk3588-i2c rockchip,rk3399-i2c                               "      =               E   !  t   !  s      	  i2c pclk                /        
default                      +          	  disabled              R      serial@fd890000       &    rockchip,rk3588-uart snps,dw-apb-uart                                 "      K               E   !     !          baudclk apb_pclk               0      0           tx rx               1        
default         '           1         	  disabled              S      pwm@fd8b0000          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                               E   !     !        	  pwm pclk                2        
default         >         	  disabled              T      pwm@fd8b0010          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                              E   !     !        	  pwm pclk                3        
default         >         	  disabled              U      pwm@fd8b0020          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                               E   !     !        	  pwm pclk                4        
default         >         	  disabled              V      pwm@fd8b0030          (    rockchip,rk3588-pwm rockchip,rk3328-pwm               0               E   !     !        	  pwm pclk                5        
default         >         	  disabled              W      power-management@fd8d8000         &    rockchip,rk3588-pmu syscon simple-mfd                                   x   power-controller          !    rockchip,rk3588-power-controller                        I            +            okay               "   power-domain@8                      I                         +            ]   6          X   power-domain@9              	         E   !  !   !  #   !  "   !          k   7   8   9        I                         +       power-domain@10             
        E   !  !   !  #   !  "        k   :        I          power-domain@11                     E   !  !   !  #   !  "        k   ;        I                power-domain@12                     E   !     !     !          k   <   =   >   ?        I            ]   $          Y      power-domain@13                                  +            I       power-domain@14                   (  E   !     !     !     !     !          k   @        I          power-domain@15                      E   !     !     !     !          k   A        I          power-domain@16                     E   !     !          k   B   C   D                     +            I       power-domain@17                      E   !     !     !     !          k   E   F   G        I                power-domain@21                     E   !     !     !     !     !     !     !     !     !     !     !     !     !     !     !     !     !     !           k   H   I   J   K   L   M   N   O                     +            I       power-domain@23                     E   !   C   !   A   !          k   P        I          power-domain@14                      E   !     !     !     !          k   @        I          power-domain@15                     E   !     !     !          k   A        I          power-domain@22                     E   !     !          k   Q        I             power-domain@24                     E   !  [   !  Z   !  ]        k   R   S                     +            I       power-domain@25                   8  E   !     !     !     !     !     !     !  Z        k   T        I             power-domain@26                   8  E   !     !     !     !     !     !     !  Q        k   U   V        I          power-domain@27                   0  E   !     !     !     !     !     !          k   W   X   Y   Z                     +            I       power-domain@28                      E   !     !     !     !          k   [   \        I          power-domain@29                   (  E   !     !     !     !     !          k   ]   ^        I             power-domain@30                     E   !  z   !  {        k   _        I          power-domain@31                   @  E   !  W   !     !     !     !     !     !     !          k   `   a   b   c        I          power-domain@33             !        E   !  W   !  Z   !  [        I          power-domain@34             "        E   !  W   !  Z   !  [        I          power-domain@37             %        E   !     !  2        k   d        I          power-domain@38             &        E   !   4   !   5        I          power-domain@40             (        k   e        I                npu@fdab0000              rockchip,rk3588-rknn-core         0                                0                rpc cna core         "       n                E   !     !      
      !  #        aclk hclk npu pclk             
                       !     !          srst_a srst_h              "   	        |   f        okay               6           6          Z      iommu@fdab9000        ,    rockchip,rk3588-iommu rockchip,rk3568-iommu                                           "       n               E   !     !           aclk iface                         "   	        okay               f      npu@fdac0000              rockchip,rk3588-rknn-core         0                                0                rpc cna core         "       o                E   !     !     
      !  #        aclk hclk npu pclk             
                       !      !           srst_a srst_h              "   
        |   g        okay               6           6          [      iommu@fdaca000        ,    rockchip,rk3588-iommu rockchip,rk3568-iommu                              "       o               E   !     !          aclk iface                         "   
        okay               g      npu@fdad0000              rockchip,rk3588-rknn-core         0                                0                rpc cna core         "       p                E   !     !     
      !  #        aclk hclk npu pclk             
                       !      !           srst_a srst_h              "           |   h        okay               6           6          \      iommu@fdada000        ,    rockchip,rk3588-iommu rockchip,rk3568-iommu                              "       p               E   !     !          aclk iface                         "           okay               h      video-codec@fdb50000          +    rockchip,rk3588-vpu121 rockchip,rk3568-vpu                                "       w               Pvdpu            E   !     !        
  aclk hclk           |   i           "             ]      iommu@fdb50800        ,    rockchip,rk3588-iommu rockchip,rk3568-iommu                      @        "       v               aclk iface          E   !     !             "                          i      rga@fdb80000          (    rockchip,rk3588-rga rockchip,rk3288-rga                              "       t               E   !     !     !          aclk hclk sclk             !  r   !  q   !  p        core axi ahb               "             ^      video-codec@fdba0000              rockchip,rk3588-vepu121                               "       z               E   !     !        
  aclk hclk           |   j           "             _      iommu@fdba0800        ,    rockchip,rk3588-iommu rockchip,rk3568-iommu                      @        "       y               E   !     !          aclk iface             "                          j      video-codec@fdba4000              rockchip,rk3588-vepu121              @                "       |               E   !     !        
  aclk hclk           |   k           "             `      iommu@fdba4800        ,    rockchip,rk3588-iommu rockchip,rk3568-iommu              H        @        "       {               E   !     !          aclk iface             "                          k      video-codec@fdba8000              rockchip,rk3588-vepu121                              "       ~               E   !     !        
  aclk hclk           |   l           "             a      iommu@fdba8800        ,    rockchip,rk3588-iommu rockchip,rk3568-iommu                      @        "       }               E   !     !          aclk iface             "                          l      video-codec@fdbac000              rockchip,rk3588-vepu121                              "                      E   !     !        
  aclk hclk           |   m           "             b      iommu@fdbac800        ,    rockchip,rk3588-iommu rockchip,rk3568-iommu                      @        "                      E   !     !          aclk iface             "                          m      video-codec@fdc38000              rockchip,rk3588-vdec          0       Á            À            Æ                rfunction link cache         "       _             (  E   !     !     !     !     !          axi ahb cabac core hevc_cabac               !     !     !     !          / #F #F ;         |   n           "         (     !  C   !  B   !  F   !  H   !  G        axi ahb cabac core hevc_cabac              o          c      iommu@fdc38700        ,    rockchip,rk3588-iommu rockchip,rk3568-iommu               Ç        @    Ç@       @        "       `               E   !     !          aclk iface             "                          n      video-codec@fdc40000              rockchip,rk3588-vdec          0                                                rfunction link cache         "       a             (  E   !     !     !     !     !          axi ahb cabac core hevc_cabac               !     !     !     !          / #F #F ;         |   p           "         (     !  J   !  I   !  M   !  O   !  N        axi ahb cabac core hevc_cabac              q          d      iommu@fdc40700        ,    rockchip,rk3588-iommu rockchip,rk3568-iommu                       @    @       @        "       b               E   !     !          aclk iface             "                          p      video-codec@fdc70000              rockchip,rk3588-av1-vpu                               "       l               Pvdpu               !   A   !   C        ׄ ׄ         E   !   A   !   C      
  aclk hclk              "               !     !      !     !            e      vop@fdd90000              rockchip,rk3588-vop                       B     P                rvop gamma-lut           "                    @  E   !  ]   !  \   !  a   !  b   !  c   !  d   !  [   r   s      Q  aclk hclk dclk_vp0 dclk_vp1 dclk_vp2 dclk_vp3 pclk_vop pll_hdmiphy0 pll_hdmiphy1            |   t           "              u           v           w           x        okay              f   ports                        +                  port@0                       +                           g   endpoint@2                         y                    port@1                       +                          h      port@2                       +                          i      port@3                       +                          j            iommu@fdd97e00        ,    rockchip,rk3588-iommu rockchip,rk3568-iommu               ~                            "                      E   !  ]   !  \        aclk iface                         "           okay               t      spdif-tx@fddb0000         ,    rockchip,rk3588-spdif rockchip,rk3568-spdif                                  !              !        
  mclk hclk           E   !     !          tx             z           "                         "                     	  disabled              k      i2s@fddc0000              rockchip,rk3588-i2s-tdm                               "                      E   !     !     !          mclk_tx mclk_rx hclk               !             !              {            tx             "              !          tx-m                      	  disabled              l      spdif-tx@fdde0000         ,    rockchip,rk3588-spdif rockchip,rk3568-spdif                                  !              !  A      
  mclk hclk           E   !  D   !  @        tx             z           "                         "                     	  disabled              m      i2s@fddf0000              rockchip,rk3588-i2s-tdm                               "                      E   !  4   !  4   !  5        mclk_tx mclk_rx hclk               !  1           !              {           tx             "              !          tx-m                        okay                     i2s@fddfc000              rockchip,rk3588-i2s-tdm                              "                      E   !  0   !  0   !  ,        mclk_tx mclk_rx hclk               !  -           !              {           rx             "              !          rx-m                      	  disabled              n      dsi@fde20000              rockchip,rk3588-mipi-dsi2                                 "                      E   !  e   !  g      	  pclk sys               !          apb            "              |   
        dcphy              v      	  disabled              o   ports                        +       port@0                         p      port@1                        q            dsi@fde30000              rockchip,rk3588-mipi-dsi2                                 "                      E   !  f   !  h      	  pclk sys               !          apb            "              }   
        dcphy              v      	  disabled              r   ports                        +       port@0                         s      port@1                        t            dp@fde50000           rockchip,rk3588-dp                       @         "                         !           $       (  E   !     !     !     !     !          apb aux hdcp i2s spdif             &              "              !                    	  disabled              u   ports                        +       port@0                         v      port@1                        w            hdmi@fde80000             rockchip,rk3588-dw-hdmi-qp                              0  E   !     !     !     !  4   !  R   !          pclk earc ref aud hdp hclk_vo1        P  "                                                              h               Pavp cec earc main hpd              r        
default             ~                 "              !     !  0        ref hdp            u           w                    okay                  ports                        +       port@0                         x   endpoint                          y         port@1                        y   endpoint                         ;               edp@fdec0000              rockchip,rk3588-edp                               E   !      !          dp pclk         "                         r        dp             "              !     !          dp apb             w      	  disabled              z   ports                        +       port@0                         {      port@1                        |            qos@fdf35000              rockchip,rk3588-qos syscon               P                    <      qos@fdf35200              rockchip,rk3588-qos syscon               R                    =      qos@fdf35400              rockchip,rk3588-qos syscon               T                    >      qos@fdf35600              rockchip,rk3588-qos syscon               V                    ?      qos@fdf36000              rockchip,rk3588-qos syscon               `                    _      qos@fdf39000              rockchip,rk3588-qos syscon                                   d      qos@fdf3d800              rockchip,rk3588-qos syscon                                   e      qos@fdf3e000              rockchip,rk3588-qos syscon                                   a      qos@fdf3e200              rockchip,rk3588-qos syscon                                   `      qos@fdf3e400              rockchip,rk3588-qos syscon                                   b      qos@fdf3e600              rockchip,rk3588-qos syscon                                   c      qos@fdf40000              rockchip,rk3588-qos syscon                                    ]      qos@fdf40200              rockchip,rk3588-qos syscon                                   ^      qos@fdf40400              rockchip,rk3588-qos syscon                                   W      qos@fdf40500              rockchip,rk3588-qos syscon                                   X      qos@fdf40600              rockchip,rk3588-qos syscon                                   Y      qos@fdf40800              rockchip,rk3588-qos syscon                                   Z      qos@fdf41000              rockchip,rk3588-qos syscon                                   [      qos@fdf41100              rockchip,rk3588-qos syscon                                   \      qos@fdf60000              rockchip,rk3588-qos syscon                                    B      qos@fdf60200              rockchip,rk3588-qos syscon                                   C      qos@fdf60400              rockchip,rk3588-qos syscon                                   D      qos@fdf61000              rockchip,rk3588-qos syscon                                   E      qos@fdf61200              rockchip,rk3588-qos syscon                                   F      qos@fdf61400              rockchip,rk3588-qos syscon                                   G      qos@fdf62000              rockchip,rk3588-qos syscon                                    @      qos@fdf63000              rockchip,rk3588-qos syscon               0                    A      qos@fdf64000              rockchip,rk3588-qos syscon               @                    P      qos@fdf66000              rockchip,rk3588-qos syscon               `                    H      qos@fdf66200              rockchip,rk3588-qos syscon               b                    I      qos@fdf66400              rockchip,rk3588-qos syscon               d                    J      qos@fdf66600              rockchip,rk3588-qos syscon               f                    K      qos@fdf66800              rockchip,rk3588-qos syscon               h                    L      qos@fdf66a00              rockchip,rk3588-qos syscon               j                    M      qos@fdf66c00              rockchip,rk3588-qos syscon               l                    N      qos@fdf66e00              rockchip,rk3588-qos syscon               n                    O      qos@fdf67000              rockchip,rk3588-qos syscon               p                    Q      qos@fdf67200              rockchip,rk3588-qos syscon               r                   }      qos@fdf70000              rockchip,rk3588-qos syscon                                    :      qos@fdf71000              rockchip,rk3588-qos syscon                                   ;      qos@fdf72000              rockchip,rk3588-qos syscon                                    7      qos@fdf72200              rockchip,rk3588-qos syscon               "                    8      qos@fdf72400              rockchip,rk3588-qos syscon               $                    9      qos@fdf80000              rockchip,rk3588-qos syscon                                    T      qos@fdf81000              rockchip,rk3588-qos syscon                                   U      qos@fdf81200              rockchip,rk3588-qos syscon                                   V      qos@fdf82000              rockchip,rk3588-qos syscon                                    R      qos@fdf82200              rockchip,rk3588-qos syscon               "                    S      dfi@fe060000                                    rockchip,rk3588-dfi       @  "                     &              0              :                            ~      pcie@fe180000         *    rockchip,rk3588-pcie rockchip,rk3568-pcie              0   ?      0  E   !  C   !  H   !  >   !  M   !  R   !        )  aclk_mst aclk_slv aclk_dbi pclk aux pipe            pci       P  "                                                                              Psys pmc msg legacy err                      1                     `  D                                                                                             R           c           r  0      0            z  0      0                          ,         	  pcie-phy               "   "      T  `                                                    	      	       @         0      
@       @                                     rdbi apb config             !  )   !  .      	  pwr pipe                         +         	  disabled                 legacy-interrupt-controller                                                       "                                  pcie@fe190000         *    rockchip,rk3588-pcie rockchip,rk3568-pcie              @   O      0  E   !  D   !  I   !  ?   !  N   !  S   !  s      )  aclk_mst aclk_slv aclk_dbi pclk aux pipe            pci       P  "                                                                              Psys pmc msg legacy err                      1                     `  D                                                                                             R           c           r  @      @            z  @      @                                   	  pcie-phy               "   "      T  `                                                    
       
        @         0      
A        @                                     rdbi apb config             !  *   !  /      	  pwr pipe                         +         	  disabled                 legacy-interrupt-controller                                                       "                                  ethernet@fe1c0000         &    rockchip,rk3588-gmac snps,dwmac-4.20a                                  "                                    Pmacirq eth_wake_irq       (  E   !  6   !  7   !  Y   !  ^   !  5      0  stmmaceth clk_mac_ref pclk_mac aclk_mac ptp_ref            "   !           !  $      
  stmmaceth              u           .                                                         	  disabled                 mdio              snps,dwmac-mdio                      +                    stmmac-axi-config                                                                           rx-queues-config            .                 queue0        queue1           tx-queues-config            D                 queue0        queue1              sata@fe210000         '    rockchip,rk3588-dwc-ahci snps,dwc-ahci               !                 "                   (  E   !  b   !  _   !  e   !  T   !  o        sata pmalive rxoob ref asic         Z                        +          	  disabled                 sata-port@0                      l @                      	  sata-phy            y                         sata@fe230000         '    rockchip,rk3588-dwc-ahci snps,dwc-ahci               #                 "                   (  E   !  d   !  a   !  g   !  V   !  q        sata pmalive rxoob ref asic         Z                        +          	  disabled                 sata-port@0                      l @             ,         	  sata-phy            y                         spi@fe2b0000              rockchip,sfc                 +        @         "                      E   !  /   !  0        clk_sfc hclk_sfc                         +          	  disabled                    mmc@fe2c0000          0    rockchip,rk3588-dw-mshc rockchip,rk3288-dw-mshc              ,        @         "                       E   
      
   	   !     !          biu ciu ciu-drive ciu-sample                       р        
default                              "   (        okay                                                                                                         !                   mmc@fe2d0000          0    rockchip,rk3588-dw-mshc rockchip,rk3288-dw-mshc              -        @         "                       E   !     !     !     !          biu ciu ciu-drive ciu-sample                                
default                        "   %      	  disabled                    mmc@fe2e0000              rockchip,rk3588-dwcmshc              .                 "                         !  -   !  .   !  ,         n6        (  E   !  ,   !  *   !  +   !  -   !  .        core bus axi block timer                                       
default       (     !     !     !     !     !          core bus axi block timer             -        okay                        :         L         Y        h            s         {                 !                              rng@fe378000              rockchip,rk3588-rng              7                "                     E   
                 0      i2s@fe470000              rockchip,rk3588-i2s-tdm              G                 "                      E   !   +   !   /   !   (        mclk_tx mclk_rx hclk               !   )   !   -           !      !              0       0           tx rx              "   &           !   *   !   +      
  tx-m rx-m                    
default       (                                                   	  disabled                    i2s@fe480000              rockchip,rk3588-i2s-tdm              H                 "                      E   !  y   !  }   !  u        mclk_tx mclk_rx hclk               0      0           tx rx              !  ^   !  _      
  tx-m rx-m                    
default       (                                                   	  disabled                    i2s@fe490000          (    rockchip,rk3588-i2s rockchip,rk3066-i2s              I                 "                      E   !      !           i2s_clk i2s_hclk               !              !              z       z           tx rx              "   &        
default                                        	  disabled                    i2s@fe4a0000          (    rockchip,rk3588-i2s rockchip,rk3066-i2s              J                 "                      E   !   %   !           i2s_clk i2s_hclk               !   "           !              z      z           tx rx              "   &        
default                                          okay              >      spdif-tx@fe4e0000         ,    rockchip,rk3588-spdif rockchip,rk3568-spdif              N                    !              !   7      
  mclk hclk           E   !   9   !   6        tx             0           "                                  
default            "   &                  	  disabled                    spdif-tx@fe4f0000         ,    rockchip,rk3588-spdif rockchip,rk3568-spdif              O                    !              !   =      
  mclk hclk           E   !   ?   !   <        tx             z           "                                  
default            "   &                  	  disabled                    interrupt-controller@fe600000             arm,gic-v3                `             h                 "      	                                     a               8                  `                                 +                 msi-controller@fe640000           arm,gic-v3-its               d                                                       msi-controller@fe660000           arm,gic-v3-its               f                                                      ppi-partitions     interrupt-partition-0                                        interrupt-partition-1                       	                        dma-controller@fea10000           arm,pl330 arm,primecell                      @          "       V              W                        E   !   n      	  apb_pclk            		              0      dma-controller@fea30000           arm,pl330 arm,primecell                      @          "       X              Y                        E   !   o      	  apb_pclk            		              z      i2c@fea90000          (    rockchip,rk3588-i2c rockchip,rk3399-i2c                               E   !      !   {      	  i2c pclk            "      >                           
default                      +            okay                 eeprom@50               P          atmel,24c01         	           d           	            i2c@feaa0000          (    rockchip,rk3588-i2c rockchip,rk3399-i2c                               E   !      !   |      	  i2c pclk            "      ?                           
default                      +          	  disabled                    i2c@feab0000          (    rockchip,rk3588-i2c rockchip,rk3399-i2c                               E   !      !   }      	  i2c pclk            "      @                           
default                      +          	  disabled                    i2c@feac0000          (    rockchip,rk3588-i2c rockchip,rk3399-i2c                               E   !      !   ~      	  i2c pclk            "      A                           
default                      +            okay                 regulator@42              rockchip,rk8602             B        	(           	Evdd_npu_s0           	T        	f dp        	~ ~        	          	              6   regulator-state-mem          	            i2c@fead0000          (    rockchip,rk3588-i2c rockchip,rk3399-i2c                               E   !      !         	  i2c pclk            "      B                           
default                      +            okay            -              codec@a           fsl,sgtl5000                
        E                       	           	           	             =         timer@feae0000        ,    rockchip,rk3588-timer rockchip,rk3288-timer                                "      !               E   !   T   !   W        pclk timer                  watchdog@feaf0000              rockchip,rk3588-wdt snps,dw-wdt                               E   !   d   !   c      
  tclk pclk           "      ;                       spi@feb00000          (    rockchip,rk3588-spi rockchip,rk3066-spi                               "      F               E   !      !           spiclk apb_pclk            0      0           tx rx           	                             
default                      +          	  disabled                    spi@feb10000          (    rockchip,rk3588-spi rockchip,rk3066-spi                               "      G               E   !      !           spiclk apb_pclk            0      0           tx rx           	                             
default                      +          	  disabled                    spi@feb20000          (    rockchip,rk3588-spi rockchip,rk3066-spi                               "      H               E   !      !           spiclk apb_pclk            z      z           tx rx           	                          
default                      +            okay               !                         pmic@0            rockchip,rk806                                   "               	        
           
default                              
 B@         
)        
A           
M           
Y           
e           
q           
}           
           
           
           
           
           
           
           
           
           
       dvs1-null-pins          gpio_pwrctrl1         	  pin_fun0                     dvs2-null-pins          gpio_pwrctrl2         	  pin_fun0                     dvs3-null-pins          gpio_pwrctrl3         	  pin_fun0                     regulators     dcdc-reg1            	T        	f dp        	~ ~        	  0        	Evdd_gpu_s0                       $   regulator-state-mem          	         dcdc-reg2           	Evdd_cpu_lit_s0           8         	T        	f dp        	~ ~        	  0              regulator-state-mem          	         dcdc-reg3           	Evdd_log_s0           8         	T        	f 
L        	~ q        	  0             regulator-state-mem          	        L q         dcdc-reg4           	Evdd_vdenc_s0             8         	T        	f dp        	~ ~        	  0             regulator-state-mem          	         dcdc-reg5           	Evdd_ddr_s0           8         	T        	f 
L        	~         	  0             regulator-state-mem          	        L P         dcdc-reg6           	Evdd2_ddr_s3          8         	T             regulator-state-mem          h         dcdc-reg7           	Evcc_2v0_pldo_s3          8         	T        	f         	~         	  0              regulator-state-mem          h        L          dcdc-reg8           	Evcc_3v3_s3           8         	T        	f 2Z        	~ 2Z              regulator-state-mem          h        L 2Z         dcdc-reg9           	Evddq_ddr_s0          8         	T             regulator-state-mem          	         dcdc-reg10          	Evcc_1v8_s3           8         	T        	f w@        	~ w@              regulator-state-mem          h        L w@         pldo-reg1           	Evcca_1v8_s0          8         	T        	f w@        	~ w@             regulator-state-mem          	         pldo-reg2           	Evcc_1v8_s0           8         	T        	f w@        	~ w@              regulator-state-mem          	        L w@         pldo-reg3           	Evdda_1v2_s0          8         	T        	f O        	~ O             regulator-state-mem          	         pldo-reg4           	Evcca_3v3_s0          8         	T        	f 2Z        	~ 2Z        	  0             regulator-state-mem          	         pldo-reg5           	Evccio_sd_s0          8         	T        	f w@        	~ 2Z        	  0              regulator-state-mem          	         pldo-reg6         	  	Epldo6_s3             8         	T        	f w@        	~ w@             regulator-state-mem          h        L w@         nldo-reg1           	Evdd_0v75_s3          8         	T        	f q        	~ q             regulator-state-mem          h        L q         nldo-reg2           	Evdda_ddr_pll_s0          8         	T        	f P        	~ P             regulator-state-mem          	        L P         nldo-reg3           	Evdda_0v75_s0             8         	T        	f q        	~ q             regulator-state-mem          	         nldo-reg4           	Evdda_0v85_s0             8         	T        	f P        	~ P             regulator-state-mem          	         nldo-reg5           	Evdd_0v75_s0          8         	T        	f q        	~ q             regulator-state-mem          	                  spi@feb30000          (    rockchip,rk3588-spi rockchip,rk3066-spi                               "      I               E   !      !           spiclk apb_pclk            z      z           tx rx           	                             
default                      +          	  disabled                    serial@feb40000       &    rockchip,rk3588-uart snps,dw-apb-uart                                 "      L               E   !      !           baudclk apb_pclk               0      0   	        tx rx                       
default         1           '         	  disabled                    serial@feb50000       &    rockchip,rk3588-uart snps,dw-apb-uart                                 "      M               E   !      !           baudclk apb_pclk               0   
   0           tx rx                       
default         1           '           okay                    serial@feb60000       &    rockchip,rk3588-uart snps,dw-apb-uart                                 "      N               E   !      !           baudclk apb_pclk               0      0           tx rx                       
default         1           '         	  disabled                    serial@feb70000       &    rockchip,rk3588-uart snps,dw-apb-uart                                 "      O               E   !      !           baudclk apb_pclk               z   	   z   
        tx rx                       
default         1           '           okay                    serial@feb80000       &    rockchip,rk3588-uart snps,dw-apb-uart                                 "      P               E   !      !           baudclk apb_pclk               z      z           tx rx                       
default         1           '           okay                                      serial@feb90000       &    rockchip,rk3588-uart snps,dw-apb-uart                                 "      Q               E   !      !           baudclk apb_pclk               z      z           tx rx                       
default         1           '         	  disabled                    serial@feba0000       &    rockchip,rk3588-uart snps,dw-apb-uart                                 "      R               E   !      !           baudclk apb_pclk               {      {           tx rx                       
default         1           '         	  disabled                    serial@febb0000       &    rockchip,rk3588-uart snps,dw-apb-uart                                 "      S               E   !      !           baudclk apb_pclk               {   	   {   
        tx rx                       
default         1           '         	  disabled                    serial@febc0000       &    rockchip,rk3588-uart snps,dw-apb-uart                                 "      T               E   !      !           baudclk apb_pclk               {      {           tx rx                       
default         1           '         	  disabled                    pwm@febd0000          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                               E   !   L   !   K      	  pwm pclk                        
default         >         	  disabled                    pwm@febd0010          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                              E   !   L   !   K      	  pwm pclk                        
default         >         	  disabled                    pwm@febd0020          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                               E   !   L   !   K      	  pwm pclk                        
default         >         	  disabled                    pwm@febd0030          (    rockchip,rk3588-pwm rockchip,rk3328-pwm               0               E   !   L   !   K      	  pwm pclk                        
default         >         	  disabled                    pwm@febe0000          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                               E   !   O   !   N      	  pwm pclk                        
default         >         	  disabled                    pwm@febe0010          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                              E   !   O   !   N      	  pwm pclk                        
default         >         	  disabled                    pwm@febe0020          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                               E   !   O   !   N      	  pwm pclk                        
default         >         	  disabled                    pwm@febe0030          (    rockchip,rk3588-pwm rockchip,rk3328-pwm               0               E   !   O   !   N      	  pwm pclk                        
default         >         	  disabled                    pwm@febf0000          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                               E   !   R   !   Q      	  pwm pclk                        
default         >         	  disabled                    pwm@febf0010          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                              E   !   R   !   Q      	  pwm pclk                        
default         >         	  disabled                    pwm@febf0020          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                               E   !   R   !   Q      	  pwm pclk                        
default         >         	  disabled                    pwm@febf0030          (    rockchip,rk3588-pwm rockchip,rk3328-pwm               0               E   !   R   !   Q      	  pwm pclk                        
default         >         	  disabled                    thermal-zones                package-thermal                                                     trips      package-crit             8                  	  critical                          bigcore0-thermal               d                                       trips      bigcore0-alert           L                  passive                  bigcore0-crit            8                  	  critical                       cooling-maps       map0                                         bigcore2-thermal               d                                       trips      bigcore2-alert           L                  passive                  bigcore2-crit            8                  	  critical                       cooling-maps       map0                             	            littlecore-thermal             d                                       trips      littlecore-alert             L                  passive                  littlecore-crit          8                  	  critical                       cooling-maps       map0                     0                          center-thermal                                                     trips      center-crit          8                  	  critical                          gpu-thermal            d                                       trips      gpu-alert            L                  passive                  gpu-crit             8                  	  critical                       cooling-maps       map0                                      npu-thermal                                                    trips      npu-crit             8                  	  critical                             tsadc@fec00000            rockchip,rk3588-tsadc                                 "                     E   !      !           tsadc apb_pclk             !                       !   V   !   W        tsadc-apb tsadc                                                       2           
default sleep           <           okay                     adc@fec10000              rockchip,rk3588-saradc                                "                     R           E   !      !           saradc apb_pclk            !   U        saradc-apb          okay            d                   i2c@fec80000          (    rockchip,rk3588-i2c rockchip,rk3399-i2c                               E   !      !         	  i2c pclk            "      C                           
default                      +            okay            -              fan@18            tsd,mule ti,amc6821                i2c-mux           tsd,mule-i2c-mux                         +       i2c@0                                     +                 rtc@6f            isil,isl1208                o                            i2c@fec90000          (    rockchip,rk3588-i2c rockchip,rk3399-i2c                               E   !      !         	  i2c pclk            "      D                           
default                      +            okay                 regulator@42              rockchip,rk8602             B        	(           	Evdd_cpu_big0_s0          8         	T        	f dp        	~         	          	                 regulator-state-mem          	         regulator@43               rockchip,rk8603 rockchip,rk8602             C        	(           	Evdd_cpu_big1_s0          8         	T        	f dp        	~         	          	                 regulator-state-mem          	            i2c@feca0000          (    rockchip,rk3588-i2c rockchip,rk3399-i2c                               E   !      !         	  i2c pclk            "      E                           
default                      +            okay                    spi@fecb0000          (    rockchip,rk3588-spi rockchip,rk3066-spi                               "      J               E   !      !           spiclk apb_pclk            {      {           tx rx           	                             
default                      +          	  disabled                    efuse@fecc0000            rockchip,rk3588-otp                                E   !      !      !      !           otp apb_pclk phy arb               !      !      !           otp apb arb                      +                cpu-code@2                                 id@7                                   cpu-leakage@17                                 cpu-leakage@18                                 cpu-leakage@19                                 log-leakage@1a                                 gpu-leakage@1b                                 cpu-version@1c                         p                      npu-leakage@28              (                   codec-leakage@29                )                      dma-controller@fed10000           arm,pl330 arm,primecell                      @          "       Z              [                        E   !   p      	  apb_pclk            		              {      phy@fed60000              rockchip,rk3588-hdptx-phy                                  E   !     !  T        ref apb                               8     !  #   !     !  c   !  d   !  e   !  !   !  "      "  phy apb init cmn lane ropll lcpll                      okay               r      phy@fed80000              rockchip,rk3588-usbdp-phy                                            E   !     !  l   !  V           refclk immortal pclk utmi         (     !      !      !      !      !          init cmn lane pcs_apb pma_apb           u                                            okay               &      phy@feda0000              rockchip,rk3588-mipi-dcphy                                           E   !      !        	  pclk ref                !  i   !      !      !  j        m_phy apb grf s_phy                  	  disabled               |      phy@fedb0000              rockchip,rk3588-mipi-dcphy                                           E   !      !        	  pclk ref                !  k   !      !      !  l        m_phy apb grf s_phy                  	  disabled               }      phy@fedc0000              rockchip,rk3588-csi-dphy                                  E   !           pclk                           !      !           apb phy                  	  disabled                    phy@fedc8000              rockchip,rk3588-csi-dphy                 ܀                E   !           pclk                           !      !           apb phy                  	  disabled                    phy@fee00000              rockchip,rk3588-naneng-combphy                                E   !     !  v   !  W        ref apb pipe               !                                 !  <   !  C        phy apb            .                	  disabled                     phy@fee20000              rockchip,rk3588-naneng-combphy                                E   !     !  x   !  W        ref apb pipe               !                                 !  >   !  E        phy apb            .                  okay               ,      sram@ff001000         
    mmio-sram                                `                                 +                codec-sram@0                                       o      codec-sram@78000                p                     q         pinctrl           rockchip,rk3588-pinctrl          `                               +                gpio@fd8a0000             rockchip,gpio-bank                                "                     E   !  q   !  r         	                                       
                                gpio@fec20000             rockchip,gpio-bank                                "                     E   !   s   !   t         	                                       
                         7      gpio@fec30000             rockchip,gpio-bank                                "                     E   !   u   !   v         	                 @                     
                         4      gpio@fec40000             rockchip,gpio-bank                                "                     E   !   w   !   x         	                 `                     
                                gpio@fec50000             rockchip,gpio-bank                                "                     E   !   y   !   z         	                                      
                         ,      pcfg-pull-up                             pcfg-pull-down                           pcfg-pull-none                           pcfg-pull-none-drv-level-0                                       pcfg-pull-none-drv-level-1                                      pcfg-pull-none-drv-level-2                                      pcfg-pull-none-drv-level-3                                      pcfg-pull-none-drv-level-4                                      pcfg-pull-none-drv-level-5                                      pcfg-pull-none-drv-level-6                                      pcfg-pull-none-drv-level-7                                      pcfg-pull-none-drv-level-8                                      pcfg-pull-none-drv-level-9                      	                pcfg-pull-none-drv-level-10                     
                pcfg-pull-none-drv-level-11                                     pcfg-pull-none-drv-level-12                                     pcfg-pull-none-drv-level-13                                     pcfg-pull-none-drv-level-14                                     pcfg-pull-none-drv-level-15                                     pcfg-pull-up-drv-level-0                                         pcfg-pull-up-drv-level-1                                        pcfg-pull-up-drv-level-2                                        pcfg-pull-up-drv-level-3                                        pcfg-pull-up-drv-level-4                                        pcfg-pull-up-drv-level-5                                        pcfg-pull-up-drv-level-6                                        pcfg-pull-up-drv-level-7                                        pcfg-pull-up-drv-level-8                                        pcfg-pull-up-drv-level-9                        	                pcfg-pull-up-drv-level-10                       
                pcfg-pull-up-drv-level-11                                       pcfg-pull-up-drv-level-12                                       pcfg-pull-up-drv-level-13                                       pcfg-pull-up-drv-level-14                                       pcfg-pull-up-drv-level-15                                       pcfg-pull-down-drv-level-0                                       pcfg-pull-down-drv-level-1                                      pcfg-pull-down-drv-level-2                                      pcfg-pull-down-drv-level-3                                      pcfg-pull-down-drv-level-4                                       pcfg-pull-down-drv-level-5                                      pcfg-pull-down-drv-level-6                                      pcfg-pull-down-drv-level-7                                      pcfg-pull-down-drv-level-8                                      pcfg-pull-down-drv-level-9                      	                pcfg-pull-down-drv-level-10                     
                pcfg-pull-down-drv-level-11                                     pcfg-pull-down-drv-level-12                                     pcfg-pull-down-drv-level-13                               	      pcfg-pull-down-drv-level-14                               
      pcfg-pull-down-drv-level-15                                     pcfg-pull-up-smt                                       pcfg-pull-down-smt                                     pcfg-pull-none-smt                                     pcfg-pull-none-drv-level-0-smt                                                 pcfg-pull-none-drv-level-1-smt                                          	      pcfg-pull-none-drv-level-2-smt                                                pcfg-pull-none-drv-level-3-smt                                          
      pcfg-pull-none-drv-level-4-smt                                                pcfg-pull-none-drv-level-5-smt                                                pcfg-output-high             5                pcfg-output-low          A                auddsm     auddsm-pins       @  L                                                               bt1120     bt1120-pins        L                                                                                                          
                                                                                                     can0       can0m0-pins          L                                        can0m1-pins          L         	           	                     can1       can1m0-pins          L         	           	                  can1m1-pins          L      
                                   can2       can2m0-pins          L         	           	                  can2m1-pins          L          
            
                     cif    cif-clk         L                           cif-dvp-clk       0  L                 
                                cif-dvp-bus16           L                                                                                                        cif-dvp-bus8            L                                                                                                            clk32k     clk32k-in           L       
                     clk32k-out0         L       
                      clk32k-out1         L                     !         cpu    cpu-pins             L                                  "         ddrphych0      ddrphych0-pins        @  L                                                       #         ddrphych1      ddrphych1-pins        @  L                                                      $         ddrphych2      ddrphych2-pins        @  L                 	           
                          %         ddrphych3      ddrphych3-pins        @  L                                                      &         dp0    dp0m0-pins          L                     '      dp0m1-pins          L          
            (      dp0m2-pins          L                      )         dp1    dp1m0-pins          L                     *      dp1m1-pins          L          
            +      dp1m2-pins          L                     ,         emmc       emmc-rstnout            L                     -      emmc-bus8           L                                                                                                         emmc-clk            L                            emmc-cmd            L                             emmc-data-strobe            L                     .      emmc-reset          L                      3         eth1       eth1-pins           L                     /         fspi       fspim0-pins       `  L                                                                             0      fspim0-cs1          L                     1      fspim2-pins       `  L                                                                             2      fspim2-cs1          L                     3      fspim1-pins       `  L                                                             	               4      fspim1-cs1          L                     5         gmac1      gmac1-miim           L                                6      gmac1-clkinout          L                     7      gmac1-rx-bus2         0  L                            	               8      gmac1-tx-bus2         0  L                                           9      gmac1-rgmii-clk          L                                :      gmac1-rgmii-bus       @  L                                                       ;      gmac1-ppsclk            L                     <      gmac1-ppstrig           L                     =      gmac1-ptp-ref-clk           L                     >      gmac1-txer          L      
               ?         gpu    gpu-pins            L                      @         hdmi       hdmim0-rx-cec           L                     A      hdmim0-rx-hpdin         L                     B      hdmim0-rx-scl           L                      C      hdmim0-rx-sda           L                      D      hdmim0-tx0-cec          L                     E      hdmim0-tx0-hpd          L                      ~      hdmim0-tx0-scl          L                     F      hdmim0-tx0-sda          L           	          G      hdmim0-tx1-hpd          L                           hdmim1-rx-cec           L                     H      hdmim1-rx-hpdin         L                     I      hdmim1-rx-scl           L                     J      hdmim1-rx-sda           L                     K      hdmim1-tx0-cec          L                      L      hdmim1-tx0-hpd          L                     M      hdmim1-tx0-scl          L                             hdmim1-tx0-sda          L            	                 hdmim1-tx1-cec          L                      N      hdmim1-tx1-hpd          L                     O      hdmim1-tx1-scl          L                           hdmim1-tx1-sda          L           	                hdmim2-rx-cec           L                     P      hdmim2-rx-hpdin         L                     Q      hdmim2-rx-scl           L                     R      hdmim2-rx-sda           L                     S      hdmim2-tx0-scl          L                     T      hdmim2-tx0-sda          L           	          U      hdmim2-tx1-cec          L                           hdmim2-tx1-scl          L                     V      hdmim2-tx1-sda          L           	          W      hdmi-debug0         L                     X      hdmi-debug1         L                     Y      hdmi-debug2         L      	               Z      hdmi-debug3         L      
               [      hdmi-debug4         L                     \      hdmi-debug5         L                     ]      hdmi-debug6         L                      ^      hdmim0-tx1-cec          L                     _      hdmim0-tx1-scl          L           
          `      hdmim0-tx1-sda          L           	          a         i2c0       i2c0m0-xfer          L                                   /      i2c0m2-xfer          L                                  b      i2c0m1-xfer          L         	           	            c         i2c1       i2c1m0-xfer          L          	            	                   i2c1m1-xfer          L                   	               d      i2c1m2-xfer          L          	            	            e      i2c1m3-xfer          L         	           	            f      i2c1m4-xfer          L         	           	            g         i2c2       i2c2m0-xfer          L          	            	            h      i2c2m2-xfer          L         	           	            i      i2c2m3-xfer          L         	           	                   i2c2m4-xfer          L         	            	            j      i2c2m1-xfer          L         	           	            k         i2c3       i2c3m0-xfer          L         	           	                   i2c3m1-xfer          L         	           	            l      i2c3m2-xfer          L         	           	            m      i2c3m4-xfer          L         	           	            n      i2c3m3-xfer          L      
   	           	            o         i2c4       i2c4m0-xfer          L         	           	            p      i2c4m2-xfer          L          	            	            q      i2c4m3-xfer          L         	           	            r      i2c4m4-xfer          L         	           	                   i2c4m1-xfer          L         	           	            s         i2c5       i2c5m0-xfer          L         	           	            t      i2c5m1-xfer          L         	           	                   i2c5m2-xfer          L         	           	            u      i2c5m3-xfer          L         	           	            v      i2c5m4-xfer          L         	           	            w         i2c6       i2c6m0-xfer          L          	            	                   i2c6m1-xfer          L         	           	            x      i2c6m3-xfer          L      	   	           	            y      i2c6m4-xfer          L         	            	            z      i2c6m2-xfer          L         	           	            {         i2c7       i2c7m0-xfer          L         	           	                   i2c7m2-xfer          L         	           	            |      i2c7m3-xfer          L      
   	           	            }      i2c7m1-xfer          L         	           	            ~         i2c8       i2c8m0-xfer          L         	           	                  i2c8m2-xfer          L         	           	                   i2c8m3-xfer          L         	           	                  i2c8m4-xfer          L         	           	                  i2c8m1-xfer          L         	        	   	                     i2s0       i2s0-lrck           L                            i2s0-mclk           L                           i2s0-sclk           L                            i2s0-sdi0           L                            i2s0-sdi1           L                            i2s0-sdi2           L                            i2s0-sdi3           L                            i2s0-sdo0           L                            i2s0-sdo1           L                            i2s0-sdo2           L                            i2s0-sdo3           L                               i2s1       i2s1m0-lrck         L                            i2s1m0-mclk         L                            i2s1m0-sclk         L                            i2s1m0-sdi0         L                            i2s1m0-sdi1         L                            i2s1m0-sdi2         L                            i2s1m0-sdi3         L                            i2s1m0-sdo0         L      	                      i2s1m0-sdo1         L      
                      i2s1m0-sdo2         L                            i2s1m0-sdo3         L                            i2s1m1-lrck         L                            i2s1m1-mclk         L                            i2s1m1-sclk         L                            i2s1m1-sdi0         L                            i2s1m1-sdi1         L                            i2s1m1-sdi2         L                            i2s1m1-sdi3         L                            i2s1m1-sdo0         L                            i2s1m1-sdo1         L                            i2s1m1-sdo2         L                            i2s1m1-sdo3         L                               i2s2       i2s2m0-lrck         L                           i2s2m0-mclk         L                           i2s2m0-sclk         L                           i2s2m0-sdi          L                           i2s2m0-sdo          L                           i2s2m1-lrck         L                            i2s2m1-mclk         L                           i2s2m1-sclk         L                            i2s2m1-sdi          L      
                      i2s2m1-sdo          L                               i2s3       i2s3-lrck           L                            i2s3-mclk           L                            i2s3-sclk           L                            i2s3-sdi            L                            i2s3-sdo            L                               jtag       jtagm0-pins          L                                      jtagm1-pins          L                                      jtagm2-pins          L                                           litcpu     litcpu-pins         L                               mcu    mcum0-pins           L                                      mcum1-pins           L                                         mipi       mipim0-camera0-clk          L      	                     mipim0-camera1-clk          L                           mipim0-camera2-clk          L                           mipim0-camera3-clk          L                           mipim0-camera4-clk          L                           mipim1-camera0-clk          L                           mipim1-camera1-clk          L                           mipim1-camera2-clk          L                           mipim1-camera3-clk          L                           mipim1-camera4-clk          L      	                     mipi-te0            L                           mipi-te1            L                              npu    npu-pins            L                               pcie20x1       pcie20x1m0-clkreqn          L                           pcie20x1m0-perstn           L                           pcie20x1m0-waken            L                           pcie20x1m1-clkreqn          L                           pcie20x1m1-perstn           L                           pcie20x1m1-waken            L                           pcie20x1-2-button-rstn          L                              pcie30phy      pcie30phy-pins           L                                         pcie30x1       pcie30x1m0-0-clkreqn            L                            pcie30x1m0-0-perstn         L                            pcie30x1m0-0-waken          L                            pcie30x1m0-1-clkreqn            L                            pcie30x1m0-1-perstn         L                            pcie30x1m0-1-waken          L                            pcie30x1m1-0-clkreqn            L                           pcie30x1m1-0-perstn         L                           pcie30x1m1-0-waken          L                           pcie30x1m1-1-clkreqn            L                            pcie30x1m1-1-perstn         L                           pcie30x1m1-1-waken          L                           pcie30x1m2-0-clkreqn            L                           pcie30x1m2-0-perstn         L                           pcie30x1m2-0-waken          L                           pcie30x1m2-1-clkreqn            L                            pcie30x1m2-1-perstn         L                           pcie30x1m2-1-waken          L                           pcie30x1-0-button-rstn          L      	                     pcie30x1-1-button-rstn          L      
                        pcie30x2       pcie30x2m0-clkreqn          L                            pcie30x2m0-perstn           L                            pcie30x2m0-waken            L                            pcie30x2m1-clkreqn          L                           pcie30x2m1-perstn           L                           pcie30x2m1-waken            L                           pcie30x2m2-clkreqn          L                           pcie30x2m2-perstn           L                           pcie30x2m2-waken            L                           pcie30x2m3-clkreqn          L                           pcie30x2m3-perstn           L                           pcie30x2m3-waken            L                           pcie30x2-button-rstn            L                              pcie30x4       pcie30x4m0-clkreqn          L                            pcie30x4m0-perstn           L                            pcie30x4m0-waken            L                            pcie30x4m1-clkreqn          L                           pcie30x4m1-perstn           L                           pcie30x4m1-waken            L                           pcie30x4m2-clkreqn          L                           pcie30x4m2-perstn           L                           pcie30x4m2-waken            L                           pcie30x4m3-clkreqn          L                           pcie30x4m3-perstn           L      
                     pcie30x4m3-waken            L      	                     pcie30x4-button-rstn            L                              pdm0       pdm0m0-clk          L                           pdm0m0-clk1         L                           pdm0m0-sdi0         L                           pdm0m0-sdi1         L                           pdm0m0-sdi2         L                           pdm0m0-sdi3         L                           pdm0m1-clk          L                            pdm0m1-clk1         L                            pdm0m1-sdi0         L                            pdm0m1-sdi1         L                            pdm0m1-sdi2         L                            pdm0m1-sdi3         L                               pdm1       pdm1m0-clk          L                           pdm1m0-clk1         L                           pdm1m0-sdi0         L                           pdm1m0-sdi1         L                           pdm1m0-sdi2         L                           pdm1m0-sdi3         L                           pdm1m1-clk          L                           pdm1m1-clk1         L                           pdm1m1-sdi0         L                           pdm1m1-sdi1         L                           pdm1m1-sdi2         L      	                     pdm1m1-sdi3         L      
                        pmic       pmic-pins         p  L                                                                                                         pmu    pmu-pins            L                               pwm0       pwm0m0-pins         L                            pwm0m1-pins         L                      2      pwm0m2-pins         L                              pwm1       pwm1m0-pins         L                       3      pwm1m1-pins         L                           pwm1m2-pins         L                              pwm2       pwm2m0-pins         L                       4      pwm2m1-pins         L      	                     pwm2m2-pins         L                              pwm3       pwm3m0-pins         L                       5      pwm3m1-pins         L      
                     pwm3m2-pins         L                            pwm3m3-pins         L                              pwm4       pwm4m0-pins         L                             pwm4m1-pins         L                              pwm5       pwm5m0-pins         L       	                      pwm5m1-pins         L                            pwm5m2-pins         L                              pwm6       pwm6m0-pins         L                             pwm6m1-pins         L                           pwm6m2-pins         L                              pwm7       pwm7m0-pins         L                             pwm7m1-pins         L                           pwm7m2-pins         L                           pwm7m3-pins         L                     	         pwm8       pwm8m0-pins         L                            pwm8m1-pins         L                     
      pwm8m2-pins         L                              pwm9       pwm9m0-pins         L                            pwm9m1-pins         L                           pwm9m2-pins         L                              pwm10      pwm10m0-pins            L                             pwm10m1-pins            L                           pwm10m2-pins            L                              pwm11      pwm11m0-pins            L                            pwm11m1-pins            L                           pwm11m2-pins            L                           pwm11m3-pins            L                              pwm12      pwm12m0-pins            L                            pwm12m1-pins            L                              pwm13      pwm13m0-pins            L                            pwm13m1-pins            L                           pwm13m2-pins            L                              pwm14      pwm14m0-pins            L                            pwm14m1-pins            L      
                     pwm14m2-pins            L                              pwm15      pwm15m0-pins            L                            pwm15m1-pins            L                           pwm15m2-pins            L                           pwm15m3-pins            L                              refclk     refclk-pins         L                                sata       sata-pins         0  L                                                       sata0      sata0m0-pins            L                           sata0m1-pins            L                              sata1      sata1m0-pins            L                           sata1m1-pins            L                               sata2      sata2m0-pins            L      	               !      sata2m1-pins            L                     "         sdio       sdiom1-pins       `  L                                                                                    sdiom0-pins       `  L                 
                                            	               #         sdmmc      sdmmc-bus4        @  L                                                             sdmmc-clk           L                            sdmmc-cmd           L                            sdmmc-det           L                      $      sdmmc-pwren         L                      %         spdif0     spdif0m0-tx         L                            spdif0m1-tx         L                     &         spdif1     spdif1m0-tx         L                            spdif1m1-tx         L      	               '      spdif1m2-tx         L                     (         spi0       spi0m0-pins       0  L                                              )      spi0m0-cs0          L                      *      spi0m0-cs1          L                      +      spi0m1-pins       0  L                                            ,      spi0m1-cs0          L      
                      spi0m1-cs1          L      	                      spi0m2-pins       0  L                 	           
               -      spi0m2-cs0          L                     .      spi0m2-cs1          L                     /      spi0m3-pins       0  L                                                  spi0m3-cs0          L                     0      spi0m3-cs1          L                     1         spi1       spi1m1-pins       0  L                                                  spi1m1-cs0          L                            spi1m1-cs1          L                            spi1m2-pins       0  L                                           2      spi1m2-cs0          L                     3      spi1m2-cs1          L                     4      spi1m0-pins       0  L                                           5      spi1m0-cs0          L                     6      spi1m0-cs1          L                     7         spi2       spi2m0-pins       0  L                                           8      spi2m0-cs0          L                     9      spi2m0-cs1          L                     :      spi2m1-pins       0  L                                           ;      spi2m1-cs0          L                     <      spi2m1-cs1          L                     =      spi2m2-pins       0  L                                                     spi2m2-cs0          L       	                      spi2m2-cs1          L                      >         spi3       spi3m1-pins       0  L                                                  spi3m1-cs0          L                            spi3m1-cs1          L                            spi3m2-pins       0  L                                              ?      spi3m2-cs0          L                      @      spi3m2-cs1          L                      A      spi3m3-pins       0  L                                           B      spi3m3-cs0          L                     C      spi3m3-cs1          L                     D      spi3m0-pins       0  L                                           E      spi3m0-cs0          L                     F      spi3m0-cs1          L                     G         spi4       spi4m0-pins       0  L                                                  spi4m0-cs0          L                            spi4m0-cs1          L                            spi4m1-pins       0  L                                            H      spi4m1-cs0          L                     I      spi4m1-cs1          L                     J      spi4m2-pins       0  L                                            K      spi4m2-cs0          L                     L         tsadc      tsadcm1-shut            L                      M      tsadc-shut          L                      N      tsadc-shut-org          L                                uart0      uart0m0-xfer             L                                  O      uart0m1-xfer             L                   	                1      uart0m2-xfer             L         
           
            P      uart0-ctsn          L                      Q      uart0-rtsn          L                      R         uart1      uart1m1-xfer             L         
           
                   uart1m1-ctsn            L         
            S      uart1m1-rtsn            L         
            T      uart1m2-xfer             L          
            
            U      uart1m2-ctsn            L          
            V      uart1m2-rtsn            L          
            W      uart1m0-xfer             L         
           
            X      uart1m0-ctsn            L         
            Y      uart1m0-rtsn            L         
            Z         uart2      uart2m0-xfer             L          
            
            [      uart2m1-xfer             L         
           
            \      uart2m2-xfer             L      
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  utmi_wide              "              !  S                  ?         `                 okay                    syscon@fd5b8000       %    rockchip,rk3588-pcie3-phy-grf syscon                 [                  2      syscon@fd5c0000       $    rockchip,rk3588-pipe-phy-grf syscon              \                   1      syscon@fd5cc000       $    rockchip,rk3588-usbdpphy-grf syscon              \       @           0      syscon@fd5d4000       .    rockchip,rk3588-usb2phy-grf syscon simple-mfd                ]@       @                      +             /   usb2phy@4000              rockchip,rk3588-usb2phy            @                        E   !          phyclk          =usb480m_phy1            "                        !  n   !          phy apb         okay              .   otg-port                        okay                          syscon@fd5e4000       $    rockchip,rk3588-hdptxphy-grf syscon              ^@                  -      spdif-tx@fddb8000         ,    rockchip,rk3588-spdif rockchip,rk3568-spdif              ۀ                   !              !        
  mclk hclk           E   !     !          tx             z           "                         "                     	  disabled                    i2s@fddc8000              rockchip,rk3588-i2s-tdm              ܀                "                      E   !     !     !          mclk_tx mclk_rx hclk               !             !              {           tx             "              !          tx-m                      	  disabled                    spdif-tx@fdde8000         ,    rockchip,rk3588-spdif rockchip,rk3568-spdif              ހ                   !              !  F      
  mclk hclk           E   !  I   !  E        tx             z           "                         "                     	  disabled                    i2s@fddf4000              rockchip,rk3588-i2s-tdm              @                "                      E   !  9   !  9   !  ?        mclk_tx mclk_rx hclk               !  6           !              {           tx             "              !          tx-m                      	  disabled                    i2s@fddf8000              rockchip,rk3588-i2s-tdm              ߀                "                      E   !  +   !  +   !  '        mclk_tx mclk_rx hclk               !  (           !              {           rx             "              !          rx-m                      	  disabled                    i2s@fde00000              rockchip,rk3588-i2s-tdm                               "                      E   !  &   !  &   !  "        mclk_tx mclk_rx hclk               !  #           !              {           rx             "              !          rx-m                      	  disabled                    dp@fde60000           rockchip,rk3588-dp                       @         "                         !           $       (  E   !     !     !     !     !          apb aux hdcp i2s spdif                          "              !                    	  disabled                 ports                        +       port@0                               port@1                                    hdmi@fdea0000             rockchip,rk3588-dw-hdmi-qp                              0  E   !     !     !     !  9   !  S   !          pclk earc ref aud hdp hclk_vo1        P  "                                                              i               Pavp cec earc main hpd              s        
default                             "              !     !  1        ref hdp            u           w                  	  disabled                 ports                        +       port@0                               port@1                                    edp@fded0000              rockchip,rk3588-edp                               E   !     !          dp pclk         "                         s        dp             "              !     !          dp apb             w      	  disabled                 ports                        +       port@0                               port@1                                    hdmi_receiver@fdee0000        .    rockchip,rk3588-hdmirx-ctrler snps,dw-hdmi-rx                        `       0  "                                                  Pcec hdmi dma          8  E   !  	   !     !     !  
   !     !  !   !        3  aclk audio cr_para pclk ref hclk_s_hdmirx hclk_vo1          Z             "               !     !     !     !          axi apb ref biu            u           w      	  disabled                    pcie@fe150000         *    rockchip,rk3588-pcie rockchip,rk3568-pcie                        +                        4  E   !  @   !  E   !  ;   !  J   !  O   !  t        -  aclk_mst aclk_slv aclk_dbi pclk aux pipe ref            pci       P  "                                                                         Psys pmc msg legacy err                      1                     `  D                                                                                         R            c           r                     z                                         	  pcie-phy               "   "      T  `                                                    	       	        @         0      
@        @                                     rdbi apb config             !  &   !  +      	  pwr pipe            okay            h                  t                legacy-interrupt-controller                                                       "                                pcie-ep@fe150000              rockchip,rk3588-pcie-ep       P      
@             
@                         	        @      
@0                 rdbi dbi2 apb addr_space atu       0  E   !  @   !  E   !  ;   !  J   !  O   !  t      )  aclk_mst aclk_slv aclk_dbi pclk aux pipe            "                                                                                                                           +  Psys pmc msg legacy err dma0 dma1 dma2 dma3          c                              	  pcie-phy               "   "           !  &   !  +      	  pwr pipe          	  disabled                    pcie@fe160000         *    rockchip,rk3588-pcie rockchip,rk3568-pcie                        +                       0  E   !  A   !  F   !  <   !  K   !  P   !  u      )  aclk_mst aclk_slv aclk_dbi pclk aux pipe            pci       P  "                                                                            Psys pmc msg legacy err                      1                     `  D                                                                                         R           c           r                   z                                       	  pcie-phy               "   "      T  `                                                    	@      	@       @         0      
@@       @                                     rdbi apb config             !  '   !  ,      	  pwr pipe          	  disabled                 legacy-interrupt-controller                                                       "                                 pcie@fe170000         *    rockchip,rk3588-pcie rockchip,rk3568-pcie                  /      0  E   !  B   !  G   !  =   !  L   !  Q   !        )  aclk_mst aclk_slv aclk_dbi pclk aux pipe            pci       P  "                                                                              Psys pmc msg legacy err                      1                     `  D                                                                                         R           c           r                      z                                            	  pcie-phy               "   "      T  `                                                    	      	       @         0      
@       @                                     rdbi apb config             !  (   !  -      	  pwr pipe                         +         	  disabled                 legacy-interrupt-controller                                                       "                                 ethernet@fe1b0000         &    rockchip,rk3588-gmac snps,dwmac-4.20a                                  "                                    Pmacirq eth_wake_irq       (  E   !  6   !  7   !  X   !  ]   !  4      0  stmmaceth clk_mac_ref pclk_mac aclk_mac ptp_ref            "   !           !  #      
  stmmaceth              u           .                              !          "                 okay            output            #        rgmii             $        
default            %  &  '  (  )  *  +                                ,                             '              mdio              snps,dwmac-mdio                      +                 ethernet-phy@6            ethernet-phy-ieee802.3-c22                      E   !             #         stmmac-axi-config                                                                           rx-queues-config            .             !   queue0        queue1           tx-queues-config            D             "   queue0        queue1              sata@fe220000         '    rockchip,rk3588-dwc-ahci snps,dwc-ahci               "                 "                   (  E   !  c   !  `   !  f   !  U   !  p        sata pmalive rxoob ref asic         Z                        +          	  disabled                 sata-port@0                      l @                     	  sata-phy            y                         phy@fed70000              rockchip,rk3588-hdptx-phy                                  E   !     !  U        ref apb                               8     !  &   !     !  f   !  g   !  h   !  $   !  %      "  phy apb init cmn lane ropll lcpll             -      	  disabled               s      phy@fed90000              rockchip,rk3588-usbdp-phy                                            E   !     !  m   !  W  .        refclk immortal pclk utmi         (     !      !      !      !      !          init cmn lane pcs_apb pma_apb           u  /                     0                   okay                    phy@fee10000              rockchip,rk3588-naneng-combphy                                E   !     !  w   !  W        ref apb pipe               !                                 !  =   !  D        phy apb            .          1      	  disabled                    phy@fee80000              rockchip,rk3588-pcie3-phy                                             E   !  y        pclk               !  H        phy            .          2        okay                    opp-table-cluster0            operating-points-v2                        opp-1008000000              <          
L 
L ~        #  @      opp-1200000000              G          
4 
4 ~        #  @      opp-1416000000              Tfr            ~        #  @         4      opp-1608000000              _"          P P ~        #  @      opp-1800000000              kI          ~ ~ ~        #  @         opp-table-cluster1            operating-points-v2                        opp-1200000000              G          
L 
L B@        #  @      opp-1416000000              Tfr            B@        #  @      opp-1608000000              _"            B@        #  @      opp-1800000000              kI          P P B@        #  @      opp-2016000000              x)          H H B@        #  @      opp-2208000000              h          l l B@        #  @      opp-2400000000                        B@ B@ B@        #  @         opp-table-cluster2            operating-points-v2                        opp-1200000000              G          
L 
L B@        #  @      opp-1416000000              Tfr            B@        #  @      opp-1608000000              _"            B@        #  @      opp-1800000000              kI          P P B@        #  @      opp-2016000000              x)          H H B@        #  @      opp-2208000000              h          l l B@        #  @      opp-2400000000                        B@ B@ B@        #  @         opp-table-gpu             operating-points-v2            #   opp-300000000                         
L 
L P      opp-400000000               ׄ          
L 
L P      opp-500000000               e          
L 
L P      opp-600000000               #F          
L 
L P      opp-700000000               )'          
` 
` P      opp-800000000               /          q q P      opp-900000000               5          5  5  P      opp-1000000000              ;          P P P         emmc-pwrseq           mmc-pwrseq-emmc            3        
default         h  4                        extcon-usb3           linux,extcon-usb-gpio           @                  
default            5        okay               '      leds          
    gpio-leds           
default            6   led-1             7             
  heartbeat         
  Iheartbeat           _            pcie-refclk-gen-clock             fixed-clock                     -           8      pcie-refclk-clock             gpio-gate-clock         E  8                    e  ,                       regulator-vcc-1v1-nldo-s3             regulator-fixed         	Evcc_1v1_nldo_s3          8         	T        	f         	~         	                    regulator-vcc-1v2-s3              regulator-fixed         	Evcc_1v2_s3           8         	T        	f O        	~ O        	             $      regulator-vcc5v0-sys              regulator-fixed         	Evcc5v0_sys           8         	T        	f LK@        	~ LK@        	  9                 chosen          rserial2:115200n8          regulator-dc-12v              regulator-fixed         	Edc_12v           8         	T        	f          	~            ?      gpio-keys         
    gpio-keys           
default            :   button-batlow-n         ~BATLOW#                                   button-slp-btn-n          	  ~SLP_BTN#                         ,            button-wake-n           ~WAKE#                                              switch-lid-btn-n          	  ~LID_BTN#                                                     hdmi-con              hdmi-connector          a      port       endpoint              ;                       i2s3-sound            simple-audio-card           i2s         Haikou,I2S-codec                         <          <   simple-audio-card,codec           =          <      simple-audio-card,cpu             >         sgtl5000-oscillator           fixed-clock                     -w                   regulator-vcc3v3-baseboard            regulator-fixed         	Evcc3v3_baseboard             8         	T        	f 2Z        	~ 2Z        	  ?                 regulator-vcc3v3-low-noise            regulator-fixed         	Evcc3v3_low_noise             	T        	f 2Z        	~ 2Z        	  @                 regulator-vcc5v0-baseboard            regulator-fixed         	Evcc5v0_baseboard             8         	T        	f LK@        	~ LK@        	  ?          9      regulator-vcc5v0-otg              regulator-fixed                    7               
default            A        	Evcc5v0_otg           8           -      regulator-vcc5v0-usb              regulator-fixed         	Evcc5v0_usb           8         	T        	f LK@        	~ LK@        	  ?          @      regulator-vddd-audio-1v6              regulator-fixed         	Evddd_audio_1v6           	T        	f j         	~ j         	  @                 __symbols__         /cpus/cpu@0         	/cpus/cpu@100           /cpus/cpu@200           /cpus/cpu@300           /cpus/cpu@400           %/cpus/cpu@500           ,/cpus/cpu@600           3/cpus/cpu@700           :/cpus/idle-states/cpu-sleep         D/cpus/l2-cache-l0           P/cpus/l2-cache-l1           \/cpus/l2-cache-l2           h/cpus/l2-cache-l3           t/cpus/l2-cache-b0           /cpus/l2-cache-b1           /cpus/l2-cache-b2           /cpus/l2-cache-b3         
  /l3-cache           /display-subsystem          /firmware/scmi          /firmware/scmi/protocol@14          /firmware/scmi/protocol@16          /hdmi0-sound          	  /clock-0          	  /clock-1          	  /clock-2            /reserved-memory/shmem@10f000         #  /reserved-memory/hdmi-receiver-cma          /gpu@fb000000           /usb@fc000000           '/usb@fc800000           6/usb@fc840000           E/usb@fc880000           T/usb@fc8c0000           c/usb@fcd00000           r/iommu@fc900000         ~/iommu@fcb00000         /syscon@fd58a000            /syscon@fd58c000            /syscon@fd5e8000            /syscon@fd5ec000            /syscon@fd5a4000            /syscon@fd5a6000            /syscon@fd5a8000            /syscon@fd5ac000            /syscon@fd5b0000            /syscon@fd5b4000            /syscon@fd5b5000            /syscon@fd5bc000            /syscon@fd5c4000            /syscon@fd5c8000            #/syscon@fd5d0000            0/syscon@fd5d0000/usb2phy@0        $  7/syscon@fd5d0000/usb2phy@0/otg-port         B/syscon@fd5d8000            O/syscon@fd5d8000/usb2phy@8000         (  V/syscon@fd5d8000/usb2phy@8000/host-port         b/syscon@fd5dc000            o/syscon@fd5dc000/usb2phy@c000         (  v/syscon@fd5dc000/usb2phy@c000/host-port         /syscon@fd5e0000            /syscon@fd5f0000            /sram@fd600000          /clock-controller@fd7c0000           [/i2c@fd880000           /serial@fd890000            /pwm@fd8b0000           /pwm@fd8b0010           /pwm@fd8b0020           /pwm@fd8b0030           /power-management@fd8d8000        ,  /power-management@fd8d8000/power-controller       ;  /power-management@fd8d8000/power-controller/power-domain@8        <  /power-management@fd8d8000/power-controller/power-domain@12         /npu@fdab0000           /iommu@fdab9000         /npu@fdac0000           /iommu@fdaca000         /npu@fdad0000           /iommu@fdada000         /video-codec@fdb50000           /iommu@fdb50800         */rga@fdb80000           ./video-codec@fdba0000           8/iommu@fdba0800         F/video-codec@fdba4000           P/iommu@fdba4800         ^/video-codec@fdba8000           h/iommu@fdba8800         v/video-codec@fdbac000           /iommu@fdbac800         /video-codec@fdc38000           /iommu@fdc38700         /video-codec@fdc40000           /iommu@fdc40700         /video-codec@fdc70000           /vop@fdd90000           /vop@fdd90000/ports         /vop@fdd90000/ports/port@0        &  /vop@fdd90000/ports/port@0/endpoint@2           /vop@fdd90000/ports/port@1          /vop@fdd90000/ports/port@2          /vop@fdd90000/ports/port@3          /iommu@fdd97e00         /spdif-tx@fddb0000          /i2s@fddc0000           /spdif-tx@fdde0000          /i2s@fddf0000           /i2s@fddfc000           /dsi@fde20000           /dsi@fde20000/ports/port@0          !/dsi@fde20000/ports/port@1          */dsi@fde30000           //dsi@fde30000/ports/port@0          7/dsi@fde30000/ports/port@1          @/dp@fde50000            D/dp@fde50000/ports/port@0           K/dp@fde50000/ports/port@1           /hdmi@fde80000          S/hdmi@fde80000/ports/port@0       %  \/hdmi@fde80000/ports/port@0/endpoint            i/hdmi@fde80000/ports/port@1       %  s/hdmi@fde80000/ports/port@1/endpoint            /edp@fdec0000           /edp@fdec0000/ports/port@0          /edp@fdec0000/ports/port@1          /qos@fdf35000           /qos@fdf35200           /qos@fdf35400           /qos@fdf35600           /qos@fdf36000           /qos@fdf39000           /qos@fdf3d800           /qos@fdf3e000           /qos@fdf3e200           /qos@fdf3e400           /qos@fdf3e600           /qos@fdf40000           "/qos@fdf40200           //qos@fdf40400           </qos@fdf40500           I/qos@fdf40600           V/qos@fdf40800           c/qos@fdf41000           p/qos@fdf41100           }/qos@fdf60000           /qos@fdf60200           /qos@fdf60400           /qos@fdf61000           /qos@fdf61200           /qos@fdf61400           /qos@fdf62000           /qos@fdf63000           /qos@fdf64000           /qos@fdf66000           /qos@fdf66200           /qos@fdf66400           &/qos@fdf66600           4/qos@fdf66800           B/qos@fdf66a00           P/qos@fdf66c00           ]/qos@fdf66e00           j/qos@fdf67000           u/qos@fdf67200           ~/qos@fdf70000           /qos@fdf71000           /qos@fdf72000           /qos@fdf72200           /qos@fdf72400           /qos@fdf80000           /qos@fdf81000           /qos@fdf81200           /qos@fdf82000           /qos@fdf82200           /dfi@fe060000           /pcie@fe180000        +  /pcie@fe180000/legacy-interrupt-controller          /pcie@fe190000        +  /pcie@fe190000/legacy-interrupt-controller          !/ethernet@fe1c0000          '/ethernet@fe1c0000/mdio       %  -/ethernet@fe1c0000/stmmac-axi-config          $  D/ethernet@fe1c0000/rx-queues-config       $  W/ethernet@fe1c0000/tx-queues-config         j/sata@fe210000          p/sata@fe230000          v/spi@fe2b0000           /mmc@fe2c0000           v/mmc@fe2d0000           z/mmc@fe2e0000           /i2s@fe470000           /i2s@fe480000           /i2s@fe490000           /i2s@fe4a0000           /spdif-tx@fe4e0000          /spdif-tx@fe4f0000          /interrupt-controller@fe600000        7  /interrupt-controller@fe600000/msi-controller@fe640000        7  /interrupt-controller@fe600000/msi-controller@fe660000        D  /interrupt-controller@fe600000/ppi-partitions/interrupt-partition-0       D  /interrupt-controller@fe600000/ppi-partitions/interrupt-partition-1         /dma-controller@fea10000            /dma-controller@fea30000             `/i2c@fea90000            e/i2c@feaa0000            j/i2c@feab0000            o/i2c@feac0000           /i2c@feac0000/regulator@42           t/i2c@fead0000           /i2c@fead0000/codec@a           /timer@feae0000         /watchdog@feaf0000           /spi@feb00000            /spi@feb10000            /spi@feb20000         $  /spi@feb20000/pmic@0/dvs1-null-pins       $  /spi@feb20000/pmic@0/dvs2-null-pins       $  //spi@feb20000/pmic@0/dvs3-null-pins       *  ?/spi@feb20000/pmic@0/regulators/dcdc-reg1         *  J/spi@feb20000/pmic@0/regulators/dcdc-reg2         *  Y/spi@feb20000/pmic@0/regulators/dcdc-reg3         *  d/spi@feb20000/pmic@0/regulators/dcdc-reg4         *  q/spi@feb20000/pmic@0/regulators/dcdc-reg5         *  |/spi@feb20000/pmic@0/regulators/dcdc-reg6         *  /spi@feb20000/pmic@0/regulators/dcdc-reg7         *  /spi@feb20000/pmic@0/regulators/dcdc-reg8         *  /spi@feb20000/pmic@0/regulators/dcdc-reg9         +  /spi@feb20000/pmic@0/regulators/dcdc-reg10        *  /spi@feb20000/pmic@0/regulators/pldo-reg1         *  /spi@feb20000/pmic@0/regulators/pldo-reg2         *  /spi@feb20000/pmic@0/regulators/pldo-reg3         *  /spi@feb20000/pmic@0/regulators/pldo-reg4         *  /spi@feb20000/pmic@0/regulators/pldo-reg5         *  /spi@feb20000/pmic@0/regulators/pldo-reg6         *  /spi@feb20000/pmic@0/regulators/nldo-reg1         *  
/spi@feb20000/pmic@0/regulators/nldo-reg2         *  /spi@feb20000/pmic@0/regulators/nldo-reg3         *  '/spi@feb20000/pmic@0/regulators/nldo-reg4         *  4/spi@feb20000/pmic@0/regulators/nldo-reg5            /spi@feb30000           @/serial@feb40000            F/serial@feb50000            L/serial@feb60000            R/serial@feb70000            X/serial@feb80000            ^/serial@feb90000            d/serial@feba0000            j/serial@febb0000            p/serial@febc0000            v/pwm@febd0000           {/pwm@febd0010           /pwm@febd0020           /pwm@febd0030           /pwm@febe0000           /pwm@febe0010           /pwm@febe0020           /pwm@febe0030           /pwm@febf0000           /pwm@febf0010           /pwm@febf0020           /pwm@febf0030           /thermal-zones          /thermal-zones/package-thermal        2  /thermal-zones/package-thermal/trips/package-crit            /thermal-zones/bigcore0-thermal       5  /thermal-zones/bigcore0-thermal/trips/bigcore0-alert          4  /thermal-zones/bigcore0-thermal/trips/bigcore0-crit          /thermal-zones/bigcore2-thermal       5  "/thermal-zones/bigcore2-thermal/trips/bigcore2-alert          4  1/thermal-zones/bigcore2-thermal/trips/bigcore2-crit       "  ?/thermal-zones/littlecore-thermal         9  S/thermal-zones/littlecore-thermal/trips/littlecore-alert          8  d/thermal-zones/littlecore-thermal/trips/littlecore-crit         t/thermal-zones/center-thermal         0  /thermal-zones/center-thermal/trips/center-crit         /thermal-zones/gpu-thermal        +  /thermal-zones/gpu-thermal/trips/gpu-alert        *  /thermal-zones/gpu-thermal/trips/gpu-crit           /thermal-zones/npu-thermal        *  /thermal-zones/npu-thermal/trips/npu-crit           /tsadc@fec00000         /adc@fec10000            y/i2c@fec80000         #   /i2c@fec80000/fan@18/i2c-mux/i2c@0        *  /i2c@fec80000/fan@18/i2c-mux/i2c@0/rtc@6f            ~/i2c@fec90000           /i2c@fec90000/regulator@42          /i2c@fec90000/regulator@43           /i2c@feca0000            /spi@fecb0000           /efuse@fecc0000         /efuse@fecc0000/cpu-code@2          /efuse@fecc0000/id@7            /efuse@fecc0000/cpu-leakage@17          /efuse@fecc0000/cpu-leakage@18          (/efuse@fecc0000/cpu-leakage@19          5/efuse@fecc0000/log-leakage@1a          A/efuse@fecc0000/gpu-leakage@1b          M/efuse@fecc0000/cpu-version@1c          ]/efuse@fecc0000/npu-leakage@28        !  i/efuse@fecc0000/codec-leakage@29            w/dma-controller@fed10000            }/phy@fed60000           /phy@fed80000           /phy@feda0000           /phy@fedb0000           /phy@fedc0000           /phy@fedc8000           /phy@fee00000           /phy@fee20000           /sram@ff001000          /sram@ff001000/codec-sram@0          /sram@ff001000/codec-sram@78000       	  /pinctrl             =/pinctrl/gpio@fd8a0000           C/pinctrl/gpio@fec20000           I/pinctrl/gpio@fec30000           O/pinctrl/gpio@fec40000           U/pinctrl/gpio@fec50000           /pinctrl/pcfg-pull-up           /pinctrl/pcfg-pull-down         /pinctrl/pcfg-pull-none       $  +/pinctrl/pcfg-pull-none-drv-level-0       $  F/pinctrl/pcfg-pull-none-drv-level-1       $  a/pinctrl/pcfg-pull-none-drv-level-2       $  |/pinctrl/pcfg-pull-none-drv-level-3       $  /pinctrl/pcfg-pull-none-drv-level-4       $  /pinctrl/pcfg-pull-none-drv-level-5       $  /pinctrl/pcfg-pull-none-drv-level-6       $  /pinctrl/pcfg-pull-none-drv-level-7       $  /pinctrl/pcfg-pull-none-drv-level-8       $  /pinctrl/pcfg-pull-none-drv-level-9       %  9/pinctrl/pcfg-pull-none-drv-level-10          %  U/pinctrl/pcfg-pull-none-drv-level-11          %  q/pinctrl/pcfg-pull-none-drv-level-12          %  /pinctrl/pcfg-pull-none-drv-level-13          %  /pinctrl/pcfg-pull-none-drv-level-14          %  /pinctrl/pcfg-pull-none-drv-level-15          "  /pinctrl/pcfg-pull-up-drv-level-0         "  /pinctrl/pcfg-pull-up-drv-level-1         "  /pinctrl/pcfg-pull-up-drv-level-2         "  ,/pinctrl/pcfg-pull-up-drv-level-3         "  E/pinctrl/pcfg-pull-up-drv-level-4         "  ^/pinctrl/pcfg-pull-up-drv-level-5         "  w/pinctrl/pcfg-pull-up-drv-level-6         "  /pinctrl/pcfg-pull-up-drv-level-7         "  /pinctrl/pcfg-pull-up-drv-level-8         "  /pinctrl/pcfg-pull-up-drv-level-9         #  /pinctrl/pcfg-pull-up-drv-level-10        #  /pinctrl/pcfg-pull-up-drv-level-11        #  /pinctrl/pcfg-pull-up-drv-level-12        #  )/pinctrl/pcfg-pull-up-drv-level-13        #  C/pinctrl/pcfg-pull-up-drv-level-14        #  ]/pinctrl/pcfg-pull-up-drv-level-15        $  w/pinctrl/pcfg-pull-down-drv-level-0       $  /pinctrl/pcfg-pull-down-drv-level-1       $  /pinctrl/pcfg-pull-down-drv-level-2       $  /pinctrl/pcfg-pull-down-drv-level-3       $  /pinctrl/pcfg-pull-down-drv-level-4       $  /pinctrl/pcfg-pull-down-drv-level-5       $  /pinctrl/pcfg-pull-down-drv-level-6       $  4/pinctrl/pcfg-pull-down-drv-level-7       $  O/pinctrl/pcfg-pull-down-drv-level-8       $  j/pinctrl/pcfg-pull-down-drv-level-9       %  /pinctrl/pcfg-pull-down-drv-level-10          %  /pinctrl/pcfg-pull-down-drv-level-11          %  /pinctrl/pcfg-pull-down-drv-level-12          %  /pinctrl/pcfg-pull-down-drv-level-13          %  /pinctrl/pcfg-pull-down-drv-level-14          %   /pinctrl/pcfg-pull-down-drv-level-15             -/pinctrl/pcfg-pull-up-smt            >/pinctrl/pcfg-pull-down-smt          Q/pinctrl/pcfg-pull-none-smt       (   d/pinctrl/pcfg-pull-none-drv-level-0-smt       (   /pinctrl/pcfg-pull-none-drv-level-1-smt       (   /pinctrl/pcfg-pull-none-drv-level-2-smt       (   /pinctrl/pcfg-pull-none-drv-level-3-smt       (   /pinctrl/pcfg-pull-none-drv-level-4-smt       (   /pinctrl/pcfg-pull-none-drv-level-5-smt         !/pinctrl/pcfg-output-high           !//pinctrl/pcfg-output-low            !?/pinctrl/auddsm/auddsm-pins         !K/pinctrl/bt1120/bt1120-pins         !W/pinctrl/can0/can0m0-pins           !c/pinctrl/can0/can0m1-pins           !o/pinctrl/can1/can1m0-pins           !{/pinctrl/can1/can1m1-pins           !/pinctrl/can2/can2m0-pins           !/pinctrl/can2/can2m1-pins           !/pinctrl/cif/cif-clk            !/pinctrl/cif/cif-dvp-clk            !/pinctrl/cif/cif-dvp-bus16          !/pinctrl/cif/cif-dvp-bus8           !/pinctrl/clk32k/clk32k-in           !/pinctrl/clk32k/clk32k-out0         !/pinctrl/clk32k/clk32k-out1         !/pinctrl/cpu/cpu-pins         "  !/pinctrl/ddrphych0/ddrphych0-pins         "  "/pinctrl/ddrphych1/ddrphych1-pins         "  "/pinctrl/ddrphych2/ddrphych2-pins         "  "&/pinctrl/ddrphych3/ddrphych3-pins           "5/pinctrl/dp0/dp0m0-pins         "@/pinctrl/dp0/dp0m1-pins         "K/pinctrl/dp0/dp0m2-pins         "V/pinctrl/dp1/dp1m0-pins         "a/pinctrl/dp1/dp1m1-pins         "l/pinctrl/dp1/dp1m2-pins         "w/pinctrl/emmc/emmc-rstnout          "/pinctrl/emmc/emmc-bus8         "/pinctrl/emmc/emmc-clk          "/pinctrl/emmc/emmc-cmd          "/pinctrl/emmc/emmc-data-strobe          "/pinctrl/emmc/emmc-reset            "/pinctrl/eth1/eth1-pins         "/pinctrl/fspi/fspim0-pins           "/pinctrl/fspi/fspim0-cs1            "/pinctrl/fspi/fspim2-pins           "/pinctrl/fspi/fspim2-cs1            "/pinctrl/fspi/fspim1-pins           # /pinctrl/fspi/fspim1-cs1            #/pinctrl/gmac1/gmac1-miim           #/pinctrl/gmac1/gmac1-clkinout           #%/pinctrl/gmac1/gmac1-rx-bus2            #3/pinctrl/gmac1/gmac1-tx-bus2            #A/pinctrl/gmac1/gmac1-rgmii-clk          #Q/pinctrl/gmac1/gmac1-rgmii-bus          #a/pinctrl/gmac1/gmac1-ppsclk         #n/pinctrl/gmac1/gmac1-ppstrig          !  #|/pinctrl/gmac1/gmac1-ptp-ref-clk            #/pinctrl/gmac1/gmac1-txer           #/pinctrl/gpu/gpu-pins           #/pinctrl/hdmi/hdmim0-rx-cec         #/pinctrl/hdmi/hdmim0-rx-hpdin           #/pinctrl/hdmi/hdmim0-rx-scl         #/pinctrl/hdmi/hdmim0-rx-sda         #/pinctrl/hdmi/hdmim0-tx0-cec            #/pinctrl/hdmi/hdmim0-tx0-hpd            #/pinctrl/hdmi/hdmim0-tx0-scl            $	/pinctrl/hdmi/hdmim0-tx0-sda            $/pinctrl/hdmi/hdmim0-tx1-hpd            $'/pinctrl/hdmi/hdmim1-rx-cec         $5/pinctrl/hdmi/hdmim1-rx-hpdin           $E/pinctrl/hdmi/hdmim1-rx-scl         $S/pinctrl/hdmi/hdmim1-rx-sda         $a/pinctrl/hdmi/hdmim1-tx0-cec            $p/pinctrl/hdmi/hdmim1-tx0-hpd            $/pinctrl/hdmi/hdmim1-tx0-scl            $/pinctrl/hdmi/hdmim1-tx0-sda            $/pinctrl/hdmi/hdmim1-tx1-cec            $/pinctrl/hdmi/hdmim1-tx1-hpd            $/pinctrl/hdmi/hdmim1-tx1-scl            $/pinctrl/hdmi/hdmim1-tx1-sda            $/pinctrl/hdmi/hdmim2-rx-cec         $/pinctrl/hdmi/hdmim2-rx-hpdin           $/pinctrl/hdmi/hdmim2-rx-scl         %/pinctrl/hdmi/hdmim2-rx-sda         %/pinctrl/hdmi/hdmim2-tx0-scl            %"/pinctrl/hdmi/hdmim2-tx0-sda            %1/pinctrl/hdmi/hdmim2-tx1-cec            %@/pinctrl/hdmi/hdmim2-tx1-scl            %O/pinctrl/hdmi/hdmim2-tx1-sda            %^/pinctrl/hdmi/hdmi-debug0           %j/pinctrl/hdmi/hdmi-debug1           %v/pinctrl/hdmi/hdmi-debug2           %/pinctrl/hdmi/hdmi-debug3           %/pinctrl/hdmi/hdmi-debug4           %/pinctrl/hdmi/hdmi-debug5           %/pinctrl/hdmi/hdmi-debug6           %/pinctrl/hdmi/hdmim0-tx1-cec            %/pinctrl/hdmi/hdmim0-tx1-scl            %/pinctrl/hdmi/hdmim0-tx1-sda            %/pinctrl/i2c0/i2c0m0-xfer           %/pinctrl/i2c0/i2c0m2-xfer           %/pinctrl/i2c0/i2c0m1-xfer           &/pinctrl/i2c1/i2c1m0-xfer           &/pinctrl/i2c1/i2c1m1-xfer           &/pinctrl/i2c1/i2c1m2-xfer           &'/pinctrl/i2c1/i2c1m3-xfer           &3/pinctrl/i2c1/i2c1m4-xfer           &?/pinctrl/i2c2/i2c2m0-xfer           &K/pinctrl/i2c2/i2c2m2-xfer           &W/pinctrl/i2c2/i2c2m3-xfer           &c/pinctrl/i2c2/i2c2m4-xfer           &o/pinctrl/i2c2/i2c2m1-xfer           &{/pinctrl/i2c3/i2c3m0-xfer           &/pinctrl/i2c3/i2c3m1-xfer           &/pinctrl/i2c3/i2c3m2-xfer           &/pinctrl/i2c3/i2c3m4-xfer           &/pinctrl/i2c3/i2c3m3-xfer           &/pinctrl/i2c4/i2c4m0-xfer           &/pinctrl/i2c4/i2c4m2-xfer           &/pinctrl/i2c4/i2c4m3-xfer           &/pinctrl/i2c4/i2c4m4-xfer           &/pinctrl/i2c4/i2c4m1-xfer           &/pinctrl/i2c5/i2c5m0-xfer           &/pinctrl/i2c5/i2c5m1-xfer           '/pinctrl/i2c5/i2c5m2-xfer           '/pinctrl/i2c5/i2c5m3-xfer           '#/pinctrl/i2c5/i2c5m4-xfer           '//pinctrl/i2c6/i2c6m0-xfer           ';/pinctrl/i2c6/i2c6m1-xfer           'G/pinctrl/i2c6/i2c6m3-xfer           'S/pinctrl/i2c6/i2c6m4-xfer           '_/pinctrl/i2c6/i2c6m2-xfer           'k/pinctrl/i2c7/i2c7m0-xfer           'w/pinctrl/i2c7/i2c7m2-xfer           '/pinctrl/i2c7/i2c7m3-xfer           '/pinctrl/i2c7/i2c7m1-xfer           '/pinctrl/i2c8/i2c8m0-xfer           '/pinctrl/i2c8/i2c8m2-xfer           '/pinctrl/i2c8/i2c8m3-xfer           '/pinctrl/i2c8/i2c8m4-xfer           '/pinctrl/i2c8/i2c8m1-xfer           '/pinctrl/i2s0/i2s0-lrck         '/pinctrl/i2s0/i2s0-mclk         '/pinctrl/i2s0/i2s0-sclk         '/pinctrl/i2s0/i2s0-sdi0         '/pinctrl/i2s0/i2s0-sdi1         (	/pinctrl/i2s0/i2s0-sdi2         (/pinctrl/i2s0/i2s0-sdi3         (/pinctrl/i2s0/i2s0-sdo0         ('/pinctrl/i2s0/i2s0-sdo1         (1/pinctrl/i2s0/i2s0-sdo2         (;/pinctrl/i2s0/i2s0-sdo3         (E/pinctrl/i2s1/i2s1m0-lrck           (Q/pinctrl/i2s1/i2s1m0-mclk           (]/pinctrl/i2s1/i2s1m0-sclk           (i/pinctrl/i2s1/i2s1m0-sdi0           (u/pinctrl/i2s1/i2s1m0-sdi1           (/pinctrl/i2s1/i2s1m0-sdi2           (/pinctrl/i2s1/i2s1m0-sdi3           (/pinctrl/i2s1/i2s1m0-sdo0           (/pinctrl/i2s1/i2s1m0-sdo1           (/pinctrl/i2s1/i2s1m0-sdo2           (/pinctrl/i2s1/i2s1m0-sdo3           (/pinctrl/i2s1/i2s1m1-lrck           (/pinctrl/i2s1/i2s1m1-mclk           (/pinctrl/i2s1/i2s1m1-sclk           (/pinctrl/i2s1/i2s1m1-sdi0           (/pinctrl/i2s1/i2s1m1-sdi1           )/pinctrl/i2s1/i2s1m1-sdi2           )/pinctrl/i2s1/i2s1m1-sdi3           )/pinctrl/i2s1/i2s1m1-sdo0           ))/pinctrl/i2s1/i2s1m1-sdo1           )5/pinctrl/i2s1/i2s1m1-sdo2           )A/pinctrl/i2s1/i2s1m1-sdo3           )M/pinctrl/i2s2/i2s2m0-lrck           )Y/pinctrl/i2s2/i2s2m0-mclk           )e/pinctrl/i2s2/i2s2m0-sclk           )q/pinctrl/i2s2/i2s2m0-sdi            )|/pinctrl/i2s2/i2s2m0-sdo            )/pinctrl/i2s2/i2s2m1-lrck           )/pinctrl/i2s2/i2s2m1-mclk           )/pinctrl/i2s2/i2s2m1-sclk           )/pinctrl/i2s2/i2s2m1-sdi            )/pinctrl/i2s2/i2s2m1-sdo            )/pinctrl/i2s3/i2s3-lrck         )/pinctrl/i2s3/i2s3-mclk         )/pinctrl/i2s3/i2s3-sclk         )/pinctrl/i2s3/i2s3-sdi          )/pinctrl/i2s3/i2s3-sdo          )/pinctrl/jtag/jtagm0-pins           )/pinctrl/jtag/jtagm1-pins           *	/pinctrl/jtag/jtagm2-pins           */pinctrl/litcpu/litcpu-pins         *!/pinctrl/mcu/mcum0-pins         *,/pinctrl/mcu/mcum1-pins       !  *7/pinctrl/mipi/mipim0-camera0-clk          !  *J/pinctrl/mipi/mipim0-camera1-clk          !  *]/pinctrl/mipi/mipim0-camera2-clk          !  *p/pinctrl/mipi/mipim0-camera3-clk          !  */pinctrl/mipi/mipim0-camera4-clk          !  */pinctrl/mipi/mipim1-camera0-clk          !  */pinctrl/mipi/mipim1-camera1-clk          !  */pinctrl/mipi/mipim1-camera2-clk          !  */pinctrl/mipi/mipim1-camera3-clk          !  */pinctrl/mipi/mipim1-camera4-clk            */pinctrl/mipi/mipi-te0          */pinctrl/mipi/mipi-te1          +/pinctrl/npu/npu-pins         %  +/pinctrl/pcie20x1/pcie20x1m0-clkreqn          $  +#/pinctrl/pcie20x1/pcie20x1m0-perstn       #  +5/pinctrl/pcie20x1/pcie20x1m0-waken        %  +F/pinctrl/pcie20x1/pcie20x1m1-clkreqn          $  +Y/pinctrl/pcie20x1/pcie20x1m1-perstn       #  +k/pinctrl/pcie20x1/pcie20x1m1-waken        )  +|/pinctrl/pcie20x1/pcie20x1-2-button-rstn          "  +/pinctrl/pcie30phy/pcie30phy-pins         '  +/pinctrl/pcie30x1/pcie30x1m0-0-clkreqn        &  +/pinctrl/pcie30x1/pcie30x1m0-0-perstn         %  +/pinctrl/pcie30x1/pcie30x1m0-0-waken          '  +/pinctrl/pcie30x1/pcie30x1m0-1-clkreqn        &  +/pinctrl/pcie30x1/pcie30x1m0-1-perstn         %  ,/pinctrl/pcie30x1/pcie30x1m0-1-waken          '  ,/pinctrl/pcie30x1/pcie30x1m1-0-clkreqn        &  ,//pinctrl/pcie30x1/pcie30x1m1-0-perstn         %  ,C/pinctrl/pcie30x1/pcie30x1m1-0-waken          '  ,V/pinctrl/pcie30x1/pcie30x1m1-1-clkreqn        &  ,k/pinctrl/pcie30x1/pcie30x1m1-1-perstn         %  ,/pinctrl/pcie30x1/pcie30x1m1-1-waken          '  ,/pinctrl/pcie30x1/pcie30x1m2-0-clkreqn        &  ,/pinctrl/pcie30x1/pcie30x1m2-0-perstn         %  ,/pinctrl/pcie30x1/pcie30x1m2-0-waken          '  ,/pinctrl/pcie30x1/pcie30x1m2-1-clkreqn        &  ,/pinctrl/pcie30x1/pcie30x1m2-1-perstn         %  ,/pinctrl/pcie30x1/pcie30x1m2-1-waken          )  -
/pinctrl/pcie30x1/pcie30x1-0-button-rstn          )  -!/pinctrl/pcie30x1/pcie30x1-1-button-rstn          %  -8/pinctrl/pcie30x2/pcie30x2m0-clkreqn          $  -K/pinctrl/pcie30x2/pcie30x2m0-perstn       #  -]/pinctrl/pcie30x2/pcie30x2m0-waken        %  -n/pinctrl/pcie30x2/pcie30x2m1-clkreqn          $  -/pinctrl/pcie30x2/pcie30x2m1-perstn       #  -/pinctrl/pcie30x2/pcie30x2m1-waken        %  -/pinctrl/pcie30x2/pcie30x2m2-clkreqn          $  -/pinctrl/pcie30x2/pcie30x2m2-perstn       #  -/pinctrl/pcie30x2/pcie30x2m2-waken        %  -/pinctrl/pcie30x2/pcie30x2m3-clkreqn          $  -/pinctrl/pcie30x2/pcie30x2m3-perstn       #  -/pinctrl/pcie30x2/pcie30x2m3-waken        '  ./pinctrl/pcie30x2/pcie30x2-button-rstn        %  .%/pinctrl/pcie30x4/pcie30x4m0-clkreqn          $  .8/pinctrl/pcie30x4/pcie30x4m0-perstn       #  .J/pinctrl/pcie30x4/pcie30x4m0-waken        %  .[/pinctrl/pcie30x4/pcie30x4m1-clkreqn          $  .n/pinctrl/pcie30x4/pcie30x4m1-perstn       #  ./pinctrl/pcie30x4/pcie30x4m1-waken        %  ./pinctrl/pcie30x4/pcie30x4m2-clkreqn          $  ./pinctrl/pcie30x4/pcie30x4m2-perstn       #  ./pinctrl/pcie30x4/pcie30x4m2-waken        %  ./pinctrl/pcie30x4/pcie30x4m3-clkreqn          $  ./pinctrl/pcie30x4/pcie30x4m3-perstn       #  ./pinctrl/pcie30x4/pcie30x4m3-waken        '  ./pinctrl/pcie30x4/pcie30x4-button-rstn          //pinctrl/pdm0/pdm0m0-clk            //pinctrl/pdm0/pdm0m0-clk1           /)/pinctrl/pdm0/pdm0m0-sdi0           /5/pinctrl/pdm0/pdm0m0-sdi1           /A/pinctrl/pdm0/pdm0m0-sdi2           /M/pinctrl/pdm0/pdm0m0-sdi3           /Y/pinctrl/pdm0/pdm0m1-clk            /d/pinctrl/pdm0/pdm0m1-clk1           /p/pinctrl/pdm0/pdm0m1-sdi0           /|/pinctrl/pdm0/pdm0m1-sdi1           //pinctrl/pdm0/pdm0m1-sdi2           //pinctrl/pdm0/pdm0m1-sdi3           //pinctrl/pdm1/pdm1m0-clk            //pinctrl/pdm1/pdm1m0-clk1           //pinctrl/pdm1/pdm1m0-sdi0           //pinctrl/pdm1/pdm1m0-sdi1           //pinctrl/pdm1/pdm1m0-sdi2           //pinctrl/pdm1/pdm1m0-sdi3           //pinctrl/pdm1/pdm1m1-clk            //pinctrl/pdm1/pdm1m1-clk1           //pinctrl/pdm1/pdm1m1-sdi0           0
/pinctrl/pdm1/pdm1m1-sdi1           0/pinctrl/pdm1/pdm1m1-sdi2           0"/pinctrl/pdm1/pdm1m1-sdi3           0./pinctrl/pmic/pmic-pins         08/pinctrl/pmu/pmu-pins           0A/pinctrl/pwm0/pwm0m0-pins           0M/pinctrl/pwm0/pwm0m1-pins           0Y/pinctrl/pwm0/pwm0m2-pins           0e/pinctrl/pwm1/pwm1m0-pins           0q/pinctrl/pwm1/pwm1m1-pins           0}/pinctrl/pwm1/pwm1m2-pins           0/pinctrl/pwm2/pwm2m0-pins           0/pinctrl/pwm2/pwm2m1-pins           0/pinctrl/pwm2/pwm2m2-pins           0/pinctrl/pwm3/pwm3m0-pins           0/pinctrl/pwm3/pwm3m1-pins           0/pinctrl/pwm3/pwm3m2-pins           0/pinctrl/pwm3/pwm3m3-pins           0/pinctrl/pwm4/pwm4m0-pins           0/pinctrl/pwm4/pwm4m1-pins           0/pinctrl/pwm5/pwm5m0-pins           1/pinctrl/pwm5/pwm5m1-pins           1/pinctrl/pwm5/pwm5m2-pins           1/pinctrl/pwm6/pwm6m0-pins           1%/pinctrl/pwm6/pwm6m1-pins           11/pinctrl/pwm6/pwm6m2-pins           1=/pinctrl/pwm7/pwm7m0-pins           1I/pinctrl/pwm7/pwm7m1-pins           1U/pinctrl/pwm7/pwm7m2-pins           1a/pinctrl/pwm7/pwm7m3-pins           1m/pinctrl/pwm8/pwm8m0-pins           1y/pinctrl/pwm8/pwm8m1-pins           1/pinctrl/pwm8/pwm8m2-pins           1/pinctrl/pwm9/pwm9m0-pins           1/pinctrl/pwm9/pwm9m1-pins           1/pinctrl/pwm9/pwm9m2-pins           1/pinctrl/pwm10/pwm10m0-pins         1/pinctrl/pwm10/pwm10m1-pins         1/pinctrl/pwm10/pwm10m2-pins         1/pinctrl/pwm11/pwm11m0-pins         1/pinctrl/pwm11/pwm11m1-pins         1/pinctrl/pwm11/pwm11m2-pins         2/pinctrl/pwm11/pwm11m3-pins         2/pinctrl/pwm12/pwm12m0-pins         2/pinctrl/pwm12/pwm12m1-pins         2*/pinctrl/pwm13/pwm13m0-pins         27/pinctrl/pwm13/pwm13m1-pins         2D/pinctrl/pwm13/pwm13m2-pins         2Q/pinctrl/pwm14/pwm14m0-pins         2^/pinctrl/pwm14/pwm14m1-pins         2k/pinctrl/pwm14/pwm14m2-pins         2x/pinctrl/pwm15/pwm15m0-pins         2/pinctrl/pwm15/pwm15m1-pins         2/pinctrl/pwm15/pwm15m2-pins         2/pinctrl/pwm15/pwm15m3-pins         2/pinctrl/refclk/refclk-pins         2/pinctrl/sata/sata-pins         2/pinctrl/sata0/sata0m0-pins         2/pinctrl/sata0/sata0m1-pins         2/pinctrl/sata1/sata1m0-pins         2/pinctrl/sata1/sata1m1-pins         2/pinctrl/sata2/sata2m0-pins         3/pinctrl/sata2/sata2m1-pins         3/pinctrl/sdio/sdiom1-pins           3/pinctrl/sdio/sdiom0-pins           3(/pinctrl/sdmmc/sdmmc-bus4           33/pinctrl/sdmmc/sdmmc-clk            3=/pinctrl/sdmmc/sdmmc-cmd            3G/pinctrl/sdmmc/sdmmc-det            3Q/pinctrl/sdmmc/sdmmc-pwren          3]/pinctrl/spdif0/spdif0m0-tx         3i/pinctrl/spdif0/spdif0m1-tx         3u/pinctrl/spdif1/spdif1m0-tx         3/pinctrl/spdif1/spdif1m1-tx         3/pinctrl/spdif1/spdif1m2-tx         3/pinctrl/spi0/spi0m0-pins           3/pinctrl/spi0/spi0m0-cs0            3/pinctrl/spi0/spi0m0-cs1            3/pinctrl/spi0/spi0m1-pins           3/pinctrl/spi0/spi0m1-cs0            3/pinctrl/spi0/spi0m1-cs1            3/pinctrl/spi0/spi0m2-pins           3/pinctrl/spi0/spi0m2-cs0            3/pinctrl/spi0/spi0m2-cs1            3/pinctrl/spi0/spi0m3-pins           4/pinctrl/spi0/spi0m3-cs0            4/pinctrl/spi0/spi0m3-cs1            4!/pinctrl/spi1/spi1m1-pins           4-/pinctrl/spi1/spi1m1-cs0            48/pinctrl/spi1/spi1m1-cs1            4C/pinctrl/spi1/spi1m2-pins           4O/pinctrl/spi1/spi1m2-cs0            4Z/pinctrl/spi1/spi1m2-cs1            4e/pinctrl/spi1/spi1m0-pins           4q/pinctrl/spi1/spi1m0-cs0            4|/pinctrl/spi1/spi1m0-cs1            4/pinctrl/spi2/spi2m0-pins           4/pinctrl/spi2/spi2m0-cs0            4/pinctrl/spi2/spi2m0-cs1            4/pinctrl/spi2/spi2m1-pins           4/pinctrl/spi2/spi2m1-cs0            4/pinctrl/spi2/spi2m1-cs1            4/pinctrl/spi2/spi2m2-pins           4/pinctrl/spi2/spi2m2-cs0            4/pinctrl/spi2/spi2m2-cs1            4/pinctrl/spi3/spi3m1-pins           4/pinctrl/spi3/spi3m1-cs0            5/pinctrl/spi3/spi3m1-cs1            5/pinctrl/spi3/spi3m2-pins           5/pinctrl/spi3/spi3m2-cs0            5&/pinctrl/spi3/spi3m2-cs1            51/pinctrl/spi3/spi3m3-pins           5=/pinctrl/spi3/spi3m3-cs0            5H/pinctrl/spi3/spi3m3-cs1            5S/pinctrl/spi3/spi3m0-pins           5_/pinctrl/spi3/spi3m0-cs0            5j/pinctrl/spi3/spi3m0-cs1            5u/pinctrl/spi4/spi4m0-pins           5/pinctrl/spi4/spi4m0-cs0            5/pinctrl/spi4/spi4m0-cs1            5/pinctrl/spi4/spi4m1-pins           5/pinctrl/spi4/spi4m1-cs0            5/pinctrl/spi4/spi4m1-cs1            5/pinctrl/spi4/spi4m2-pins           5/pinctrl/spi4/spi4m2-cs0            5/pinctrl/tsadc/tsadcm1-shut         5/pinctrl/tsadc/tsadc-shut           5/pinctrl/tsadc/tsadc-shut-org           5/pinctrl/uart0/uart0m0-xfer         6/pinctrl/uart0/uart0m1-xfer         6/pinctrl/uart0/uart0m2-xfer         6/pinctrl/uart0/uart0-ctsn           6)/pinctrl/uart0/uart0-rtsn           64/pinctrl/uart1/uart1m1-xfer         6A/pinctrl/uart1/uart1m1-ctsn         6N/pinctrl/uart1/uart1m1-rtsn         6[/pinctrl/uart1/uart1m2-xfer         6h/pinctrl/uart1/uart1m2-ctsn         6u/pinctrl/uart1/uart1m2-rtsn         6/pinctrl/uart1/uart1m0-xfer         6/pinctrl/uart1/uart1m0-ctsn         6/pinctrl/uart1/uart1m0-rtsn         6/pinctrl/uart2/uart2m0-xfer         6/pinctrl/uart2/uart2m1-xfer         6/pinctrl/uart2/uart2m2-xfer         6/pinctrl/uart2/uart2-ctsn           6/pinctrl/uart2/uart2-rtsn           6/pinctrl/uart3/uart3m0-xfer         6/pinctrl/uart3/uart3m1-xfer         7 /pinctrl/uart3/uart3m2-xfer         7/pinctrl/uart3/uart3-ctsn           7/pinctrl/uart3/uart3-rtsn           7#/pinctrl/uart4/uart4m0-xfer         70/pinctrl/uart4/uart4m1-xfer         7=/pinctrl/uart4/uart4m2-xfer         7J/pinctrl/uart4/uart4-ctsn           7U/pinctrl/uart4/uart4-rtsn           7`/pinctrl/uart5/uart5m0-xfer         7m/pinctrl/uart5/uart5m0-ctsn         7z/pinctrl/uart5/uart5m0-rtsn         7/pinctrl/uart5/uart5m1-xfer         7/pinctrl/uart5/uart5m1-ctsn         7/pinctrl/uart5/uart5m1-rtsn         7/pinctrl/uart5/uart5m2-xfer         7/pinctrl/uart6/uart6m1-xfer         7/pinctrl/uart6/uart6m1-ctsn         7/pinctrl/uart6/uart6m1-rtsn         7/pinctrl/uart6/uart6m2-xfer         7/pinctrl/uart6/uart6m0-xfer         7/pinctrl/uart6/uart6m0-ctsn         8	/pinctrl/uart6/uart6m0-rtsn         8/pinctrl/uart7/uart7m1-xfer         8#/pinctrl/uart7/uart7m1-ctsn         80/pinctrl/uart7/uart7m1-rtsn         8=/pinctrl/uart7/uart7m2-xfer         8J/pinctrl/uart7/uart7m0-xfer         8W/pinctrl/uart7/uart7m0-ctsn         8d/pinctrl/uart7/uart7m0-rtsn         8q/pinctrl/uart8/uart8m0-xfer         8~/pinctrl/uart8/uart8m0-ctsn         8/pinctrl/uart8/uart8m0-rtsn         8/pinctrl/uart8/uart8m1-xfer         8/pinctrl/uart8/uart8m1-ctsn         8/pinctrl/uart8/uart8m1-rtsn         8/pinctrl/uart8/uart8-xfer           8/pinctrl/uart9/uart9m0-xfer         8/pinctrl/uart9/uart9m1-xfer         8/pinctrl/uart9/uart9m1-ctsn         8/pinctrl/uart9/uart9m1-rtsn         8/pinctrl/uart9/uart9m2-xfer         9/pinctrl/uart9/uart9m2-ctsn         9/pinctrl/uart9/uart9m2-rtsn         9%/pinctrl/uart9/uart9m0-ctsn         92/pinctrl/uart9/uart9m0-rtsn         9?/pinctrl/vop/vop-pins           9H/pinctrl/bt656/bt656-pins         #  9S/pinctrl/gpio-func/tsadc-gpio-func          9c/pinctrl/eth0/eth0-pins         9m/pinctrl/gmac0/gmac0-miim           9x/pinctrl/gmac0/gmac0-clkinout           9/pinctrl/gmac0/gmac0-rx-bus2            9/pinctrl/gmac0/gmac0-tx-bus2            9/pinctrl/gmac0/gmac0-rgmii-clk          9/pinctrl/gmac0/gmac0-rgmii-bus          9/pinctrl/gmac0/gmac0-ppsclk         9/pinctrl/gmac0/gmac0-ppstring            9/pinctrl/gmac0/gmac0-ptp-refclk         9/pinctrl/gmac0/gmac0-txer           9/pinctrl/ethernet/eth-reset         :/pinctrl/leds/module-led-pin            :/pinctrl/usb3/usb3-id            :/pinctrl/haikou/haikou-keys-pin         :,/pinctrl/usb2/otg-vbus-drv          :9/hdmi1-sound            :E/usb@fc400000           :T/syscon@fd5b8000            :c/syscon@fd5c0000            :q/syscon@fd5cc000            :/syscon@fd5d4000            :/syscon@fd5d4000/usb2phy@4000         '  :/syscon@fd5d4000/usb2phy@4000/otg-port          :/syscon@fd5e4000            :/spdif-tx@fddb8000          :/i2s@fddc8000           :/spdif-tx@fdde8000          :/i2s@fddf4000           :/i2s@fddf8000           :/i2s@fde00000           :/dp@fde60000            :/dp@fde60000/ports/port@0           :/dp@fde60000/ports/port@1           :/hdmi@fdea0000          :/hdmi@fdea0000/ports/port@0         ;/hdmi@fdea0000/ports/port@1         ;/edp@fded0000           ;/edp@fded0000/ports/port@0          ;/edp@fded0000/ports/port@1          ;'/hdmi_receiver@fdee0000         ;5/pcie@fe150000        +  ;=/pcie@fe150000/legacy-interrupt-controller          ;J/pcie-ep@fe150000           ;U/pcie@fe160000        +  ;]/pcie@fe160000/legacy-interrupt-controller          ;j/pcie@fe170000        +  ;t/pcie@fe170000/legacy-interrupt-controller          ;/ethernet@fe1b0000          ;/ethernet@fe1b0000/mdio       '  ;/ethernet@fe1b0000/mdio/ethernet-phy@6        %  ;/ethernet@fe1b0000/stmmac-axi-config          $  ;/ethernet@fe1b0000/rx-queues-config       $  ;/ethernet@fe1b0000/tx-queues-config         ;/sata@fe220000          ;/phy@fed70000           ;/phy@fed90000           ;/phy@fee10000           ;/phy@fee80000           </opp-table-cluster0         </opp-table-cluster1         <-/opp-table-cluster2         <@/opp-table-gpu          <N/emmc-pwrseq            <Z/extcon-usb3            <f/pcie-refclk-gen-clock          <v/pcie-refclk-clock          </regulator-vcc-1v1-nldo-s3          </regulator-vcc-1v2-s3           </regulator-vcc5v0-sys           </regulator-dc-12v           </hdmi-con/port/endpoint       $  </i2s3-sound/simple-audio-card,codec         </sgtl5000-oscillator            </regulator-vcc3v3-baseboard         </regulator-vcc3v3-low-noise         </regulator-vcc5v0-baseboard         =
/regulator-vcc5v0-otg           =/regulator-vcc5v0-usb           = /regulator-vddd-audio-1v6            	compatible interrupt-parent #address-cells #size-cells model gpio0 gpio1 gpio2 gpio3 gpio4 i2c0 i2c1 i2c2 i2c3 i2c4 i2c5 i2c6 i2c7 i2c8 serial0 serial1 serial2 serial3 serial4 serial5 serial6 serial7 serial8 serial9 spi0 spi1 spi2 spi3 spi4 i2c10 mmc0 rtc0 ethernet0 mmc1 cpu device_type reg enable-method capacity-dmips-mhz clocks cpu-idle-states i-cache-size i-cache-line-size i-cache-sets d-cache-size d-cache-line-size d-cache-sets next-level-cache dynamic-power-coefficient #cooling-cells operating-points-v2 cpu-supply phandle entry-method local-timer-stop arm,psci-suspend-param entry-latency-us exit-latency-us min-residency-us cache-level cache-unified ports arm,smc-id shmem #clock-cells #reset-cells simple-audio-card,format simple-audio-card,mclk-fs simple-audio-card,name status sound-dai interrupts clock-frequency clock-output-names interrupt-names ranges no-map alloc-ranges alignment assigned-clocks assigned-clock-rates clock-names power-domains mali-supply dr_mode phys phy-names phy_type resets snps,dis_enblslpm_quirk snps,dis-u1-entry-quirk snps,dis-u2-entry-quirk snps,dis-u2-freeclk-exists-quirk snps,dis-del-phy-power-chg-quirk snps,dis-tx-ipgap-linecheck-quirk extcon snps,dis_rxdet_inp3_quirk #iommu-cells reset-names #phy-cells phy-supply rockchip,grf pinctrl-0 pinctrl-names dmas dma-names reg-shift reg-io-width #pwm-cells #power-domain-cells domain-supply pm_qos reg-names iommus npu-supply sram-supply sram rockchip,vop-grf rockchip,vo1-grf rockchip,pmu remote-endpoint assigned-clock-parents #sound-dai-cells rockchip,vo-grf bus-range #interrupt-cells interrupt-map-mask interrupt-map linux,pci-domain max-link-speed msi-map iommu-map num-lanes interrupt-controller rockchip,php-grf snps,axi-config snps,mixed-burst snps,mtl-rx-config snps,mtl-tx-config snps,tso snps,blen snps,wr_osr_lmt snps,rd_osr_lmt snps,rx-queues-to-use snps,tx-queues-to-use ports-implemented hba-port-cap snps,rx-ts-max snps,tx-ts-max fifo-depth max-frequency bus-width cap-sd-highspeed vqmmc-supply cd-gpios disable-wp sd-uhs-sdr12 sd-uhs-sdr25 sd-uhs-sdr50 sd-uhs-sdr104 vmmc-supply supports-cqe cap-mmc-highspeed mmc-ddr-1_8v mmc-hs200-1_8v mmc-pwrseq no-sdio no-sd non-removable rockchip,trcm-sync-tx-only dma-noncoherent mbi-alias mbi-ranges msi-controller #msi-cells affinity arm,pl330-periph-burst #dma-cells pagesize vcc-supply fcs,suspend-voltage-selector regulator-name regulator-boot-on regulator-min-microvolt regulator-max-microvolt regulator-ramp-delay vin-supply regulator-off-in-suspend VDDA-supply VDDIO-supply VDDD-supply num-cs gpio-controller #gpio-cells spi-max-frequency system-power-controller vcc1-supply vcc2-supply vcc3-supply vcc4-supply vcc5-supply vcc6-supply vcc7-supply vcc8-supply vcc9-supply vcc10-supply vcc11-supply vcc12-supply vcc13-supply vcc14-supply vcca-supply rockchip,reset-mode pins function regulator-enable-ramp-delay regulator-always-on regulator-suspend-microvolt regulator-on-in-suspend rts-gpios polling-delay-passive polling-delay thermal-sensors temperature hysteresis trip cooling-device rockchip,hw-tshut-temp rockchip,hw-tshut-mode rockchip,hw-tshut-polarity pinctrl-1 #thermal-sensor-cells #io-channel-cells vref-supply bits rockchip,u2phy-grf rockchip,usb-grf rockchip,usbdpphy-grf rockchip,pipe-grf rockchip,pipe-phy-grf pool gpio-ranges bias-pull-up bias-pull-down bias-disable drive-strength input-schmitt-enable output-high output-low rockchip,pins memory-region reset-gpios vpcie3v3-supply clock_in_out phy-handle phy-mode tx_delay rx_delay snps,reset-gpio snps,reset-active-low snps,reset-delays-us rockchip,phy-grf opp-shared opp-hz opp-microvolt clock-latency-ns opp-suspend id-gpios linux,default-trigger color enable-gpios stdout-path label linux,code wakeup-source linux,input-type simple-audio-card,frame-master simple-audio-card,bitclock-master enable-active-high cpu_l0 cpu_l1 cpu_l2 cpu_l3 cpu_b0 cpu_b1 cpu_b2 cpu_b3 CPU_SLEEP l2_cache_l0 l2_cache_l1 l2_cache_l2 l2_cache_l3 l2_cache_b0 l2_cache_b1 l2_cache_b2 l2_cache_b3 l3_cache display_subsystem scmi scmi_clk scmi_reset hdmi0_sound spll xin24m xin32k scmi_shmem hdmi_receiver_cma gpu usb_host0_xhci usb_host0_ehci usb_host0_ohci usb_host1_ehci usb_host1_ohci usb_host2_xhci mmu600_pcie mmu600_php pmu1grf sys_grf mipidcphy0_grf mipidcphy1_grf vop_grf vo0_grf vo1_grf usb_grf php_grf csidphy0_grf csidphy1_grf pipe_phy0_grf pipe_phy2_grf usbdpphy0_grf usb2phy0_grf u2phy0 u2phy0_otg usb2phy2_grf u2phy2 u2phy2_host usb2phy3_grf u2phy3 u2phy3_host hdptxphy0_grf ioc system_sram1 cru uart0 pwm0 pwm1 pwm2 pwm3 power pd_npu pd_gpu rknn_core_0 rknn_mmu_0 rknn_core_1 rknn_mmu_1 rknn_core_2 rknn_mmu_2 vpu121 vpu121_mmu rga vepu121_0 vepu121_0_mmu vepu121_1 vepu121_1_mmu vepu121_2 vepu121_2_mmu vepu121_3 vepu121_3_mmu vdec0 vdec0_mmu vdec1 vdec1_mmu av1d vop vop_out vp0 vp0_out_hdmi0 vp1 vp2 vp3 vop_mmu spdif_tx2 i2s4_8ch spdif_tx3 i2s5_8ch i2s9_8ch dsi0 dsi0_in dsi0_out dsi1 dsi1_in dsi1_out dp0 dp0_in dp0_out hdmi0_in hdmi0_in_vp0 hdmi0_out hdmi0_out_con edp0 edp0_in edp0_out qos_gpu_m0 qos_gpu_m1 qos_gpu_m2 qos_gpu_m3 qos_rga3_1 qos_sdio qos_sdmmc qos_usb3_1 qos_usb3_0 qos_usb2host_0 qos_usb2host_1 qos_fisheye0 qos_fisheye1 qos_isp0_mro qos_isp0_mwo qos_vicap_m0 qos_vicap_m1 qos_isp1_mwo qos_isp1_mro qos_rkvenc0_m0ro qos_rkvenc0_m1ro qos_rkvenc0_m2wo qos_rkvenc1_m0ro qos_rkvenc1_m1ro qos_rkvenc1_m2wo qos_rkvdec0 qos_rkvdec1 qos_av1 qos_iep qos_jpeg_dec qos_jpeg_enc0 qos_jpeg_enc1 qos_jpeg_enc2 qos_jpeg_enc3 qos_rga2_mro qos_rga2_mwo qos_rga3_0 qos_vdpu qos_npu1 qos_npu2 qos_npu0_mwr qos_npu0_mro qos_mcu_npu qos_hdcp0 qos_hdcp1 qos_hdmirx qos_vop_m0 qos_vop_m1 dfi pcie2x1l1 pcie2x1l1_intc pcie2x1l2 pcie2x1l2_intc gmac1 mdio1 gmac1_stmmac_axi_setup gmac1_mtl_rx_setup gmac1_mtl_tx_setup sata0 sata2 sfc sdhci i2s0_8ch i2s1_8ch i2s2_2ch i2s3_2ch spdif_tx0 spdif_tx1 gic its0 its1 ppi_partition0 ppi_partition1 dmac0 dmac1 vdd_npu_s0 sgtl5000 timer0 wdt rk806_dvs1_null rk806_dvs2_null rk806_dvs3_null vdd_gpu_s0 vdd_cpu_lit_s0 vdd_log_s0 vdd_vdenc_s0 vdd_ddr_s0 vdd2_ddr_s3 vcc_2v0_pldo_s3 vcc_3v3_s3 vddq_ddr_s0 vcc_1v8_s3 vcca_1v8_s0 vcc_1v8_s0 vdda_1v2_s0 vcca_3v3_s0 vccio_sd_s0 pldo6_s3 vdd_0v75_s3 vdda_ddr_pll_s0 vdda_0v75_s0 vdda_0v85_s0 vdd_0v75_s0 uart1 uart2 uart3 uart4 uart5 uart6 uart7 uart8 uart9 pwm4 pwm5 pwm6 pwm7 pwm8 pwm9 pwm10 pwm11 pwm12 pwm13 pwm14 pwm15 thermal_zones package_thermal package_crit bigcore0_thermal bigcore0_alert bigcore0_crit bigcore2_thermal bigcore2_alert bigcore2_crit little_core_thermal littlecore_alert littlecore_crit center_thermal center_crit gpu_thermal gpu_alert gpu_crit npu_thermal npu_crit tsadc saradc rtc_twi vdd_cpu_big0_s0 vdd_cpu_big1_s0 otp cpu_code otp_id cpub0_leakage cpub1_leakage cpul_leakage log_leakage gpu_leakage otp_cpu_version npu_leakage codec_leakage dmac2 hdptxphy0 usbdp_phy0 mipidcphy0 mipidcphy1 csi_dphy0 csi_dphy1 combphy0_ps combphy2_psu system_sram2 vdec0_sram vdec1_sram pinctrl pcfg_pull_up pcfg_pull_down pcfg_pull_none pcfg_pull_none_drv_level_0 pcfg_pull_none_drv_level_1 pcfg_pull_none_drv_level_2 pcfg_pull_none_drv_level_3 pcfg_pull_none_drv_level_4 pcfg_pull_none_drv_level_5 pcfg_pull_none_drv_level_6 pcfg_pull_none_drv_level_7 pcfg_pull_none_drv_level_8 pcfg_pull_none_drv_level_9 pcfg_pull_none_drv_level_10 pcfg_pull_none_drv_level_11 pcfg_pull_none_drv_level_12 pcfg_pull_none_drv_level_13 pcfg_pull_none_drv_level_14 pcfg_pull_none_drv_level_15 pcfg_pull_up_drv_level_0 pcfg_pull_up_drv_level_1 pcfg_pull_up_drv_level_2 pcfg_pull_up_drv_level_3 pcfg_pull_up_drv_level_4 pcfg_pull_up_drv_level_5 pcfg_pull_up_drv_level_6 pcfg_pull_up_drv_level_7 pcfg_pull_up_drv_level_8 pcfg_pull_up_drv_level_9 pcfg_pull_up_drv_level_10 pcfg_pull_up_drv_level_11 pcfg_pull_up_drv_level_12 pcfg_pull_up_drv_level_13 pcfg_pull_up_drv_level_14 pcfg_pull_up_drv_level_15 pcfg_pull_down_drv_level_0 pcfg_pull_down_drv_level_1 pcfg_pull_down_drv_level_2 pcfg_pull_down_drv_level_3 pcfg_pull_down_drv_level_4 pcfg_pull_down_drv_level_5 pcfg_pull_down_drv_level_6 pcfg_pull_down_drv_level_7 pcfg_pull_down_drv_level_8 pcfg_pull_down_drv_level_9 pcfg_pull_down_drv_level_10 pcfg_pull_down_drv_level_11 pcfg_pull_down_drv_level_12 pcfg_pull_down_drv_level_13 pcfg_pull_down_drv_level_14 pcfg_pull_down_drv_level_15 pcfg_pull_up_smt pcfg_pull_down_smt pcfg_pull_none_smt pcfg_pull_none_drv_level_0_smt pcfg_pull_none_drv_level_1_smt pcfg_pull_none_drv_level_2_smt pcfg_pull_none_drv_level_3_smt pcfg_pull_none_drv_level_4_smt pcfg_pull_none_drv_level_5_smt pcfg_output_high pcfg_output_low auddsm_pins bt1120_pins can0m0_pins can0m1_pins can1m0_pins can1m1_pins can2m0_pins can2m1_pins cif_clk cif_dvp_clk cif_dvp_bus16 cif_dvp_bus8 clk32k_in clk32k_out0 clk32k_out1 cpu_pins ddrphych0_pins ddrphych1_pins ddrphych2_pins ddrphych3_pins dp0m0_pins dp0m1_pins dp0m2_pins dp1m0_pins dp1m1_pins dp1m2_pins emmc_rstnout emmc_bus8 emmc_clk emmc_cmd emmc_data_strobe emmc_reset eth1_pins fspim0_pins fspim0_cs1 fspim2_pins fspim2_cs1 fspim1_pins fspim1_cs1 gmac1_miim gmac1_clkinout gmac1_rx_bus2 gmac1_tx_bus2 gmac1_rgmii_clk gmac1_rgmii_bus gmac1_ppsclk gmac1_ppstrig gmac1_ptp_ref_clk gmac1_txer gpu_pins hdmim0_rx_cec hdmim0_rx_hpdin hdmim0_rx_scl hdmim0_rx_sda hdmim0_tx0_cec hdmim0_tx0_hpd hdmim0_tx0_scl hdmim0_tx0_sda hdmim0_tx1_hpd hdmim1_rx_cec hdmim1_rx_hpdin hdmim1_rx_scl hdmim1_rx_sda hdmim1_tx0_cec hdmim1_tx0_hpd hdmim1_tx0_scl hdmim1_tx0_sda hdmim1_tx1_cec hdmim1_tx1_hpd hdmim1_tx1_scl hdmim1_tx1_sda hdmim2_rx_cec hdmim2_rx_hpdin hdmim2_rx_scl hdmim2_rx_sda hdmim2_tx0_scl hdmim2_tx0_sda hdmim2_tx1_cec hdmim2_tx1_scl hdmim2_tx1_sda hdmi_debug0 hdmi_debug1 hdmi_debug2 hdmi_debug3 hdmi_debug4 hdmi_debug5 hdmi_debug6 hdmim0_tx1_cec hdmim0_tx1_scl hdmim0_tx1_sda i2c0m0_xfer i2c0m2_xfer i2c0m1_xfer i2c1m0_xfer i2c1m1_xfer i2c1m2_xfer i2c1m3_xfer i2c1m4_xfer i2c2m0_xfer i2c2m2_xfer i2c2m3_xfer i2c2m4_xfer i2c2m1_xfer i2c3m0_xfer i2c3m1_xfer i2c3m2_xfer i2c3m4_xfer i2c3m3_xfer i2c4m0_xfer i2c4m2_xfer i2c4m3_xfer i2c4m4_xfer i2c4m1_xfer i2c5m0_xfer i2c5m1_xfer i2c5m2_xfer i2c5m3_xfer i2c5m4_xfer i2c6m0_xfer i2c6m1_xfer i2c6m3_xfer i2c6m4_xfer i2c6m2_xfer i2c7m0_xfer i2c7m2_xfer i2c7m3_xfer i2c7m1_xfer i2c8m0_xfer i2c8m2_xfer i2c8m3_xfer i2c8m4_xfer i2c8m1_xfer i2s0_lrck i2s0_mclk i2s0_sclk i2s0_sdi0 i2s0_sdi1 i2s0_sdi2 i2s0_sdi3 i2s0_sdo0 i2s0_sdo1 i2s0_sdo2 i2s0_sdo3 i2s1m0_lrck i2s1m0_mclk i2s1m0_sclk i2s1m0_sdi0 i2s1m0_sdi1 i2s1m0_sdi2 i2s1m0_sdi3 i2s1m0_sdo0 i2s1m0_sdo1 i2s1m0_sdo2 i2s1m0_sdo3 i2s1m1_lrck i2s1m1_mclk i2s1m1_sclk i2s1m1_sdi0 i2s1m1_sdi1 i2s1m1_sdi2 i2s1m1_sdi3 i2s1m1_sdo0 i2s1m1_sdo1 i2s1m1_sdo2 i2s1m1_sdo3 i2s2m0_lrck i2s2m0_mclk i2s2m0_sclk i2s2m0_sdi i2s2m0_sdo i2s2m1_lrck i2s2m1_mclk i2s2m1_sclk i2s2m1_sdi i2s2m1_sdo i2s3_lrck i2s3_mclk i2s3_sclk i2s3_sdi i2s3_sdo jtagm0_pins jtagm1_pins jtagm2_pins litcpu_pins mcum0_pins mcum1_pins mipim0_camera0_clk mipim0_camera1_clk mipim0_camera2_clk mipim0_camera3_clk mipim0_camera4_clk mipim1_camera0_clk mipim1_camera1_clk mipim1_camera2_clk mipim1_camera3_clk mipim1_camera4_clk mipi_te0 mipi_te1 npu_pins pcie20x1m0_clkreqn pcie20x1m0_perstn pcie20x1m0_waken pcie20x1m1_clkreqn pcie20x1m1_perstn pcie20x1m1_waken pcie20x1_2_button_rstn pcie30phy_pins pcie30x1m0_0_clkreqn pcie30x1m0_0_perstn pcie30x1m0_0_waken pcie30x1m0_1_clkreqn pcie30x1m0_1_perstn pcie30x1m0_1_waken pcie30x1m1_0_clkreqn pcie30x1m1_0_perstn pcie30x1m1_0_waken pcie30x1m1_1_clkreqn pcie30x1m1_1_perstn pcie30x1m1_1_waken pcie30x1m2_0_clkreqn pcie30x1m2_0_perstn pcie30x1m2_0_waken pcie30x1m2_1_clkreqn pcie30x1m2_1_perstn pcie30x1m2_1_waken pcie30x1_0_button_rstn pcie30x1_1_button_rstn pcie30x2m0_clkreqn pcie30x2m0_perstn pcie30x2m0_waken pcie30x2m1_clkreqn pcie30x2m1_perstn pcie30x2m1_waken pcie30x2m2_clkreqn pcie30x2m2_perstn pcie30x2m2_waken pcie30x2m3_clkreqn pcie30x2m3_perstn pcie30x2m3_waken pcie30x2_button_rstn pcie30x4m0_clkreqn pcie30x4m0_perstn pcie30x4m0_waken pcie30x4m1_clkreqn pcie30x4m1_perstn pcie30x4m1_waken pcie30x4m2_clkreqn pcie30x4m2_perstn pcie30x4m2_waken pcie30x4m3_clkreqn pcie30x4m3_perstn pcie30x4m3_waken pcie30x4_button_rstn pdm0m0_clk pdm0m0_clk1 pdm0m0_sdi0 pdm0m0_sdi1 pdm0m0_sdi2 pdm0m0_sdi3 pdm0m1_clk pdm0m1_clk1 pdm0m1_sdi0 pdm0m1_sdi1 pdm0m1_sdi2 pdm0m1_sdi3 pdm1m0_clk pdm1m0_clk1 pdm1m0_sdi0 pdm1m0_sdi1 pdm1m0_sdi2 pdm1m0_sdi3 pdm1m1_clk pdm1m1_clk1 pdm1m1_sdi0 pdm1m1_sdi1 pdm1m1_sdi2 pdm1m1_sdi3 pmic_pins pmu_pins pwm0m0_pins pwm0m1_pins pwm0m2_pins pwm1m0_pins pwm1m1_pins pwm1m2_pins pwm2m0_pins pwm2m1_pins pwm2m2_pins pwm3m0_pins pwm3m1_pins pwm3m2_pins pwm3m3_pins pwm4m0_pins pwm4m1_pins pwm5m0_pins pwm5m1_pins pwm5m2_pins pwm6m0_pins pwm6m1_pins pwm6m2_pins pwm7m0_pins pwm7m1_pins pwm7m2_pins pwm7m3_pins pwm8m0_pins pwm8m1_pins pwm8m2_pins pwm9m0_pins pwm9m1_pins pwm9m2_pins pwm10m0_pins pwm10m1_pins pwm10m2_pins pwm11m0_pins pwm11m1_pins pwm11m2_pins pwm11m3_pins pwm12m0_pins pwm12m1_pins pwm13m0_pins pwm13m1_pins pwm13m2_pins pwm14m0_pins pwm14m1_pins pwm14m2_pins pwm15m0_pins pwm15m1_pins pwm15m2_pins pwm15m3_pins refclk_pins sata_pins sata0m0_pins sata0m1_pins sata1m0_pins sata1m1_pins sata2m0_pins sata2m1_pins sdiom1_pins sdiom0_pins sdmmc_bus4 sdmmc_clk sdmmc_cmd sdmmc_det sdmmc_pwren spdif0m0_tx spdif0m1_tx spdif1m0_tx spdif1m1_tx spdif1m2_tx spi0m0_pins spi0m0_cs0 spi0m0_cs1 spi0m1_pins spi0m1_cs0 spi0m1_cs1 spi0m2_pins spi0m2_cs0 spi0m2_cs1 spi0m3_pins spi0m3_cs0 spi0m3_cs1 spi1m1_pins spi1m1_cs0 spi1m1_cs1 spi1m2_pins spi1m2_cs0 spi1m2_cs1 spi1m0_pins spi1m0_cs0 spi1m0_cs1 spi2m0_pins spi2m0_cs0 spi2m0_cs1 spi2m1_pins spi2m1_cs0 spi2m1_cs1 spi2m2_pins spi2m2_cs0 spi2m2_cs1 spi3m1_pins spi3m1_cs0 spi3m1_cs1 spi3m2_pins spi3m2_cs0 spi3m2_cs1 spi3m3_pins spi3m3_cs0 spi3m3_cs1 spi3m0_pins spi3m0_cs0 spi3m0_cs1 spi4m0_pins spi4m0_cs0 spi4m0_cs1 spi4m1_pins spi4m1_cs0 spi4m1_cs1 spi4m2_pins spi4m2_cs0 tsadcm1_shut tsadc_shut tsadc_shut_org uart0m0_xfer uart0m1_xfer uart0m2_xfer uart0_ctsn uart0_rtsn uart1m1_xfer uart1m1_ctsn uart1m1_rtsn uart1m2_xfer uart1m2_ctsn uart1m2_rtsn uart1m0_xfer uart1m0_ctsn uart1m0_rtsn uart2m0_xfer uart2m1_xfer uart2m2_xfer uart2_ctsn uart2_rtsn uart3m0_xfer uart3m1_xfer uart3m2_xfer uart3_ctsn uart3_rtsn uart4m0_xfer uart4m1_xfer uart4m2_xfer uart4_ctsn uart4_rtsn uart5m0_xfer uart5m0_ctsn uart5m0_rtsn uart5m1_xfer uart5m1_ctsn uart5m1_rtsn uart5m2_xfer uart6m1_xfer uart6m1_ctsn uart6m1_rtsn uart6m2_xfer uart6m0_xfer uart6m0_ctsn uart6m0_rtsn uart7m1_xfer uart7m1_ctsn uart7m1_rtsn uart7m2_xfer uart7m0_xfer uart7m0_ctsn uart7m0_rtsn uart8m0_xfer uart8m0_ctsn uart8m0_rtsn uart8m1_xfer uart8m1_ctsn uart8m1_rtsn uart8_xfer uart9m0_xfer uart9m1_xfer uart9m1_ctsn uart9m1_rtsn uart9m2_xfer uart9m2_ctsn uart9m2_rtsn uart9m0_ctsn uart9m0_rtsn vop_pins bt656_pins tsadc_gpio_func eth0_pins gmac0_miim gmac0_clkinout gmac0_rx_bus2 gmac0_tx_bus2 gmac0_rgmii_clk gmac0_rgmii_bus gmac0_ppsclk gmac0_ppstring gmac0_ptp_refclk gmac0_txer eth_reset module_led_pin usb3_id haikou_keys_pin otg_vbus_drv hdmi1_sound usb_host1_xhci pcie30_phy_grf pipe_phy1_grf usbdpphy1_grf usb2phy1_grf u2phy1 u2phy1_otg hdptxphy1_grf spdif_tx5 i2s8_8ch spdif_tx4 i2s6_8ch i2s7_8ch i2s10_8ch dp1 dp1_in dp1_out hdmi1 hdmi1_in hdmi1_out edp1 edp1_in edp1_out hdmi_receiver pcie3x4 pcie3x4_intc pcie3x4_ep pcie3x2 pcie3x2_intc pcie2x1l0 pcie2x1l0_intc gmac0 mdio0 rgmii_phy gmac0_stmmac_axi_setup gmac0_mtl_rx_setup gmac0_mtl_tx_setup sata1 hdptxphy1 usbdp_phy1 combphy1_ps pcie30phy cluster0_opp_table cluster1_opp_table cluster2_opp_table gpu_opp_table emmc_pwrseq extcon_usb3 pcie_refclk_gen pcie_refclk vcc_1v1_nldo_s3 vcc_1v2_s3 vcc5v0_sys dc_12v hdmi_con_in sgtl5000_codec sgtl5000_clk vcc3v3_baseboard vcc3v3_low_noise vcc5v0_baseboard vcc5v0_otg vcc5v0_usb vddd_audio_1v6 