 B   8    (            C.                                  armsom,sige5 rockchip,rk3576                                     +            7ArmSoM Sige5       aliases          =/soc/i2c@27300000            B/soc/i2c@2ac40000            G/soc/i2c@2ac50000            L/soc/i2c@2ac60000            Q/soc/i2c@2ac70000            V/soc/i2c@2ac80000            [/soc/i2c@2ac90000            `/soc/i2c@2aca0000            e/soc/i2c@2acb0000            j/soc/i2c@2ae80000            o/soc/serial@2ad40000             w/soc/serial@27310000             /soc/serial@2ad50000             /soc/serial@2ad60000             /soc/serial@2ad70000             /soc/serial@2ad80000             /soc/serial@2ad90000             /soc/serial@2ada0000             /soc/serial@2adb0000             /soc/serial@2adc0000             /soc/serial@2afc0000             /soc/serial@2afd0000             /soc/spi@2acf0000            /soc/spi@2ad00000            /soc/spi@2ad10000            /soc/spi@2ad20000            /soc/spi@2ad30000            /soc/ethernet@2a220000           /soc/ethernet@2a230000        clock-xin32k              fixed-clock                     xin32k          !            .        clock-xin24m              fixed-clock         !             n6         xin24m          .        clock-spll            fixed-clock         !             )׫        spll            .        cpus                         +       cpu-map    cluster0       core0           6         core1           6         core2           6         core3           6            cluster1       core0           6         core1           6         core2           6         core3           6   	            cpu@0           :cpu           arm,cortex-a53          F            Jpsci            X          k   
   
        r              x                                         .         cpu@1           :cpu           arm,cortex-a53          F           Jpsci            X          k   
   
        r                                            .         cpu@2           :cpu           arm,cortex-a53          F           Jpsci            X          k   
   
        r                                            .         cpu@3           :cpu           arm,cortex-a53          F           Jpsci            X          k   
   
        r                                            .         cpu@100         :cpu           arm,cortex-a72          F           Jpsci            X           k   
           r             @                                         .         cpu@101         :cpu           arm,cortex-a72          F          Jpsci            X           k   
           r                                            .         cpu@102         :cpu           arm,cortex-a72          F          Jpsci            X           k   
           r                                            .         cpu@103         :cpu           arm,cortex-a72          F          Jpsci            X           k   
           r                                            .   	      idle-states         psci       cpu-sleep             arm,idle-state                        x                                       .               opp-table-cluster0            operating-points-v2          1        .      opp-408000000           <    Q         C 
` 
` ~        Q  @      opp-600000000           <    #F         C 
` 
` ~        Q  @      opp-816000000           <    0,         C 
` 
` ~        Q  @      opp-1008000000          <    <         C 
` 
` ~        Q  @      opp-1200000000          <    G         C 
` 
` ~        Q  @      opp-1416000000          <    Tfr         C   ~        Q  @      opp-1608000000          <    _"         C q q ~        Q  @      opp-1800000000          <    kI         C   ~        Q  @         b      opp-2016000000          <    x)         C   ~        Q  @         opp-table-cluster1            operating-points-v2          1        .      opp-408000000           <    Q         C 
` 
` ~        Q  @         b      opp-600000000           <    #F         C 
` 
` ~        Q  @      opp-816000000           <    0,         C 
` 
` ~        Q  @      opp-1008000000          <    <         C 
` 
` ~        Q  @      opp-1200000000          <    G         C 
` 
` ~        Q  @      opp-1416000000          <    Tfr         C 
4 
4 ~        Q  @      opp-1608000000          <    _"         C @ @ ~        Q  @      opp-1800000000          <    kI         C 5  5  ~        Q  @      opp-2016000000          <    x)         C )$ )$ ~        Q  @      opp-2208000000          <    h         C H H ~        Q  @         opp-table-gpu             operating-points-v2         .   Y   opp-300000000           <             C 
` 
` P      opp-400000000           <    ׄ         C 
` 
` P      opp-500000000           <    e         C 
` 
` P      opp-600000000           <    #F         C 
` 
` P      opp-700000000           <    )'         C   P      opp-800000000           <    /         C X X P      opp-900000000           <    5         C   P      opp-950000000           <    8ـ        C P P P         display-subsystem             rockchip,display-subsystem          n           .        firmware       scmi              arm,scmi-smc            t                                  +            .     protocol@14         F           !           .   
            hdmi-sound            simple-audio-card           HDMI            i2s                    okay            .  	   simple-audio-card,codec                  simple-audio-card,cpu                       pinctrl           rockchip,rk3576-pinctrl                                 +                    .      gpio@27320000             rockchip,gpio-bank          F    '2                 k                                                                             0           <           .         gpio@2ae10000             rockchip,gpio-bank          F    *                 k                                                                               0           <           .        gpio@2ae20000             rockchip,gpio-bank          F    *                 k                                       @                                       0           <           .   '      gpio@2ae30000             rockchip,gpio-bank          F    *                 k                                       `                                       0           <           .         gpio@2ae40000             rockchip,gpio-bank          F    *                 k                                                                              0           <           .         pcfg-pull-up             M        .         pcfg-pull-down           Z        .         pcfg-pull-none           i        .         pcfg-pull-none-drv-level-0           i        v            .  
      pcfg-pull-none-drv-level-1           i        v           .        pcfg-pull-none-drv-level-2           i        v           .         pcfg-pull-none-drv-level-3           i        v           .        pcfg-pull-none-drv-level-4           i        v           .        pcfg-pull-none-drv-level-5           i        v           .        pcfg-pull-none-drv-level-6           i        v           .        pcfg-pull-none-drv-level-7           i        v           .        pcfg-pull-none-drv-level-8           i        v           .        pcfg-pull-none-drv-level-9           i        v   	        .        pcfg-pull-none-drv-level-10          i        v   
        .        pcfg-pull-none-drv-level-11          i        v           .        pcfg-pull-none-drv-level-12          i        v           .        pcfg-pull-none-drv-level-13          i        v           .        pcfg-pull-none-drv-level-14          i        v           .        pcfg-pull-none-drv-level-15          i        v           .        pcfg-pull-up-drv-level-0             M        v            .        pcfg-pull-up-drv-level-1             M        v           .        pcfg-pull-up-drv-level-2             M        v           .         pcfg-pull-up-drv-level-3             M        v           .         pcfg-pull-up-drv-level-4             M        v           .        pcfg-pull-up-drv-level-5             M        v           .        pcfg-pull-up-drv-level-6             M        v           .        pcfg-pull-up-drv-level-7             M        v           .        pcfg-pull-up-drv-level-8             M        v           .        pcfg-pull-up-drv-level-9             M        v   	        .         pcfg-pull-up-drv-level-10            M        v   
        .  !      pcfg-pull-up-drv-level-11            M        v           .  "      pcfg-pull-up-drv-level-12            M        v           .  #      pcfg-pull-up-drv-level-13            M        v           .  $      pcfg-pull-up-drv-level-14            M        v           .  %      pcfg-pull-up-drv-level-15            M        v           .  &      pcfg-pull-down-drv-level-0           Z        v            .  '      pcfg-pull-down-drv-level-1           Z        v           .  (      pcfg-pull-down-drv-level-2           Z        v           .  )      pcfg-pull-down-drv-level-3           Z        v           .  *      pcfg-pull-down-drv-level-4           Z        v           .  +      pcfg-pull-down-drv-level-5           Z        v           .  ,      pcfg-pull-down-drv-level-6           Z        v           .  -      pcfg-pull-down-drv-level-7           Z        v           .  .      pcfg-pull-down-drv-level-8           Z        v           .  /      pcfg-pull-down-drv-level-9           Z        v   	        .  0      pcfg-pull-down-drv-level-10          Z        v   
        .  1      pcfg-pull-down-drv-level-11          Z        v           .  2      pcfg-pull-down-drv-level-12          Z        v           .  3      pcfg-pull-down-drv-level-13          Z        v           .  4      pcfg-pull-down-drv-level-14          Z        v           .  5      pcfg-pull-down-drv-level-15          Z        v           .  6      pcfg-pull-up-smt             M                 .  7      pcfg-pull-down-smt           Z                 .  8      pcfg-pull-none-smt           i                 .         pcfg-pull-none-drv-level-0-smt           i        v                     .  9      pcfg-pull-none-drv-level-1-smt           i        v                    .  :      pcfg-pull-none-drv-level-2-smt           i        v                    .  ;      pcfg-pull-none-drv-level-3-smt           i        v                    .  <      pcfg-pull-none-drv-level-4-smt           i        v                    .  =      pcfg-pull-none-drv-level-5-smt           i        v                    .  >      pcfg-output-high                     .  ?      pcfg-output-low                  .  @      aupll_clk      aupll_clkm0-pins                                  .  A      aupll_clkm1-pins                                 .  B      aupll_clkm2-pins                                .  C         cam_clk0       cam_clk0m0-clk0                             .  D      cam_clk0m1-clk0                             .  E         cam_clk1       cam_clk1m0-clk1                              .  F      cam_clk1m1-clk1                             .  G         cam_clk2       cam_clk2m0-clk2                             .  H      cam_clk2m1-clk2                             .  I         can0       can0m0-pins                                           .  J      can0m1-pins                                          .  K      can0m2-pins                                          .  L      can0m3-pins                                          .  M         can1       can1m0-pins                                          .  N      can1m1-pins                                          .  O      can1m2-pins                                          .  P      can1m3-pins                                          .  Q         clk0_32k       clk0_32k-pins                     
           .  R         clk1_32k       clk1_32k-pins                               .  S         clk_32k    clk_32k-pins                      	           .  T         cpubig     cpubig-pins                              .  U         cpulit     cpulit-pins                              .  V         debug0_test    debug0_test-pins                                .  W         debug1_test    debug1_test-pins                                .  X         debug2_test    debug2_test-pins                                .  Y         debug3_test    debug3_test-pins                                .  Z         debug4_test    debug4_test-pins                                .  [         debug5_test    debug5_test-pins                                .  \         debug6_test    debug6_test-pins                                .  ]         debug7_test    debug7_test-pins                                .  ^         dp     dpm0-pins                    
           .  _      dpm1-pins                     	           .  `         dsm_aud    dsm_audm0-ln                                .  a      dsm_audm0-lp                                 .  b      dsm_audm0-rn                                .  c      dsm_audm0-rp                                .  d      dsm_audm1-ln                                .  e      dsm_audm1-lp                                .  f      dsm_audm1-rn                                .  g      dsm_audm1-rp                                .  h         dsmc       dsmc-clkn                               .  i      dsmc-clkp                               .  j      dsmc-csn0                               .  k      dsmc-csn1                               .  l      dsmc-csn2                               .  m      dsmc-csn3                               .  n      dsmc-data0                              .  o      dsmc-data1                              .  p      dsmc-data2                              .  q      dsmc-data3                              .  r      dsmc-data4                              .  s      dsmc-data5                              .  t      dsmc-data6                              .  u      dsmc-data7                              .  v      dsmc-data8                              .  w      dsmc-data9                              .  x      dsmc-data10                             .  y      dsmc-data11               
              .  z      dsmc-data12               	              .  {      dsmc-data13                             .  |      dsmc-data14                             .  }      dsmc-data15                             .  ~      dsmc-dqs0                               .        dsmc-dqs1                               .        dsmc-int0                                .        dsmc-int1                               .        dsmc-int2                               .        dsmc-int3                               .        dsmc-rdyn                               .        dsmc-resetn                             .           dsmc_testclk       dsmc-testclk-out                                .           dsmc_testdata      dsmc-testdata-out                               .           edp_tx     edp_txm0-pins                               .        edp_txm1-pins                     
           .           emmc       emmc-rstnout                                .         emmc-bus8                                                                                                                    .         emmc-clk                  	              .         emmc-cmd                                .         emmc-strb                 
              .            emmc_testclk       emmc_testclk-test                               .           emmc_testdata      emmc_testdata-test                              .           eth0       eth0m0-miim                                          .   p      eth0m0-rx_bus2        0                    
            	              .   r      eth0m0-tx_bus2        0                                              .   q      eth0m0-rgmii_clk                                             .   s      eth0m0-rgmii_bus          @                                                          .   t      eth0m0-mclk                             .        eth0m0-ppsclk                               .        eth0m0-ppstrig                              .        eth0m1-miim                                           .        eth0m1-rx_bus2        0                                              .        eth0m1-tx_bus2        0                    	                          .        eth0m1-rgmii_clk                                             .        eth0m1-rgmii_bus          @                                            
              .        eth0m1-mclk                             .        eth0m1-ppsclk                               .        eth0m1-ppstrig                              .           eth1       eth1m0-miim                                          .   z      eth1m0-rx_bus2        0                                              .   |      eth1m0-tx_bus2        0                                              .   {      eth1m0-rgmii_clk                                             .   }      eth1m0-rgmii_bus          @                                                          .   ~      eth1m0-mclk                             .        eth1m0-ppsclk                               .        eth1m0-ppstrig                              .        eth1m1-miim                                          .        eth1m1-rx_bus2        0                                              .        eth1m1-tx_bus2        0                                              .        eth1m1-rgmii_clk                                             .        eth1m1-rgmii_bus          @                                                          .        eth1m1-mclk                             .        eth1m1-ppsclk                               .        eth1m1-ppstrig                              .           eth0_ptp       eth0m0-ptp-refclk                               .        eth0m1-ptp-refclk                               .           eth0_testrxclk     eth0_testrxclkm0-test                               .        eth0_testrxclkm1-test                               .           eth0_testrxd       eth0_testrxdm0-test                             .        eth0_testrxdm1-test                             .           eth1_ptp       eth1m0-ptp-refclk                               .        eth1m1-ptp-refclk                               .           eth1_testrxclk     eth1_testrxclkm0-test                               .        eth1_testrxclkm1-test                               .           eth1_testrxd       eth1_testrxdm0-test                              .        eth1_testrxdm1-test                             .           eth_clk0_25m       ethm0-clk0-25m-out                              .        ethm1-clk0-25m-out                              .           eth_clk1_25m       ethm0-clk1-25m-out                              .        ethm1-clk1-25m-out                              .           flexbus0       flexbus0m0-csn                              .        flexbus0m0-d13                               .        flexbus0m0-d14                              .        flexbus0m0-d15                              .        flexbus0m1-csn                              .        flexbus0m1-d13                              .        flexbus0m1-d14                              .        flexbus0m1-d15                              .        flexbus0m2-csn                              .        flexbus0m3-csn                              .        flexbus0m4-csn                              .        flexbus0-clk                                .        flexbus0-d10                                .        flexbus0-d11                                .        flexbus0-d12                                .        flexbus0-d0                             .        flexbus0-d1                             .        flexbus0-d2                             .        flexbus0-d3               
              .        flexbus0-d4               	              .        flexbus0-d5                             .        flexbus0-d6                             .        flexbus0-d7                             .        flexbus0-d8                             .        flexbus0-d9                             .           flexbus1       flexbus1m0-csn                              .        flexbus1m0-d12                              .        flexbus1m0-d13                              .        flexbus1m0-d14                               .        flexbus1m0-d15                              .        flexbus1m1-csn                              .        flexbus1m1-d12                              .        flexbus1m1-d13                              .        flexbus1m1-d14                	              .        flexbus1m1-d15                
              .        flexbus1m2-csn                              .        flexbus1m3-csn                               .        flexbus1m4-csn                              .        flexbus1-clk                                .        flexbus1-d10                                .        flexbus1-d11                                .        flexbus1-d0                             .        flexbus1-d1                             .        flexbus1-d2                             .        flexbus1-d3                             .        flexbus1-d4                             .        flexbus1-d5                             .        flexbus1-d6                             .        flexbus1-d7                             .        flexbus1-d8                             .        flexbus1-d9                             .           flexbus0_testclk       flexbus0_testclk-testclk                                .           flexbus0_testdata      flexbus0_testdata-testdata                              .           flexbus1_testclk       flexbus1_testclk-testclk                                .           flexbus1_testdata      flexbus1_testdata-testdata                              .           fspi0      fspi0-pins                	                                                                                                             
              .        fspi0-csn0                              .        fspi0-csn1                              .           fspi1      fspi1m0-pins          P                                                                       .        fspi1m0-csn0                                .        fspi1m1-pins                                                                                                                                            .        fspi1m1-csn0                                .        fspi1m1-csn1                                .           fspi0_testclk      fspi0_testclk-test                              .           fspi0_testdata     fspi0_testdata-test                             .           fspi1_testclk      fspi1_testclkm1-test                                .           fspi1_testdata     fspi1_testdatam1-test                               .           gpu    gpu-pins                                 .           hdmi_tx    hdmi_txm0-pins                    	            	           .   e      hdmi_txm1-pins                     	             	           .        hdmi-tx-scl                  	           .   f      hdmi-tx-sda                  	           .   g         i2c0       i2c0m0-xfer                              	              .   1      i2c0m1-xfer                    	             	           .           i2c1       i2c1m0-xfer                 
                           .         i2c1m1-xfer                    	             	           .           i2c2       i2c2m0-xfer                    	             	           .         i2c2m1-xfer                    
            
           .        i2c2m2-xfer                                          .        i2c2m3-xfer                                          .           i2c3       i2c3m0-xfer                                          .         i2c3m1-xfer                    	             	           .        i2c3m2-xfer                                          .        i2c3m3-xfer                                          .           i2c4       i2c4m0-xfer                    	             	           .         i2c4m1-xfer                                          .         i2c4m2-xfer                                          .        i2c4m3-xfer                                          .           i2c5       i2c5m0-xfer                                          .         i2c5m1-xfer                   
            
           .        i2c5m2-xfer                                          .        i2c5m3-xfer                                          .           i2c6       i2c6m0-xfer                                            .         i2c6m1-xfer                   
            
           .        i2c6m2-xfer                                          .        i2c6m3-xfer                                          .           i2c7       i2c7m0-xfer                   
            
           .         i2c7m1-xfer                                           .  	      i2c7m2-xfer                                           .  
      i2c7m3-xfer                                          .           i2c8       i2c8m0-xfer                                           .         i2c8m1-xfer                   
            
           .        i2c8m2-xfer                                          .        i2c8m3-xfer                            
              .           i2c9       i2c9m0-xfer                   
            
           .         i2c9m1-xfer                   
            
           .        i2c9m2-xfer                                          .        i2c9m3-xfer                                          .           i3c0       i3c0m0-xfer                                            .        i3c0m1-xfer                   
            
           .           i3c1       i3c1m0-xfer                                          .        i3c1m1-xfer                                          .        i3c1m2-xfer                                          .           i3c0_sda       i3c0_sdam0-pu                                .        i3c0_sdam1-pu                    
           .           i3c1_sda       i3c1_sdam0-pu                               .        i3c1_sdam1-pu                               .        i3c1_sdam2-pu                               .           isp_flash      isp_flashm0-pins                                .        isp_flashm1-pins                                .           isp_prelight       isp_prelightm0-pins                             .        isp_prelightm1-pins                             .           jtag       jtagm0-pins                   	            	           .         jtagm1-pins                    
             
           .  !         mipi       mipim0-pins               
              .  "      mipim1-pins                             .  #      mipim2-pins                              .  $      mipim3-pins                             .  %         npu    npu-pins                                 .  &         pcie0      pcie0m0-pins                  
              .  '      pcie0m1-pins                                .  (      pcie0m2-pins                                .  )      pcie0m3-pins                     	           .  *      pcie21-port0-buttonrst                              .  +         pcie1      pcie1m0-pins                                .  ,      pcie1m1-pins                                .  -      pcie1m2-pins                                .  .      pcie1m3-pins                     
           .  /      pcie21-port1-buttonrst                              .  0         pdm0       pdm0m0-clk0                              .  1      pdm0m0-clk1                              .  2      pdm0m0-sdi0                              .  3      pdm0m0-sdi1                              .  4      pdm0m0-sdi2                              .  5      pdm0m0-sdi3                              .  6      pdm0m1-clk0               	              .  7      pdm0m1-clk1                             .  8      pdm0m1-sdi0               
              .  9      pdm0m1-sdi1                             .  :      pdm0m1-sdi2                             .  ;      pdm0m1-sdi3                             .  <      pdm0m2-clk0                             .  =      pdm0m2-clk1                             .  >      pdm0m2-sdi0                             .  ?      pdm0m2-sdi1                             .  @      pdm0m2-sdi2                             .  A      pdm0m2-sdi3                             .  B      pdm0m3-clk0                             .  C      pdm0m3-clk1                             .  D      pdm0m3-sdi0                             .  E      pdm0m3-sdi1               
              .  F      pdm0m3-sdi2               	              .  G      pdm0m3-sdi3                             .  H         pdm1       pdm1m0-clk0                             .  I      pdm1m0-clk1                             .  J      pdm1m0-sdi0                             .  K      pdm1m0-sdi1                             .  L      pdm1m0-sdi2                             .  M      pdm1m0-sdi3                             .  N      pdm1m1-clk0                             .  O      pdm1m1-clk1                             .  P      pdm1m1-sdi0                             .  Q      pdm1m1-sdi1               
              .  R      pdm1m1-sdi2               	              .  S      pdm1m1-sdi3                             .  T      pdm1m2-clk0               	              .  U      pdm1m2-clk1                             .  V      pdm1m2-sdi0                             .  W      pdm1m2-sdi1               
              .  X      pdm1m2-sdi2                             .  Y      pdm1m2-sdi3                             .  Z         pmu_debug_test     pmu_debug_test-pins                              .  [         pwm0       pwm0m0-ch0                               .  \      pwm0m0-ch1                               .  ]      pwm0m1-ch0                              .  ^      pwm0m1-ch1                              .  _      pwm0m2-ch0                              .  `      pwm0m2-ch1                              .  a      pwm0m3-ch0                              .  b      pwm0m3-ch1                              .  c         pwm1       pwm1m0-ch0                               .  d      pwm1m0-ch1                               .  e      pwm1m0-ch2                               .  f      pwm1m0-ch3                               .  g      pwm1m0-ch4                               .  h      pwm1m0-ch5                               .  i      pwm1m1-ch0                              .  j      pwm1m1-ch1                              .  k      pwm1m1-ch2                              .  l      pwm1m1-ch3                              .  m      pwm1m1-ch4                              .  n      pwm1m1-ch5                              .  o      pwm1m2-ch0                              .  p      pwm1m2-ch1                              .  q      pwm1m2-ch2                              .  r      pwm1m2-ch3                              .  s      pwm1m2-ch4                              .  t      pwm1m2-ch5                              .  u      pwm1m3-ch0                              .  v      pwm1m3-ch1                              .  w      pwm1m3-ch2                              .  x      pwm1m3-ch3                	              .  y      pwm1m3-ch4                              .  z      pwm1m3-ch5                              .  {         pwm2       pwm2m0-ch0                               .  |      pwm2m0-ch1                              .  }      pwm2m0-ch2                               .  ~      pwm2m0-ch3                              .        pwm2m0-ch4                              .        pwm2m0-ch5                              .        pwm2m0-ch6                              .        pwm2m0-ch7                              .        pwm2m1-ch0                              .        pwm2m1-ch1                              .        pwm2m1-ch2                              .        pwm2m1-ch3                              .        pwm2m1-ch4                              .        pwm2m1-ch5                              .        pwm2m1-ch6                              .        pwm2m1-ch7                	              .        pwm2m2-ch0                              .        pwm2m2-ch1                              .        pwm2m2-ch2                              .        pwm2m2-ch3                              .        pwm2m2-ch4                              .        pwm2m2-ch5                              .        pwm2m2-ch6                              .        pwm2m2-ch7                              .        pwm2m3-ch0                              .        pwm2m3-ch1                              .        pwm2m3-ch2                              .        pwm2m3-ch3                              .        pwm2m3-ch4                              .        pwm2m3-ch5                              .        pwm2m3-ch6                              .        pwm2m3-ch7                              .           ref_clk0       ref_clk0-clk0                                 .           ref_clk1       ref_clk1-clk1                                .           ref_clk2       ref_clk2-clk2                                .           sai0       sai0m0-lrck                             .         sai0m0-mclk                             .        sai0m0-sclk                             .         sai0m0-sdi0                             .         sai0m0-sdi1               	              .         sai0m0-sdi2               
              .         sai0m0-sdi3                             .         sai0m0-sdo0                             .         sai0m0-sdo1                             .         sai0m0-sdo2                             .         sai0m0-sdo3                             .         sai0m1-lrck                              .        sai0m1-mclk                              .        sai0m1-sclk                              .        sai0m1-sdi0                              .        sai0m1-sdi1                              .        sai0m1-sdi2                              .        sai0m1-sdi3                              .        sai0m1-sdo0                              .        sai0m1-sdo1                              .        sai0m1-sdo2                              .        sai0m1-sdo3                              .        sai0m2-lrck                             .        sai0m2-mclk                             .        sai0m2-sclk                              .        sai0m2-sdi0               
              .        sai0m2-sdi1               	              .        sai0m2-sdi2                             .        sai0m2-sdi3                             .        sai0m2-sdo0                             .        sai0m2-sdo1                             .        sai0m2-sdo2                             .        sai0m2-sdo3               	              .           sai1       sai1m0-lrck                             .         sai1m0-mclk                             .         sai1m0-sclk                             .         sai1m0-sdi0                             .         sai1m0-sdi1               
              .        sai1m0-sdi2               	              .        sai1m0-sdi3                             .        sai1m0-sdo0                             .         sai1m0-sdo1                             .        sai1m0-sdo2               	              .        sai1m0-sdo3               
              .        sai1m1-lrck                             .        sai1m1-mclk                             .        sai1m1-sclk                             .        sai1m1-sdi0                             .        sai1m1-sdi1                             .        sai1m1-sdi2                             .        sai1m1-sdi3                             .        sai1m1-sdo0                             .        sai1m1-sdo1                             .        sai1m1-sdo2                             .        sai1m1-sdo3                             .           sai2       sai2m0-lrck                             .         sai2m0-mclk                             .        sai2m0-sclk                             .         sai2m0-sdi                              .         sai2m0-sdo                              .         sai2m1-lrck                             .        sai2m1-mclk                             .        sai2m1-sclk                             .        sai2m1-sdi                              .        sai2m1-sdo                              .        sai2m2-lrck                             .        sai2m2-mclk                             .        sai2m2-sclk                             .        sai2m2-sdi                              .        sai2m2-sdo                              .           sai3       sai3m0-lrck                             .         sai3m0-mclk                             .        sai3m0-sclk                             .         sai3m0-sdi                              .         sai3m0-sdo                
              .         sai3m1-lrck                             .        sai3m1-mclk                             .        sai3m1-sclk                             .        sai3m1-sdi                              .        sai3m1-sdo                              .        sai3m2-lrck                             .        sai3m2-mclk                             .        sai3m2-sclk                              .        sai3m2-sdi                              .        sai3m2-sdo                              .        sai3m3-lrck                             .        sai3m3-mclk                             .        sai3m3-sclk                             .        sai3m3-sdi                              .        sai3m3-sdo                              .           sai4       sai4m0-lrck                             .         sai4m0-mclk                             .        sai4m0-sclk                             .         sai4m0-sdi                              .         sai4m0-sdo                              .         sai4m1-lrck                              .        sai4m1-mclk                             .        sai4m1-sclk                             .        sai4m1-sdi                              .        sai4m1-sdo                              .        sai4m2-lrck                             .        sai4m2-mclk                             .        sai4m2-sclk                             .        sai4m2-sdi                              .        sai4m2-sdo                              .        sai4m3-lrck                             .        sai4m3-mclk                             .        sai4m3-sclk                             .        sai4m3-sdi                              .        sai4m3-sdo                              .           sata30     sata30-sata       0                                              .           sata30_port0       sata30_port0m0-port0                                .        sata30_port0m1-port0                     
           .           sata30_port1       sata30_port1m0-port1                                .        sata30_port1m1-port1                     
           .           sdmmc0     sdmmc0-bus4       @                                                           .         sdmmc0-clk                              .         sdmmc0-cmd                              .         sdmmc0-det                               .         sdmmc0-pwren                                 .            sdmmc1     sdmmc1m0-bus4         @                                                          .         sdmmc1m0-clk                                .         sdmmc1m0-cmd                                .         sdmmc1m0-det                                .        sdmmc1m0-pwren                              .        sdmmc1m1-bus4         @                                            	              .        sdmmc1m1-clk                                .        sdmmc1m1-cmd                  
              .        sdmmc1m1-det                                .        sdmmc1m1-pwren                              .        sdmmc1m2-det                                 .           sdmmc0_testclk     sdmmc0_testclk-test                             .           sdmmc0_testdata    sdmmc0_testdata-test                                .            sdmmc1_testclk     sdmmc1_testclkm0-test                               .           sdmmc1_testdata    sdmmc1_testdatam0-test                              .           spdif      spdifm0-rx0                             .        spdifm0-rx1                             .        spdifm0-tx0                             .        spdifm0-tx1                             .        spdifm1-rx0                              .        spdifm1-rx1                             .        spdifm1-tx0                             .  	      spdifm1-tx1                             .  
      spdifm2-rx0                             .        spdifm2-rx1                             .        spdifm2-tx0                             .        spdifm2-tx1                             .           spi0       spi0m0-pins       0                                                 .         spi0m0-csn0                              .         spi0m0-csn1                              .         spi0m1-pins       0                                               .        spi0m1-csn0                             .        spi0m1-csn1                             .        spi0m2-pins       0           	            	            	           .        spi0m2-csn0                  	           .        spi0m2-csn1               
   	           .           spi1       spi1m0-pins       0                                              .         spi1m0-csn0                             .         spi1m0-csn1                             .         spi1m1-pins       0           
            
            
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           .        spi1m1-csn1                  
           .        spi1m2-pins       0           
            
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           .        spi1m2-csn1                   
           .           spi2       spi2m0-pins       0         
   	          	   	             	           .         spi2m0-csn0                   	           .         spi2m0-csn1                   	           .         spi2m1-pins       0                                              .        spi2m1-csn0                             .        spi2m1-csn1                             .        spi2m2-pins       0           
            
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           .        spi2m2-csn1                  
           .            spi3       spi3m0-pins       0            
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           .  #      spi3m2-pins       0           	            	            	           .  $      spi3m2-csn0                  	           .  %      spi3m2-csn1                  
           .  &         spi4       spi4m0-pins       0                                              .         spi4m0-csn0                             .         spi4m0-csn1                             .         spi4m1-pins       0           
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           .  (      spi4m1-csn1                  
           .  )      spi4m2-pins       0           	         
   	         	   	           .  *      spi4m2-csn0                  	           .  +      spi4m2-csn1                  	           .  ,      spi4m3-pins       0           
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   
           .  .      spi4m3-csn1                  
           .  /         test_clk       test_clk-pins                               .  0         tsadc      tsadcm0-pins                      	           .  1      tsadcm1-pins                      
           .  2         tsadc_ctrl     tsadc_ctrl-pins                   
           .  3         uart0      uart0m0-xfer                       	             	           .         uart0m1-xfer                       	            	           .  4         uart1      uart1m0-xfer                       
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           .   3      uart1m0-ctsn                                 .  5      uart1m0-rtsn                                 .  6      uart1m1-xfer                   	   	            	           .  7      uart1m1-ctsn                  
   	           .  8      uart1m1-rtsn                     	           .  9      uart1m2-xfer                      	            	           .  :      uart1m2-ctsn                     	           .  ;      uart1m2-rtsn                     	           .  <         uart2      uart2m0-xfer                      	            	           .         uart2m0-ctsn                     
           .  =      uart2m0-rtsn                     
           .  >      uart2m1-xfer                      
            
           .  ?      uart2m1-ctsn                  	              .  @      uart2m1-rtsn                                .  A      uart2m2-xfer                      	            	           .  B      uart2m2-ctsn                     	           .  C      uart2m2-rtsn                     	           .  D         uart3      uart3m0-xfer                      	             	           .         uart3m0-ctsn                     	           .  E      uart3m0-rtsn                     	           .  F      uart3m1-xfer                      	             	           .  G      uart3m1-ctsn                     
           .  H      uart3m1-rtsn                     
           .  I      uart3m2-xfer                      	            	           .  J      uart3m2-ctsn                     	           .  K      uart3m2-rtsn                     	           .  L         uart4      uart4m0-xfer                      	            	           .  M      uart4m0-ctsn                     	           .  N      uart4m0-rtsn                     	           .  O      uart4m1-xfer                      	            	           .         uart4m1-ctsn                     	           .         uart4m1-rtsn                     	           .         uart4m2-xfer                       
             
           .  P         uart5      uart5m0-xfer                      	            	           .         uart5m0-ctsn                     	           .  Q      uart5m0-rtsn                     	           .  R      uart5m1-xfer                   	   
            
           .  S      uart5m1-ctsn                     
           .  T      uart5m1-rtsn                     
           .  U      uart5m2-xfer                      	            	           .  V      uart5m2-ctsn                     
           .  W      uart5m2-rtsn                     
           .  X         uart6      uart6m0-xfer                      
            
           .         uart6m0-ctsn                  	              .  Y      uart6m0-rtsn                                .  Z      uart6m1-xfer                      	            	           .  [      uart6m1-ctsn                     	           .  \      uart6m1-rtsn                     	           .  ]      uart6m2-xfer                      	            	           .  ^      uart6m2-ctsn                     
           .  _      uart6m2-rtsn                     
           .  `      uart6m3-xfer                                             .  a         uart7      uart7m0-xfer                      	            	           .         uart7m0-ctsn                     	           .  b      uart7m0-rtsn                     	           .  c      uart7m1-xfer                      	            	           .  d      uart7m1-ctsn                     	           .  e      uart7m1-rtsn                      	           .  f      uart7m2-xfer                       
            
           .  g         uart8      uart8m0-xfer                      	            	           .         uart8m0-ctsn                     	           .  h      uart8m0-rtsn                     	           .  i      uart8m1-xfer                      	            	           .  j      uart8m1-ctsn                     
           .  k      uart8m1-rtsn                     
           .  l      uart8m2-xfer                       
             
           .  m         uart9      uart9m0-xfer                      	            	           .         uart9m0-ctsn                     	           .  n      uart9m0-rtsn                     	           .  o      uart9m1-xfer                   
   	            	           .  p      uart9m1-ctsn                     	           .  q      uart9m1-rtsn                     	           .  r      uart9m2-xfer                                             .  s         uart10     uart10m0-xfer                     	         	   	           .         uart10m0-ctsn                    
           .  t      uart10m0-rtsn                    
           .  u      uart10m1-xfer                     	            	           .  v      uart10m1-ctsn                    	           .  w      uart10m1-rtsn                    	           .  x      uart10m2-xfer                      
             
           .  y         uart11     uart11m0-xfer                     	            	           .         uart11m0-ctsn                    	           .  z      uart11m0-rtsn                    	           .  {      uart11m1-xfer                     	            	           .  |      uart11m1-ctsn                    	           .  }      uart11m1-rtsn                    	           .  ~      uart11m2-xfer                                            .           ufs    ufs-refclk                              .         ufs-rst                             .        ufs-rstgpio                              .            ufs_testdata0      ufs_testdata0-test                              .           ufs_testdata1      ufs_testdata1-test                              .           ufs_testdata2      ufs_testdata2-test                              .           ufs_testdata3      ufs_testdata3-test                              .           vi_cif     vi_cif-pins      @                                                                                                                                                                    
            	                                                                           .           vo_lcdc    vo_lcdc-pins                                                                                                                                                                                                                                         
            	                                                                                                              .           vo_post    vo_post-pins                                .           vp0_sync       vp0_sync-pins                               .           vp1_sync       vp1_sync-pins                               .           vp2_sync       vp2_sync-pins                               .           pmic       pmic-pins                      	             	           .            vo     bt1120-pins                                                                                                                                                                                                                            .        bt656-pins                                                                                                                              .        rgb3x8-pins-m0                                                                                                                                                                  .        rgb3x8-pins-m1                                                                                                                                                                  .        rgb565-pins      @                                                                                                                                                                                                                                                          .        rgb666-pins      `                                                                                                                                                                    	                                                                                                              .        rgb888-pins                                                                                                                                                                                                                                      
            	                                                                                                              .           vo_ebc     vo_ebc-pins      p                                                                                                                                                                                                                                                                                              .        vo_ebc-extern         P        
            	                                                  .           gmac       gmac0-rst                                .   u      gmac1-rst                                .            headphone      hp-det-l                                 .           hym8563    hym8563-int                                .            leds       led-red-en                	               .        led-green-en                  
               .           pcie       pcie-pwr-en                              .         pcie-reset                               .   &         usb    usb-host-pwren                               .         usb-otg0-pwren                               .         usbc0-interrupt                               .         usbc0-sbu1                               .         usbc0-sbu2                               .            wireless-bluetooth     bt-reg-on                                .        host-wake-bt                                 .        bt-wake-host                   	               .           wireless-wlan      wifi-wake-host                                .        wifi-reg-on                              .              pmu-a53           arm,cortex-a53-pmu        0                                                                       .        pmu-a72           arm,cortex-a72-pmu        0                                                              	        .        psci              arm,psci-1.0            Qsmc       thermal-zones           .     package-thermal                                                .     trips      package-crit             8                  	  Acritical            .              bigcore-thermal            d                                  .     trips      bigcore-alert            L                  Apassive         .         bigcore-crit             8                  	  Acritical            .           cooling-maps       map0                     0  "            	            littlecore-thermal             d                                  .     trips      littlecore-alert             L                  Apassive         .          littlecore-crit          8                  	  Acritical            .           cooling-maps       map0                      0  "                        gpu-thermal            d                                  .     trips      gpu-alert            L                  Apassive         .   !      gpu-crit             8                  	  Acritical            .           cooling-maps       map0               !        "   "            npu-thermal                                               .     trips      npu-crit             8                  	  Acritical            .              ddr-thermal                                               .     trips      ddr-crit             8                  	  Acritical            .                 timer             arm,armv8-timer       0                                   
         soc           simple-bus                       +               pcie@22000000         *    rockchip,rk3576-pcie rockchip,rk3568-pcie         0  F    "        @      *                                 1dbi apb config          ;             (  k                                $  Eaclk_mst aclk_slv aclk_dbi pclk aux         :pci          Q      H                                                                ^sys pmc msg legacy err msi          <           n                     `                    #                      #                     #                     #                                                                                 $         	  pcie-phy               %         T                                                          	       	                                     	  pwr pipe                         +           okay            default         "   &        ,   '               8   (        .     legacy-interrupt-controller                               <                                        .   #         pcie@22400000         *    rockchip,rk3576-pcie rockchip,rk3568-pcie         0  F    "@       @      *!             !                  1dbi apb config          ;       /      (  k                               $  Eaclk_mst aclk_slv aclk_dbi pclk aux         :pci          Q      H                          	         
                             ^sys pmc msg legacy err msi          <           n                     `                    )                      )                     )                     )                                                                                *         	  pcie-phy               %   	      T         !      !                !       !                	      	                                    	  pwr pipe                         +         	  disabled            .     legacy-interrupt-controller                               <                             
           .   )         usb@23000000              rockchip,rk3576-dwc3 snps,dwc3          F    #        @          k     E     F     D        Eref_clk suspend_clk bus_clk                             %                        Hotg            +   ,           usb2-phy usb3-phy         
  Putmi_wide            Y         q                                                      $        okay             C        .     ports                        +       port@0          F       endpoint            S   -        .            port@1          F      endpoint            S   .        .                  usb@23400000              rockchip,rk3576-dwc3 snps,dwc3          F    #@       @          k                       Eref_clk suspend_clk bus_clk                             %                         Hhost               /   *           usb2-phy usb3-phy         
  Putmi_wide            Y         q                                             c                  $         Q        okay            .        syscon@2600a000           rockchip,rk3576-sys-grf syscon          F    &                  .   _      syscon@2600c000       #    rockchip,rk3576-bigcore-grf syscon          F    &                  .        syscon@2600e000       #    rockchip,rk3576-litcore-grf syscon          F    &                  .        syscon@26010000           rockchip,rk3576-cci-grf syscon          F    &                  .        syscon@26016000           rockchip,rk3576-gpu-grf syscon          F    &`                 .        syscon@26018000           rockchip,rk3576-npu-grf syscon          F    &                 .        syscon@2601a000           rockchip,rk3576-vo0-grf syscon          F    &                 .   d      syscon@2601e000           rockchip,rk3576-usb-grf syscon          F    &                .         syscon@26020000           rockchip,rk3576-php-grf syscon          F    &                  .         syscon@26024000       +    rockchip,rk3576-pmu0-grf syscon simple-mfd          F    &@                .        syscon@26026000            rockchip,rk3576-pmu1-grf syscon         F    &`                .        syscon@26028000       $    rockchip,rk3576-pipe-phy-grf syscon         F    &                 .         syscon@2602a000       $    rockchip,rk3576-pipe-phy-grf syscon         F    &                 .         syscon@2602c000       $    rockchip,rk3576-usbdpphy-grf syscon         F    &                 .         syscon@2602e000       .    rockchip,rk3576-usb2phy-grf syscon simple-mfd           F    &       @                      +           .      usb2-phy@0            rockchip,rk3576-usb2phy         F                                 phy apb         k          G     H        Ephyclk aclk aclk_slv            usb480m_phy0            !            okay            .      otg-port            }          $        ^         _         `           ^otg-bvalid otg-id linestate         okay            .   +         usb2-phy@2000             rockchip,rk3576-usb2phy         F                                 phy apb         k          
             Ephyclk aclk aclk_slv            usb480m_phy1            !            okay            .     otg-port            }          $        b         c         d           ^otg-bvalid otg-id linestate         okay               0        .   /            syscon@26032000       $    rockchip,rk3576-hdptxphy-grf syscon         F    &                 .         syscon@26034000       !    rockchip,rk3576-dcphy-grf syscon            F    &@                 k             .         syscon@26036000           rockchip,rk3576-vo1-grf syscon          F    &`                k             .         syscon@26038000       "    rockchip,rk3576-sdgmac-grf syscon           F    &                .   k      syscon@26040000       *    rockchip,rk3576-ioc-grf syscon simple-mfd           F    &                 .         clock-controller@27200000             rockchip,rk3576-cru         F    '                  !                    p                                                                         
                                8      Fq ; .  @       e 沀 e 沀        .         i2c@27300000          (    rockchip,rk3576-i2c rockchip,rk3399-i2c         F    '0                 k                	  Ei2c pclk                   X           default         "   1                     +          	  disabled            .        serial@27310000       &    rockchip,rk3576-uart snps,dw-apb-uart           F    '1                                       k                  Ebaudclk apb_pclk               2      2   	               M           default         "   3      	  disabled            .        power-management@27380000         &    rockchip,rk3576-pmu syscon simple-mfd           F    '8                 .   `   power-controller          !    rockchip,rk3576-power-controller                                    +            .   %   power-domain@0          F                                    +       power-domain@1          F         @  k                                                           4   5   6   7   8                                +       power-domain@2          F           k                       9                  power-domain@3          F           k                       :                        power-domain@4          F           k                     ;                  power-domain@5          F           k                       <   =                                +       power-domain@6          F         H  k     3               "     (     0     #     )                >   ?   @   A   B   C                     power-domain@8          F            k                      
           D   E                                +       power-domain@9          F   	                     power-domain@10         F   
                  power-domain@12         F           k                     F                  power-domain@13         F         P  k     \     [     R     S     P     O     X     W     U     T           G   H   I   J   K                  power-domain@14         F           k     =     >           L                  power-domain@15         F         `  k     g     h     f     c     d     e     i     l     m     p     n     o           M   N   O   P   Q                                +       power-domain@11         F           k     a     `           R                     power-domain@18         F            k                               S   T                                +       power-domain@7          F         (  k           B     G     H     I           U   V                  power-domain@16         F         (  k                                    W                  power-domain@17         F         (  k                                    X                           gpu@27800000          &    rockchip,rk3576-mali arm,mali-bifrost           F    '                    
          =        k             Ecore              Y      $        [         \         ]           ^job mmu gpu         r   Y           %                      okay               Z        .   "      video-codec@27b00000              rockchip,rk3576-vdec          0  F    '            '             '                1function link cache               4         (  k     =     >          @     ?        Eaxi ahb cabac core hevc_cabac                 =     @          ?        #F #F e ;            [           %         (                                   axi ahb cabac core hevc_cabac           &   \        .        iommu@27b00800        ,    rockchip,rk3576-iommu rockchip,rk3568-iommu          F    '        @    '	        @              5           k     @     >        Eaclk iface             %            +        F            .   [      vop@27d00000              rockchip,rk3576-vop          F    '        0     'P                1vop gamma-lut         0        V         {         |         }           ^sys vp0 vp1 vp2       ,  k                            ]      2  Eaclk hclk dclk_vp0 dclk_vp1 dclk_vp2 pll_hdmiphy0              ^           %              _        S   `        okay            .     ports                        +            .      port@0                       +            F            .     endpoint@2          F           S   a        .   h         port@1                       +            F           .        port@2                       +            F           .              iommu@27d07e00        ,    rockchip,rk3576-iommu rockchip,rk3568-iommu          F    '~            '                      V           k                  Eaclk iface          F               %           okay            .   ^      sai@27d40000              rockchip,rk3576-sai         F    '                                   k                
  Emclk hclk              b           `rx             %                i     j        m h         j                                 SAI5          	  disabled            .        sai@27d50000              rockchip,rk3576-sai         F    '                                   k                
  Emclk hclk              b      b           `tx rx              %                k     l        m h         j                                                      SAI6            okay            .         dsi@27d80000              rockchip,rk3576-mipi-dsi2           F    '                       Y           k                	  Epclk sys               %                c        apb            c   
        dcphy              d      	  disabled            .     ports                        +       port@0          F            .        port@1          F           .              hdmi@27da0000             rockchip,rk3576-dw-hdmi-qp          F    '               0  k                                      Epclk earc ref aud hdp hclk_vo1        <        R         S         T         U         o           ^avp cec earc main hpd              ]        default         "   e   f   g           %                f             ref hdp                       d                    okay            .      ports                        +       port@0          F            .     endpoint            S   h        .   a         port@1          F           .     endpoint            S   i        .                  sai@27ed0000              rockchip,rk3576-sai         F    '                                   k                
  Emclk hclk              b           `tx             %                u     v        m h                                          SAI7          	  disabled            .        sai@27ee0000              rockchip,rk3576-sai         F    '                       t           k                
  Emclk hclk              j           `tx             %                r     q        m h                                          SAI8          	  disabled            .        sai@27ef0000              rockchip,rk3576-sai         F    '                       u           k                
  Emclk hclk              2           `tx             %                             m h                                          SAI9          	  disabled            .        qos@27f02000              rockchip,rk3576-qos syscon          F    '                  .   X      qos@27f04000              rockchip,rk3576-qos syscon          F    '@                 .   >      qos@27f04080              rockchip,rk3576-qos syscon          F    '@                .   ?      qos@27f04100              rockchip,rk3576-qos syscon          F    'A                 .   @      qos@27f04180              rockchip,rk3576-qos syscon          F    'A                .   A      qos@27f04200              rockchip,rk3576-qos syscon          F    'B                 .   B      qos@27f04280              rockchip,rk3576-qos syscon          F    'B                .   C      qos@27f05000              rockchip,rk3576-qos syscon          F    'P                 .   ;      qos@27f06000              rockchip,rk3576-qos syscon          F    '`                 .   F      qos@27f08000              rockchip,rk3576-qos syscon          F    '                 .   4      qos@27f08080              rockchip,rk3576-qos syscon          F    '                .   5      qos@27f08100              rockchip,rk3576-qos syscon          F    '                 .   6      qos@27f09000              rockchip,rk3576-qos syscon          F    '                 .   <      qos@27f09080              rockchip,rk3576-qos syscon          F    '                .   =      qos@27f0a000              rockchip,rk3576-qos syscon          F    '                 .   D      qos@27f0a080              rockchip,rk3576-qos syscon          F    '                .   E      qos@27f0c000              rockchip,rk3576-qos syscon          F    '                 .   L      qos@27f0d000              rockchip,rk3576-qos syscon          F    '                 .        qos@27f0e000              rockchip,rk3576-qos syscon          F    '                 .   U      qos@27f0e080              rockchip,rk3576-qos syscon          F    '                .   V      qos@27f0f000              rockchip,rk3576-qos syscon          F    '                 .   R      qos@27f10000              rockchip,rk3576-qos syscon          F    '                  .   M      qos@27f10080              rockchip,rk3576-qos syscon          F    '                 .   N      qos@27f10100              rockchip,rk3576-qos syscon          F    '                 .   O      qos@27f10180              rockchip,rk3576-qos syscon          F    '                .   P      qos@27f10200              rockchip,rk3576-qos syscon          F    '                 .   Q      qos@27f11000              rockchip,rk3576-qos syscon          F    '                 .   W      qos@27f12800              rockchip,rk3576-qos syscon          F    '(                 .   S      qos@27f12880              rockchip,rk3576-qos syscon          F    '(                .   T      qos@27f13000              rockchip,rk3576-qos syscon          F    '0                 .   G      qos@27f13080              rockchip,rk3576-qos syscon          F    '0                .   I      qos@27f13100              rockchip,rk3576-qos syscon          F    '1                 .   J      qos@27f13180              rockchip,rk3576-qos syscon          F    '1                .   H      qos@27f13200              rockchip,rk3576-qos syscon          F    '2                 .   K      qos@27f20000              rockchip,rk3576-qos syscon          F    '                  .   9      qos@27f21000              rockchip,rk3576-qos syscon          F    '                 .   :      qos@27f22080              rockchip,rk3576-qos syscon          F    '                 .   7      qos@27f22100              rockchip,rk3576-qos syscon          F    '!                 .   8      ethernet@2a220000         &    rockchip,rk3576-gmac snps,dwmac-4.20a           F    *"               (  k      $      .                %      0  Estmmaceth clk_mac_ref pclk_mac aclk_mac ptp_ref          Q              %         *           ^macirq eth_wake_irq            %                      
  stmmaceth              k                      l                    m           n         !        okay          	  *rgmii-id            3output          @   o        default         "   p   q   r   s   t        .     mdio              snps,dwmac-mdio                      +            .     phy@1             ethernet-phy-ieee802.3-c22          F           default         "   u        K  N         [         ,   '              .   o         stmmac-axi-config           m                                 w                      .   l      rx-queues-config                       .   m   queue0           tx-queues-config                       .   n   queue0              ethernet@2a230000         &    rockchip,rk3576-gmac snps,dwmac-4.20a           F    *#               (  k      %      /     !          $      0  Estmmaceth clk_mac_ref pclk_mac aclk_mac ptp_ref          Q              -         2           ^macirq eth_wake_irq            %                	      
  stmmaceth              k                      v                    w           x         !        okay          	  *rgmii-id            3output          @   y        default         "   z   {   |   }   ~        .     mdio              snps,dwmac-mdio                      +            .     phy@1             ethernet-phy-ieee802.3-c22          F           default         "           K  N         [         ,                 .   y         stmmac-axi-config           m                                 w                      .   v      rx-queues-config                       .   w   queue0           tx-queues-config                       .   x   queue0              sata@2a240000         '    rockchip,rk3576-dwc-ahci snps,dwc-ahci          F    *$                 k                       Esata pmalive rxoob                              %   	           $         	  sata-phy                        Q      	  disabled            .        sata@2a250000         '    rockchip,rk3576-dwc-ahci snps,dwc-ahci          F    *%                 k                       Esata pmalive rxoob                              %   	           *         	  sata-phy                        Q      	  disabled            .        ufshc@2a2d0000            rockchip,rk3576-ufshc         P  F    *-             +             &            &            *.               "  1hci mphy hci_grf mphy_grf hci_apb            k     I     C                  Ecore pclk pclk_mphy ref_out                           ;              i              %           "              default       (            !     "     $             biu sys ufs grf mphy            ,               	  disabled            .        spi@2a300000              rockchip,sfc            F    *0        @                           k     *     +        Eclk_sfc hclk_sfc               %                        +          	  disabled            .        mmc@2a310000              rockchip,rk3576-dw-mshc         F    *1        @         k     )     (        Ebiu ciu                                               default         "                          %                        reset           okay                                 	
         	         	&         	.         	5        	C           	O           .        mmc@2a320000              rockchip,rk3576-dw-mshc         F    *2        @         k     #     "        Ebiu ciu                                               "                 default            %                        reset           okay                        	\         	         	i        	            	         	.         	         	         	5        	C           	O            	        .        mmc@2a330000          0    rockchip,rk3576-dwcmshc rockchip,rk3588-dwcmshc         F    *3                                            n6        (  k                                      Ecore bus axi block timer                                       "                       default            %         (                                        core bus axi block timer             	        okay                        	         	         	         	&         	         	        .        spi@2a340000              rockchip,sfc            F    *4        @                           k                    Eclk_sfc hclk_sfc               %                        +          	  disabled            .        rng@2a410000              rockchip,rk3576-rng         F    *A                 k                                            .        otp@2a580000              rockchip,rk3576-otp         F    *X                              +           k                1        Eotp apb_pclk phy                              otp apb         .     cpu-code@2          F              .        cpu-version@5           F              
	              .        id@a            F   
           .        cpub-leakage@1e         F              .        cpul-leakage@1f         F              .        npu-leakage@20          F               .        gpu-leakage@21          F   !           .        log-leakage@22          F   "           .        bigcore-tsadc-trim@24           F   $           
	       
        .         litcore-tsadc-trim@26           F   &           
	       
        .         ddr-tsadc-trim@28           F   (           
	       
        .         npu-tsadc-trim@2a           F   *           
	       
        .         gpu-tsadc-trim@2c           F   ,           
	       
        .         soc-tsadc-trim@64           F   d           
	       
        .            sai@2a600000              rockchip,rk3576-sai         F    *`                                   k      @      A      
  Emclk hclk              2       2           `tx rx              %   
                            m h         default       (  "                                                  SAI0          	  disabled            .        sai@2a610000              rockchip,rk3576-sai         F    *a                                   k      G      H      
  Emclk hclk              2      2           `tx rx              %   
                            m h         default         "                                SAI1            okay            .         sai@2a620000              rockchip,rk3576-sai         F    *b                                   k      J      K      
  Emclk hclk              j       j           `tx rx              %   
                            m h         default         "                                SAI2          	  disabled            .        sai@2a630000              rockchip,rk3576-sai         F    *c                                   k      M      N      
  Emclk hclk              j      j           `tx rx              %   
                            m h         default         "                                SAI3          	  disabled            .        sai@2a640000              rockchip,rk3576-sai         F    *d                                   k      P      Q      
  Emclk hclk              b       b           `tx rx              %   
                            m h         default         "                                SAI4          	  disabled            .        interrupt-controller@2a701000             arm,gic-400       @  F    *p            *p             *p@            *p`                      	                   <                        +           .         dma-controller@2ab90000           arm,pl330 arm,primecell         F    *        @          
        k            	  Eapb_pclk                              !           
%           .   2      dma-controller@2abb0000           arm,pl330 arm,primecell         F    *        @          
        k            	  Eapb_pclk                   "          #           
%           .   j      dma-controller@2abd0000           arm,pl330 arm,primecell         F    *        @          
        k            	  Eapb_pclk                   $          %           
%           .   b      i2c@2ac40000          (    rockchip,rk3576-i2c rockchip,rk3399-i2c         F    *                 k      t      h      	  Ei2c pclk                   Y           default         "                        +            okay            .     pmic@23           rockchip,rk806          F   #                                  default         "                     
0        
H           
T           
`           
l           
x           
           
           
           
           
           
           
           
           
           
                    0      dvs1-null-pins          gpio_pwrctrl1         	  pin_fun0            .         dvs2-null-pins          gpio_pwrctrl2         	  pin_fun0            .         dvs3-null-pins          gpio_pwrctrl3         	  pin_fun0            .         dvs1-slp-pins           gpio_pwrctrl1         	  pin_fun1            .        dvs1-pwrdn-pins         gpio_pwrctrl1         	  pin_fun2            .        dvs1-rst-pins           gpio_pwrctrl1         	  pin_fun3            .        dvs2-slp-pins           gpio_pwrctrl2         	  pin_fun1            .        dvs2-pwrdn-pins         gpio_pwrctrl2         	  pin_fun2            .        dvs2-rst-pins           gpio_pwrctrl2         	  pin_fun3            .        dvs2-dvs-pins           gpio_pwrctrl2         	  pin_fun4            .        dvs2-gpio-pins          gpio_pwrctrl2         	  pin_fun5            .        dvs3-slp-pins           gpio_pwrctrl3         	  pin_fun1            .        dvs3-pwrdn-pins         gpio_pwrctrl3         	  pin_fun2            .        dvs3-rst-pins           gpio_pwrctrl3         	  pin_fun3            .        dvs3-dvs-pins           gpio_pwrctrl3         	  pin_fun4            .        dvs3-gpio-pins          gpio_pwrctrl3         	  pin_fun5            .        regulators     dcdc-reg1            
                 0 dp        H ~        `  0        uvdd_cpu_big_s0                    .      regulator-state-mem                   dcdc-reg2                    0 dp        H ~        `  0        uvdd_npu_s0                    .     regulator-state-mem                   dcdc-reg3            
                 0 dp        H ~        `  0        uvdd_cpu_lit_s0          .      regulator-state-mem                   q         dcdc-reg4            
                 0 2Z        H 2Z        uvcc_3v3_s3          .      regulator-state-mem                   2Z         dcdc-reg5                    0 dp        H         `  0        uvdd_gpu_s0                    .   Z   regulator-state-mem                   P         dcdc-reg6            
                 uvddq_ddr_s0         .     regulator-state-mem                   dcdc-reg7            
                 0 dp        H 5         uvdd_logic_s0            .     regulator-state-mem                   dcdc-reg8            
                 0 w@        H w@        uvcc_1v8_s3          .      regulator-state-mem                   w@         dcdc-reg9            
                 uvdd2_ddr_s3         .     regulator-state-mem                   dcdc-reg10           
                 0 dp        H O        uvdd_ddr_s0          .     regulator-state-mem                   pldo-reg1            
                 0 w@        H w@        uvcca_1v8_s0         .      regulator-state-mem                   pldo-reg2            
                 0 w@        H w@        uvcca1v8_pldo2_s0            .     regulator-state-mem                   pldo-reg3            
                 0 O        H O        uvdda_1v2_s0         .     regulator-state-mem                   pldo-reg4            
                 0 2Z        H 2Z        uvcca_3v3_s0         .      regulator-state-mem                   pldo-reg5            
                 0 w@        H 2Z        uvccio_sd_s0         .      regulator-state-mem                   pldo-reg6            
                 0 w@        H w@        uvcca1v8_pldo6_s3            .     regulator-state-mem                   w@         nldo-reg1            
                 0 q        H q        uvdd_0v75_s3         .     regulator-state-mem                   q         nldo-reg2            
                 0 P        H P        uvdda_ddr_pll_s0         .     regulator-state-mem                   nldo-reg3            
                 0 |        H |        uvdda0v75_hdmi_s0            .     regulator-state-mem                   nldo-reg4            
                 0 P        H P        uvdda_0v85_s0            .     regulator-state-mem                   nldo-reg5            
                 0 q        H q        uvdda_0v75_s0            .     regulator-state-mem                            i2c@2ac50000          (    rockchip,rk3576-i2c rockchip,rk3399-i2c         F    *                 k      u      i      	  Ei2c pclk                   Z           default         "                        +            okay            .     typec-portc@22            fcs,fusb302         F   "                                  default         "                      .     connector             usb-c-connector         USB-C           dual            	         source              altmodes       displayport         ,          1         ports                        +       port@0          F       endpoint            S           .   -         port@1          F      endpoint            S           .   .         port@2          F      endpoint            S           .                     rtc@51            haoyu,hym8563           F   Q        hym8563                                    default         "            	        !            .           i2c@2ac60000          (    rockchip,rk3576-i2c rockchip,rk3399-i2c         F    *                 k      v      j      	  Ei2c pclk                   [           default         "                        +            okay            .     audio-codec@10            everest,es8388 everest,es8328           F           k     <        5           A           M           N                <                              default         "           .            i2c@2ac70000          (    rockchip,rk3576-i2c rockchip,rk3399-i2c         F    *                 k      w      k      	  Ei2c pclk                   \           default         "                        +          	  disabled            .        i2c@2ac80000          (    rockchip,rk3576-i2c rockchip,rk3399-i2c         F    *                 k      x      l      	  Ei2c pclk                   ]           default         "                        +          	  disabled            .         i2c@2ac90000          (    rockchip,rk3576-i2c rockchip,rk3399-i2c         F    *                 k      y      m      	  Ei2c pclk                   ^           default         "                        +          	  disabled            .        i2c@2aca0000          (    rockchip,rk3576-i2c rockchip,rk3399-i2c         F    *                 k      z      n      	  Ei2c pclk                   _           default         "                        +          	  disabled            .        i2c@2acb0000          (    rockchip,rk3576-i2c rockchip,rk3399-i2c         F    *                 k      {      o      	  Ei2c pclk                   `           default         "                        +          	  disabled            .        timer@2acc0000        ,    rockchip,rk3576-timer rockchip,rk3288-timer         F    *                  k                    Epclk timer                 -           .        watchdog@2ace0000              rockchip,rk3576-wdt snps,dw-wdt         F    *                 k                  
  Etclk pclk                  (           .        spi@2acf0000          (    rockchip,rk3576-spi rockchip,rk3066-spi         F    *                 k                    Espiclk apb_pclk            2      2           `tx rx                  t           Z           default         "                              +          	  disabled            .        spi@2ad00000          (    rockchip,rk3576-spi rockchip,rk3066-spi         F    *                 k                    Espiclk apb_pclk            2      2           `tx rx                  u           Z           default         "                              +          	  disabled            .        spi@2ad10000          (    rockchip,rk3576-spi rockchip,rk3066-spi         F    *                 k                    Espiclk apb_pclk            j      j           `tx rx                  v           Z           default         "                              +          	  disabled            .        spi@2ad20000          (    rockchip,rk3576-spi rockchip,rk3066-spi         F    *                 k                    Espiclk apb_pclk            j      j           `tx rx                  w           Z           default         "                              +          	  disabled            .  	      spi@2ad30000          (    rockchip,rk3576-spi rockchip,rk3066-spi         F    *                 k                    Espiclk apb_pclk            b      b           `tx rx                  x           Z           default         "                              +          	  disabled            .  
      serial@2ad40000       &    rockchip,rk3576-uart snps,dw-apb-uart           F    *                                       k                    Ebaudclk apb_pclk               2      2           `tx rx                  L           "           default         okay            .        serial@2ad50000       &    rockchip,rk3576-uart snps,dw-apb-uart           F    *                                       k                    Ebaudclk apb_pclk               2   
   2           `tx rx                  N           default         "         	  disabled            .        serial@2ad60000       &    rockchip,rk3576-uart snps,dw-apb-uart           F    *                                       k                    Ebaudclk apb_pclk               2      2           `tx rx                  O           "           default       	  disabled            .        serial@2ad70000       &    rockchip,rk3576-uart snps,dw-apb-uart           F    *                                       k                    Ebaudclk apb_pclk               j   	   j   
        `tx rx                  P           "                 default       	  disabled             a        .        serial@2ad80000       &    rockchip,rk3576-uart snps,dw-apb-uart           F    *                                       k                    Ebaudclk apb_pclk               j      j           `tx rx                  Q           "           default       	  disabled            .        serial@2ad90000       &    rockchip,rk3576-uart snps,dw-apb-uart           F    *                                       k                    Ebaudclk apb_pclk               j      j           `tx rx                  R           "           default       	  disabled            .        serial@2ada0000       &    rockchip,rk3576-uart snps,dw-apb-uart           F    *                                       k                    Ebaudclk apb_pclk               b      b           `tx rx                  S           "           default       	  disabled            .        serial@2adb0000       &    rockchip,rk3576-uart snps,dw-apb-uart           F    *                                       k                    Ebaudclk apb_pclk               b      b   	        `tx rx                  T           "           default       	  disabled            .        serial@2adc0000       &    rockchip,rk3576-uart snps,dw-apb-uart           F    *                                       k                    Ebaudclk apb_pclk               b   
   b           `tx rx                  U           "           default       	  disabled            .        adc@2ae00000          .    rockchip,rk3576-saradc rockchip,rk3588-saradc           F    *                 k      ~      }        Esaradc apb_pclk                |                 H        saradc-apb          q           okay                       .        tsadc@2ae70000            rockchip,rk3576-tsadc           F    *                        {           k                    Etsadc apb_pclk                                       J      K        tsadc-apb tsadc                                                                  +            .      sensor@0            F                       trim          sensor@1            F                      trim          sensor@2            F                      trim          sensor@3            F                      trim          sensor@4            F                      trim          sensor@5            F                      trim             i2c@2ae80000          (    rockchip,rk3576-i2c rockchip,rk3399-i2c         F    *                 k      |      p      	  Ei2c pclk                   a           default         "                        +          	  disabled            .        serial@2afc0000       &    rockchip,rk3576-uart snps,dw-apb-uart           F    *                                       k                    Ebaudclk apb_pclk               b      b                  V           default         "         	  disabled            .        serial@2afd0000       &    rockchip,rk3576-uart snps,dw-apb-uart           F    *                                       k                    Ebaudclk apb_pclk               b      b                  W           default         "         	  disabled            .        phy@2b020000              rockchip,rk3576-mipi-dcphy          F    +                 k                	  Epclk ref                                         m_phy apb grf s_phy                    }         	  disabled            .   c      phy@2b050000              rockchip,rk3576-naneng-combphy          F    +                 }           k     9     5              Eref apb pipe                 9                                   phy apb                               okay            .   $      phy@2b060000              rockchip,rk3576-naneng-combphy          F    +                 }           k     :     6             Eref apb pipe                 :                                   phy apb                               okay            .   *      phy@2b010000              rockchip,rk3576-usbdp-phy           F    +                 }           k                          Erefclk immortal pclk utmi         (                                   init cmn lane pcs_apb pma_apb           3           F           W                      okay             m         y        default         "                 '                  '               .   ,   port       endpoint            S           .               hdmiphy@2b000000          4    rockchip,rk3576-hdptx-phy rockchip,rk3588-hdptx-phy         F    +                   k          !        Eref apb         !                                         apb init cmn lane                      }            okay            .   ]      sram@3ff88000         
    mmio-sram           F    ?                       ?                        +           .     rkvdec-sram@0           F                       .   \         scmi-shmem@4010f000           arm,scmi-shmem          F    @                .            chosen          serial0:1500000n8         hdmi-con              hdmi-connector          Aa      port       endpoint            S           .   i            leds          
    gpio-leds           .     green-led                    
  heartbeat           2      
          
  heartbeat           .        red-led                    status          2      	            default-on          .           es8388-sound              simple-audio-card           i2s                    On-board Analog ES8388        S  Microphone Headphone Mic Microphone Mic Pads Headphone Headphone Line Out Line Out        v  Headphone LOUT1 Headphone ROUT1 Line Out LOUT2 Line Out ROUT2 RINPUT1 Headphone Mic LINPUT2 Mic Pads RINPUT2 Mic Pads           	Headphone Line Out          .     simple-audio-card,cpu                    simple-audio-card,codec                    (           regulator-vcc-12v0-dcin           regulator-fixed         uvcc_12v0_dcin            
                 0          H          .         regulator-vcc-1v1-nldo-s3             regulator-fixed         uvcc_1v1_nldo_s3                   
        0         H         ?           .         regulator-vcc-1v2-ufs-vccq-s0             regulator-fixed         uvcc_1v2_ufs_vccq_s0                   
        0 O        H O        ?           .        regulator-vcc-1v8-s0              regulator-fixed         uvcc_1v8_s0                    
        0 w@        H w@        ?           .        regulator-vcc-1v8-ufs-vccq2-s0            regulator-fixed         uvcc_1v8_ufs_vccq2_s0                      
        0 w@        H w@        ?           .        regulator-vcc-2v0-pldo-s3             regulator-fixed         uvcc_2v0_pldo_s3                   
        0         H         ?           .         regulator-vcc-3v3-pcie            regulator-fixed         default         "           uvcc_3v3_pcie            0 2Z        H 2Z         J        ]                  b          ?           .   (      regulator-vcc-3v3-s0              regulator-fixed         uvcc_3v3_s0                    
        0 2Z        H 2Z        ?           .         regulator-vcc-5v0-sys             regulator-fixed         uvcc_5v0_sys          
                 0 LK@        H LK@        ?           .         regulator-vcc-5v0-device              regulator-fixed         uvcc_5v0_device           
                 0 LK@        H LK@        ?           .         regulator-vcc-5v0-typec0              regulator-fixed          J        2                  default         "           uvcc_5v0_typec0          0 LK@        H LK@        ?           .         regulator-vcc-5v0-usbhost             regulator-fixed          J        2                  default         "           uvcc_5v0_usbhost         0 LK@        H LK@        ?           .   0      regulator-vcc-ufs-s0              regulator-fixed         uvcc_3v3_ufs_s0                    
        0 2Z        H 2Z        ?           .         sdio-pwrseq           mmc-pwrseq-simple           k        
  Eext_clock           default         "          ,                .         __symbols__         s/clock-xin32k           z/clock-xin24m           /clock-spll         /cpus/cpu@0         /cpus/cpu@1         /cpus/cpu@2         /cpus/cpu@3         /cpus/cpu@100           /cpus/cpu@101           /cpus/cpu@102           /cpus/cpu@103           /cpus/idle-states/cpu-sleep         /opp-table-cluster0         /opp-table-cluster1         /opp-table-gpu          /display-subsystem          /firmware/scmi          /firmware/scmi/protocol@14          /hdmi-sound       	  '/pinctrl            //pinctrl/gpio@27320000          5/pinctrl/gpio@2ae10000          ;/pinctrl/gpio@2ae20000          A/pinctrl/gpio@2ae30000          G/pinctrl/gpio@2ae40000          M/pinctrl/pcfg-pull-up           Z/pinctrl/pcfg-pull-down         i/pinctrl/pcfg-pull-none       $  x/pinctrl/pcfg-pull-none-drv-level-0       $  /pinctrl/pcfg-pull-none-drv-level-1       $  /pinctrl/pcfg-pull-none-drv-level-2       $  /pinctrl/pcfg-pull-none-drv-level-3       $  /pinctrl/pcfg-pull-none-drv-level-4       $  /pinctrl/pcfg-pull-none-drv-level-5       $  /pinctrl/pcfg-pull-none-drv-level-6       $  5/pinctrl/pcfg-pull-none-drv-level-7       $  P/pinctrl/pcfg-pull-none-drv-level-8       $  k/pinctrl/pcfg-pull-none-drv-level-9       %  /pinctrl/pcfg-pull-none-drv-level-10          %  /pinctrl/pcfg-pull-none-drv-level-11          %  /pinctrl/pcfg-pull-none-drv-level-12          %  /pinctrl/pcfg-pull-none-drv-level-13          %  /pinctrl/pcfg-pull-none-drv-level-14          %  /pinctrl/pcfg-pull-none-drv-level-15          "  ./pinctrl/pcfg-pull-up-drv-level-0         "  G/pinctrl/pcfg-pull-up-drv-level-1         "  `/pinctrl/pcfg-pull-up-drv-level-2         "  y/pinctrl/pcfg-pull-up-drv-level-3         "  /pinctrl/pcfg-pull-up-drv-level-4         "  /pinctrl/pcfg-pull-up-drv-level-5         "  /pinctrl/pcfg-pull-up-drv-level-6         "  /pinctrl/pcfg-pull-up-drv-level-7         "  /pinctrl/pcfg-pull-up-drv-level-8         "  /pinctrl/pcfg-pull-up-drv-level-9         #  (/pinctrl/pcfg-pull-up-drv-level-10        #  B/pinctrl/pcfg-pull-up-drv-level-11        #  \/pinctrl/pcfg-pull-up-drv-level-12        #  v/pinctrl/pcfg-pull-up-drv-level-13        #  /pinctrl/pcfg-pull-up-drv-level-14        #  /pinctrl/pcfg-pull-up-drv-level-15        $  /pinctrl/pcfg-pull-down-drv-level-0       $  /pinctrl/pcfg-pull-down-drv-level-1       $  /pinctrl/pcfg-pull-down-drv-level-2       $  /pinctrl/pcfg-pull-down-drv-level-3       $  0/pinctrl/pcfg-pull-down-drv-level-4       $  K/pinctrl/pcfg-pull-down-drv-level-5       $  f/pinctrl/pcfg-pull-down-drv-level-6       $  /pinctrl/pcfg-pull-down-drv-level-7       $  /pinctrl/pcfg-pull-down-drv-level-8       $  /pinctrl/pcfg-pull-down-drv-level-9       %  /pinctrl/pcfg-pull-down-drv-level-10          %  /pinctrl/pcfg-pull-down-drv-level-11          %  
/pinctrl/pcfg-pull-down-drv-level-12          %  &/pinctrl/pcfg-pull-down-drv-level-13          %  B/pinctrl/pcfg-pull-down-drv-level-14          %  ^/pinctrl/pcfg-pull-down-drv-level-15            z/pinctrl/pcfg-pull-up-smt           /pinctrl/pcfg-pull-down-smt         /pinctrl/pcfg-pull-none-smt       (  /pinctrl/pcfg-pull-none-drv-level-0-smt       (  /pinctrl/pcfg-pull-none-drv-level-1-smt       (  /pinctrl/pcfg-pull-none-drv-level-2-smt       (  /pinctrl/pcfg-pull-none-drv-level-3-smt       (  -/pinctrl/pcfg-pull-none-drv-level-4-smt       (  L/pinctrl/pcfg-pull-none-drv-level-5-smt         k/pinctrl/pcfg-output-high           |/pinctrl/pcfg-output-low          $  /pinctrl/aupll_clk/aupll_clkm0-pins       $  /pinctrl/aupll_clk/aupll_clkm1-pins       $  /pinctrl/aupll_clk/aupll_clkm2-pins       "  /pinctrl/cam_clk0/cam_clk0m0-clk0         "  /pinctrl/cam_clk0/cam_clk0m1-clk0         "  /pinctrl/cam_clk1/cam_clk1m0-clk1         "  /pinctrl/cam_clk1/cam_clk1m1-clk1         "  /pinctrl/cam_clk2/cam_clk2m0-clk2         "  /pinctrl/cam_clk2/cam_clk2m1-clk2           /pinctrl/can0/can0m0-pins           +/pinctrl/can0/can0m1-pins           7/pinctrl/can0/can0m2-pins           C/pinctrl/can0/can0m3-pins           O/pinctrl/can1/can1m0-pins           [/pinctrl/can1/can1m1-pins           g/pinctrl/can1/can1m2-pins           s/pinctrl/can1/can1m3-pins            /pinctrl/clk0_32k/clk0_32k-pins          /pinctrl/clk1_32k/clk1_32k-pins         /pinctrl/clk_32k/clk_32k-pins           /pinctrl/cpubig/cpubig-pins         /pinctrl/cpulit/cpulit-pins       &  /pinctrl/debug0_test/debug0_test-pins         &  /pinctrl/debug1_test/debug1_test-pins         &  /pinctrl/debug2_test/debug2_test-pins         &  /pinctrl/debug3_test/debug3_test-pins         &  /pinctrl/debug4_test/debug4_test-pins         &  /pinctrl/debug5_test/debug5_test-pins         &  &/pinctrl/debug6_test/debug6_test-pins         &  7/pinctrl/debug7_test/debug7_test-pins           H/pinctrl/dp/dpm0-pins           R/pinctrl/dp/dpm1-pins           \/pinctrl/dsm_aud/dsm_audm0-ln           i/pinctrl/dsm_aud/dsm_audm0-lp           v/pinctrl/dsm_aud/dsm_audm0-rn           /pinctrl/dsm_aud/dsm_audm0-rp           /pinctrl/dsm_aud/dsm_audm1-ln           /pinctrl/dsm_aud/dsm_audm1-lp           /pinctrl/dsm_aud/dsm_audm1-rn           /pinctrl/dsm_aud/dsm_audm1-rp           /pinctrl/dsmc/dsmc-clkn         /pinctrl/dsmc/dsmc-clkp         /pinctrl/dsmc/dsmc-csn0         /pinctrl/dsmc/dsmc-csn1         /pinctrl/dsmc/dsmc-csn2         /pinctrl/dsmc/dsmc-csn3          /pinctrl/dsmc/dsmc-data0            /pinctrl/dsmc/dsmc-data1            /pinctrl/dsmc/dsmc-data2            !/pinctrl/dsmc/dsmc-data3            ,/pinctrl/dsmc/dsmc-data4            7/pinctrl/dsmc/dsmc-data5            B/pinctrl/dsmc/dsmc-data6            M/pinctrl/dsmc/dsmc-data7            X/pinctrl/dsmc/dsmc-data8            c/pinctrl/dsmc/dsmc-data9            n/pinctrl/dsmc/dsmc-data10           z/pinctrl/dsmc/dsmc-data11           /pinctrl/dsmc/dsmc-data12           /pinctrl/dsmc/dsmc-data13           /pinctrl/dsmc/dsmc-data14           /pinctrl/dsmc/dsmc-data15           /pinctrl/dsmc/dsmc-dqs0         /pinctrl/dsmc/dsmc-dqs1         /pinctrl/dsmc/dsmc-int0         /pinctrl/dsmc/dsmc-int1         /pinctrl/dsmc/dsmc-int2         /pinctrl/dsmc/dsmc-int3         /pinctrl/dsmc/dsmc-rdyn         /pinctrl/dsmc/dsmc-resetn         '  /pinctrl/dsmc_testclk/dsmc-testclk-out        )  /pinctrl/dsmc_testdata/dsmc-testdata-out            +/pinctrl/edp_tx/edp_txm0-pins           9/pinctrl/edp_tx/edp_txm1-pins           G/pinctrl/emmc/emmc-rstnout          T/pinctrl/emmc/emmc-bus8         ^/pinctrl/emmc/emmc-clk          g/pinctrl/emmc/emmc-cmd          p/pinctrl/emmc/emmc-strb       (  z/pinctrl/emmc_testclk/emmc_testclk-test       *  /pinctrl/emmc_testdata/emmc_testdata-test           /pinctrl/eth0/eth0m0-miim           /pinctrl/eth0/eth0m0-rx_bus2            /pinctrl/eth0/eth0m0-tx_bus2            /pinctrl/eth0/eth0m0-rgmii_clk          /pinctrl/eth0/eth0m0-rgmii_bus          /pinctrl/eth0/eth0m0-mclk           /pinctrl/eth0/eth0m0-ppsclk         /pinctrl/eth0/eth0m0-ppstrig            /pinctrl/eth0/eth0m1-miim            /pinctrl/eth0/eth0m1-rx_bus2            //pinctrl/eth0/eth0m1-tx_bus2            >/pinctrl/eth0/eth0m1-rgmii_clk          O/pinctrl/eth0/eth0m1-rgmii_bus          `/pinctrl/eth0/eth0m1-mclk           l/pinctrl/eth0/eth0m1-ppsclk         z/pinctrl/eth0/eth0m1-ppstrig            /pinctrl/eth1/eth1m0-miim           /pinctrl/eth1/eth1m0-rx_bus2            /pinctrl/eth1/eth1m0-tx_bus2            /pinctrl/eth1/eth1m0-rgmii_clk          /pinctrl/eth1/eth1m0-rgmii_bus          /pinctrl/eth1/eth1m0-mclk           /pinctrl/eth1/eth1m0-ppsclk         /pinctrl/eth1/eth1m0-ppstrig            /pinctrl/eth1/eth1m1-miim           
/pinctrl/eth1/eth1m1-rx_bus2            /pinctrl/eth1/eth1m1-tx_bus2            (/pinctrl/eth1/eth1m1-rgmii_clk          9/pinctrl/eth1/eth1m1-rgmii_bus          J/pinctrl/eth1/eth1m1-mclk           V/pinctrl/eth1/eth1m1-ppsclk         d/pinctrl/eth1/eth1m1-ppstrig          $  s/pinctrl/eth0_ptp/eth0m0-ptp-refclk       $  /pinctrl/eth0_ptp/eth0m1-ptp-refclk       .  /pinctrl/eth0_testrxclk/eth0_testrxclkm0-test         .  /pinctrl/eth0_testrxclk/eth0_testrxclkm1-test         *  /pinctrl/eth0_testrxd/eth0_testrxdm0-test         *  /pinctrl/eth0_testrxd/eth0_testrxdm1-test         $  /pinctrl/eth1_ptp/eth1m0-ptp-refclk       $  /pinctrl/eth1_ptp/eth1m1-ptp-refclk       .  /pinctrl/eth1_testrxclk/eth1_testrxclkm0-test         .  %/pinctrl/eth1_testrxclk/eth1_testrxclkm1-test         *  ;/pinctrl/eth1_testrxd/eth1_testrxdm0-test         *  O/pinctrl/eth1_testrxd/eth1_testrxdm1-test         )  c/pinctrl/eth_clk0_25m/ethm0-clk0-25m-out          )  v/pinctrl/eth_clk0_25m/ethm1-clk0-25m-out          )  /pinctrl/eth_clk1_25m/ethm0-clk1-25m-out          )  /pinctrl/eth_clk1_25m/ethm1-clk1-25m-out          !  /pinctrl/flexbus0/flexbus0m0-csn          !  /pinctrl/flexbus0/flexbus0m0-d13          !  /pinctrl/flexbus0/flexbus0m0-d14          !  /pinctrl/flexbus0/flexbus0m0-d15          !  /pinctrl/flexbus0/flexbus0m1-csn          !  /pinctrl/flexbus0/flexbus0m1-d13          !  	/pinctrl/flexbus0/flexbus0m1-d14          !  /pinctrl/flexbus0/flexbus0m1-d15          !  '/pinctrl/flexbus0/flexbus0m2-csn          !  6/pinctrl/flexbus0/flexbus0m3-csn          !  E/pinctrl/flexbus0/flexbus0m4-csn            T/pinctrl/flexbus0/flexbus0-clk          a/pinctrl/flexbus0/flexbus0-d10          n/pinctrl/flexbus0/flexbus0-d11          {/pinctrl/flexbus0/flexbus0-d12          /pinctrl/flexbus0/flexbus0-d0           /pinctrl/flexbus0/flexbus0-d1           /pinctrl/flexbus0/flexbus0-d2           /pinctrl/flexbus0/flexbus0-d3           /pinctrl/flexbus0/flexbus0-d4           /pinctrl/flexbus0/flexbus0-d5           /pinctrl/flexbus0/flexbus0-d6           /pinctrl/flexbus0/flexbus0-d7           /pinctrl/flexbus0/flexbus0-d8           /pinctrl/flexbus0/flexbus0-d9         !   /pinctrl/flexbus1/flexbus1m0-csn          !  /pinctrl/flexbus1/flexbus1m0-d12          !  /pinctrl/flexbus1/flexbus1m0-d13          !  -/pinctrl/flexbus1/flexbus1m0-d14          !  </pinctrl/flexbus1/flexbus1m0-d15          !  K/pinctrl/flexbus1/flexbus1m1-csn          !  Z/pinctrl/flexbus1/flexbus1m1-d12          !  i/pinctrl/flexbus1/flexbus1m1-d13          !  x/pinctrl/flexbus1/flexbus1m1-d14          !  /pinctrl/flexbus1/flexbus1m1-d15          !  /pinctrl/flexbus1/flexbus1m2-csn          !  /pinctrl/flexbus1/flexbus1m3-csn          !  /pinctrl/flexbus1/flexbus1m4-csn            /pinctrl/flexbus1/flexbus1-clk          /pinctrl/flexbus1/flexbus1-d10          /pinctrl/flexbus1/flexbus1-d11          /pinctrl/flexbus1/flexbus1-d0           /pinctrl/flexbus1/flexbus1-d1           /pinctrl/flexbus1/flexbus1-d2           /pinctrl/flexbus1/flexbus1-d3           /pinctrl/flexbus1/flexbus1-d4           &/pinctrl/flexbus1/flexbus1-d5           2/pinctrl/flexbus1/flexbus1-d6           >/pinctrl/flexbus1/flexbus1-d7           J/pinctrl/flexbus1/flexbus1-d8           V/pinctrl/flexbus1/flexbus1-d9         3  b/pinctrl/flexbus0_testclk/flexbus0_testclk-testclk        6  {/pinctrl/flexbus0_testdata/flexbus0_testdata-testdata         3  /pinctrl/flexbus1_testclk/flexbus1_testclk-testclk        6  /pinctrl/flexbus1_testdata/flexbus1_testdata-testdata           /pinctrl/fspi0/fspi0-pins           /pinctrl/fspi0/fspi0-csn0           /pinctrl/fspi0/fspi0-csn1           /pinctrl/fspi1/fspi1m0-pins         /pinctrl/fspi1/fspi1m0-csn0          /pinctrl/fspi1/fspi1m1-pins          /pinctrl/fspi1/fspi1m1-csn0          /pinctrl/fspi1/fspi1m1-csn1       *   ,/pinctrl/fspi0_testclk/fspi0_testclk-test         ,   ?/pinctrl/fspi0_testdata/fspi0_testdata-test       ,   S/pinctrl/fspi1_testclk/fspi1_testclkm1-test       .   h/pinctrl/fspi1_testdata/fspi1_testdatam1-test            ~/pinctrl/gpu/gpu-pins             /pinctrl/hdmi_tx/hdmi_txm0-pins           /pinctrl/hdmi_tx/hdmi_txm1-pins          /pinctrl/hdmi_tx/hdmi-tx-scl             /pinctrl/hdmi_tx/hdmi-tx-sda             /pinctrl/i2c0/i2c0m0-xfer            /pinctrl/i2c0/i2c0m1-xfer            /pinctrl/i2c1/i2c1m0-xfer            /pinctrl/i2c1/i2c1m1-xfer            /pinctrl/i2c2/i2c2m0-xfer            /pinctrl/i2c2/i2c2m1-xfer           !/pinctrl/i2c2/i2c2m2-xfer           !/pinctrl/i2c2/i2c2m3-xfer           !/pinctrl/i2c3/i2c3m0-xfer           !)/pinctrl/i2c3/i2c3m1-xfer           !5/pinctrl/i2c3/i2c3m2-xfer           !A/pinctrl/i2c3/i2c3m3-xfer           !M/pinctrl/i2c4/i2c4m0-xfer           !Y/pinctrl/i2c4/i2c4m1-xfer           !e/pinctrl/i2c4/i2c4m2-xfer           !q/pinctrl/i2c4/i2c4m3-xfer           !}/pinctrl/i2c5/i2c5m0-xfer           !/pinctrl/i2c5/i2c5m1-xfer           !/pinctrl/i2c5/i2c5m2-xfer           !/pinctrl/i2c5/i2c5m3-xfer           !/pinctrl/i2c6/i2c6m0-xfer           !/pinctrl/i2c6/i2c6m1-xfer           !/pinctrl/i2c6/i2c6m2-xfer           !/pinctrl/i2c6/i2c6m3-xfer           !/pinctrl/i2c7/i2c7m0-xfer           !/pinctrl/i2c7/i2c7m1-xfer           !/pinctrl/i2c7/i2c7m2-xfer           "/pinctrl/i2c7/i2c7m3-xfer           "/pinctrl/i2c8/i2c8m0-xfer           "/pinctrl/i2c8/i2c8m1-xfer           "%/pinctrl/i2c8/i2c8m2-xfer           "1/pinctrl/i2c8/i2c8m3-xfer           "=/pinctrl/i2c9/i2c9m0-xfer           "I/pinctrl/i2c9/i2c9m1-xfer           "U/pinctrl/i2c9/i2c9m2-xfer           "a/pinctrl/i2c9/i2c9m3-xfer           "m/pinctrl/i3c0/i3c0m0-xfer           "y/pinctrl/i3c0/i3c0m1-xfer           "/pinctrl/i3c1/i3c1m0-xfer           "/pinctrl/i3c1/i3c1m1-xfer           "/pinctrl/i3c1/i3c1m2-xfer            "/pinctrl/i3c0_sda/i3c0_sdam0-pu          "/pinctrl/i3c0_sda/i3c0_sdam1-pu          "/pinctrl/i3c1_sda/i3c1_sdam0-pu          "/pinctrl/i3c1_sda/i3c1_sdam1-pu          "/pinctrl/i3c1_sda/i3c1_sdam2-pu       $  "/pinctrl/isp_flash/isp_flashm0-pins       $  # /pinctrl/isp_flash/isp_flashm1-pins       *  #/pinctrl/isp_prelight/isp_prelightm0-pins         *  #%/pinctrl/isp_prelight/isp_prelightm1-pins           #9/pinctrl/jtag/jtagm0-pins           #E/pinctrl/jtag/jtagm1-pins           #Q/pinctrl/mipi/mipim0-pins           #]/pinctrl/mipi/mipim1-pins           #i/pinctrl/mipi/mipim2-pins           #u/pinctrl/mipi/mipim3-pins           #/pinctrl/npu/npu-pins           #/pinctrl/pcie0/pcie0m0-pins         #/pinctrl/pcie0/pcie0m1-pins         #/pinctrl/pcie0/pcie0m2-pins         #/pinctrl/pcie0/pcie0m3-pins       &  #/pinctrl/pcie0/pcie21-port0-buttonrst           #/pinctrl/pcie1/pcie1m0-pins         #/pinctrl/pcie1/pcie1m1-pins         #/pinctrl/pcie1/pcie1m2-pins         #/pinctrl/pcie1/pcie1m3-pins       &  $/pinctrl/pcie1/pcie21-port1-buttonrst           $/pinctrl/pdm0/pdm0m0-clk0           $/pinctrl/pdm0/pdm0m0-clk1           $*/pinctrl/pdm0/pdm0m0-sdi0           $6/pinctrl/pdm0/pdm0m0-sdi1           $B/pinctrl/pdm0/pdm0m0-sdi2           $N/pinctrl/pdm0/pdm0m0-sdi3           $Z/pinctrl/pdm0/pdm0m1-clk0           $f/pinctrl/pdm0/pdm0m1-clk1           $r/pinctrl/pdm0/pdm0m1-sdi0           $~/pinctrl/pdm0/pdm0m1-sdi1           $/pinctrl/pdm0/pdm0m1-sdi2           $/pinctrl/pdm0/pdm0m1-sdi3           $/pinctrl/pdm0/pdm0m2-clk0           $/pinctrl/pdm0/pdm0m2-clk1           $/pinctrl/pdm0/pdm0m2-sdi0           $/pinctrl/pdm0/pdm0m2-sdi1           $/pinctrl/pdm0/pdm0m2-sdi2           $/pinctrl/pdm0/pdm0m2-sdi3           $/pinctrl/pdm0/pdm0m3-clk0           $/pinctrl/pdm0/pdm0m3-clk1           %/pinctrl/pdm0/pdm0m3-sdi0           %/pinctrl/pdm0/pdm0m3-sdi1           %/pinctrl/pdm0/pdm0m3-sdi2           %&/pinctrl/pdm0/pdm0m3-sdi3           %2/pinctrl/pdm1/pdm1m0-clk0           %>/pinctrl/pdm1/pdm1m0-clk1           %J/pinctrl/pdm1/pdm1m0-sdi0           %V/pinctrl/pdm1/pdm1m0-sdi1           %b/pinctrl/pdm1/pdm1m0-sdi2           %n/pinctrl/pdm1/pdm1m0-sdi3           %z/pinctrl/pdm1/pdm1m1-clk0           %/pinctrl/pdm1/pdm1m1-clk1           %/pinctrl/pdm1/pdm1m1-sdi0           %/pinctrl/pdm1/pdm1m1-sdi1           %/pinctrl/pdm1/pdm1m1-sdi2           %/pinctrl/pdm1/pdm1m1-sdi3           %/pinctrl/pdm1/pdm1m2-clk0           %/pinctrl/pdm1/pdm1m2-clk1           %/pinctrl/pdm1/pdm1m2-sdi0           %/pinctrl/pdm1/pdm1m2-sdi1           %/pinctrl/pdm1/pdm1m2-sdi2           %/pinctrl/pdm1/pdm1m2-sdi3         ,  &
/pinctrl/pmu_debug_test/pmu_debug_test-pins         &/pinctrl/pwm0/pwm0m0-ch0            &)/pinctrl/pwm0/pwm0m0-ch1            &4/pinctrl/pwm0/pwm0m1-ch0            &?/pinctrl/pwm0/pwm0m1-ch1            &J/pinctrl/pwm0/pwm0m2-ch0            &U/pinctrl/pwm0/pwm0m2-ch1            &`/pinctrl/pwm0/pwm0m3-ch0            &k/pinctrl/pwm0/pwm0m3-ch1            &v/pinctrl/pwm1/pwm1m0-ch0            &/pinctrl/pwm1/pwm1m0-ch1            &/pinctrl/pwm1/pwm1m0-ch2            &/pinctrl/pwm1/pwm1m0-ch3            &/pinctrl/pwm1/pwm1m0-ch4            &/pinctrl/pwm1/pwm1m0-ch5            &/pinctrl/pwm1/pwm1m1-ch0            &/pinctrl/pwm1/pwm1m1-ch1            &/pinctrl/pwm1/pwm1m1-ch2            &/pinctrl/pwm1/pwm1m1-ch3            &/pinctrl/pwm1/pwm1m1-ch4            &/pinctrl/pwm1/pwm1m1-ch5            &/pinctrl/pwm1/pwm1m2-ch0            '/pinctrl/pwm1/pwm1m2-ch1            '/pinctrl/pwm1/pwm1m2-ch2            '/pinctrl/pwm1/pwm1m2-ch3            '&/pinctrl/pwm1/pwm1m2-ch4            '1/pinctrl/pwm1/pwm1m2-ch5            '</pinctrl/pwm1/pwm1m3-ch0            'G/pinctrl/pwm1/pwm1m3-ch1            'R/pinctrl/pwm1/pwm1m3-ch2            ']/pinctrl/pwm1/pwm1m3-ch3            'h/pinctrl/pwm1/pwm1m3-ch4            's/pinctrl/pwm1/pwm1m3-ch5            '~/pinctrl/pwm2/pwm2m0-ch0            '/pinctrl/pwm2/pwm2m0-ch1            '/pinctrl/pwm2/pwm2m0-ch2            '/pinctrl/pwm2/pwm2m0-ch3            '/pinctrl/pwm2/pwm2m0-ch4            '/pinctrl/pwm2/pwm2m0-ch5            '/pinctrl/pwm2/pwm2m0-ch6            '/pinctrl/pwm2/pwm2m0-ch7            '/pinctrl/pwm2/pwm2m1-ch0            '/pinctrl/pwm2/pwm2m1-ch1            '/pinctrl/pwm2/pwm2m1-ch2            '/pinctrl/pwm2/pwm2m1-ch3            (/pinctrl/pwm2/pwm2m1-ch4            (/pinctrl/pwm2/pwm2m1-ch5            (/pinctrl/pwm2/pwm2m1-ch6            (#/pinctrl/pwm2/pwm2m1-ch7            (./pinctrl/pwm2/pwm2m2-ch0            (9/pinctrl/pwm2/pwm2m2-ch1            (D/pinctrl/pwm2/pwm2m2-ch2            (O/pinctrl/pwm2/pwm2m2-ch3            (Z/pinctrl/pwm2/pwm2m2-ch4            (e/pinctrl/pwm2/pwm2m2-ch5            (p/pinctrl/pwm2/pwm2m2-ch6            ({/pinctrl/pwm2/pwm2m2-ch7            (/pinctrl/pwm2/pwm2m3-ch0            (/pinctrl/pwm2/pwm2m3-ch1            (/pinctrl/pwm2/pwm2m3-ch2            (/pinctrl/pwm2/pwm2m3-ch3            (/pinctrl/pwm2/pwm2m3-ch4            (/pinctrl/pwm2/pwm2m3-ch5            (/pinctrl/pwm2/pwm2m3-ch6            (/pinctrl/pwm2/pwm2m3-ch7             (/pinctrl/ref_clk0/ref_clk0-clk0          (/pinctrl/ref_clk1/ref_clk1-clk1          (/pinctrl/ref_clk2/ref_clk2-clk2         )/pinctrl/sai0/sai0m0-lrck           )/pinctrl/sai0/sai0m0-mclk           ) /pinctrl/sai0/sai0m0-sclk           ),/pinctrl/sai0/sai0m0-sdi0           )8/pinctrl/sai0/sai0m0-sdi1           )D/pinctrl/sai0/sai0m0-sdi2           )P/pinctrl/sai0/sai0m0-sdi3           )\/pinctrl/sai0/sai0m0-sdo0           )h/pinctrl/sai0/sai0m0-sdo1           )t/pinctrl/sai0/sai0m0-sdo2           )/pinctrl/sai0/sai0m0-sdo3           )/pinctrl/sai0/sai0m1-lrck           )/pinctrl/sai0/sai0m1-mclk           )/pinctrl/sai0/sai0m1-sclk           )/pinctrl/sai0/sai0m1-sdi0           )/pinctrl/sai0/sai0m1-sdi1           )/pinctrl/sai0/sai0m1-sdi2           )/pinctrl/sai0/sai0m1-sdi3           )/pinctrl/sai0/sai0m1-sdo0           )/pinctrl/sai0/sai0m1-sdo1           )/pinctrl/sai0/sai0m1-sdo2           */pinctrl/sai0/sai0m1-sdo3           */pinctrl/sai0/sai0m2-lrck           */pinctrl/sai0/sai0m2-mclk           *(/pinctrl/sai0/sai0m2-sclk           *4/pinctrl/sai0/sai0m2-sdi0           *@/pinctrl/sai0/sai0m2-sdi1           *L/pinctrl/sai0/sai0m2-sdi2           *X/pinctrl/sai0/sai0m2-sdi3           *d/pinctrl/sai0/sai0m2-sdo0           *p/pinctrl/sai0/sai0m2-sdo1           *|/pinctrl/sai0/sai0m2-sdo2           */pinctrl/sai0/sai0m2-sdo3           */pinctrl/sai1/sai1m0-lrck           */pinctrl/sai1/sai1m0-mclk           */pinctrl/sai1/sai1m0-sclk           */pinctrl/sai1/sai1m0-sdi0           */pinctrl/sai1/sai1m0-sdi1           */pinctrl/sai1/sai1m0-sdi2           */pinctrl/sai1/sai1m0-sdi3           */pinctrl/sai1/sai1m0-sdo0           */pinctrl/sai1/sai1m0-sdo1           + /pinctrl/sai1/sai1m0-sdo2           +/pinctrl/sai1/sai1m0-sdo3           +/pinctrl/sai1/sai1m1-lrck           +$/pinctrl/sai1/sai1m1-mclk           +0/pinctrl/sai1/sai1m1-sclk           +</pinctrl/sai1/sai1m1-sdi0           +H/pinctrl/sai1/sai1m1-sdi1           +T/pinctrl/sai1/sai1m1-sdi2           +`/pinctrl/sai1/sai1m1-sdi3           +l/pinctrl/sai1/sai1m1-sdo0           +x/pinctrl/sai1/sai1m1-sdo1           +/pinctrl/sai1/sai1m1-sdo2           +/pinctrl/sai1/sai1m1-sdo3           +/pinctrl/sai2/sai2m0-lrck           +/pinctrl/sai2/sai2m0-mclk           +/pinctrl/sai2/sai2m0-sclk           +/pinctrl/sai2/sai2m0-sdi            +/pinctrl/sai2/sai2m0-sdo            +/pinctrl/sai2/sai2m1-lrck           +/pinctrl/sai2/sai2m1-mclk           +/pinctrl/sai2/sai2m1-sclk           +/pinctrl/sai2/sai2m1-sdi            ,/pinctrl/sai2/sai2m1-sdo            ,/pinctrl/sai2/sai2m2-lrck           ,/pinctrl/sai2/sai2m2-mclk           ,(/pinctrl/sai2/sai2m2-sclk           ,4/pinctrl/sai2/sai2m2-sdi            ,?/pinctrl/sai2/sai2m2-sdo            ,J/pinctrl/sai3/sai3m0-lrck           ,V/pinctrl/sai3/sai3m0-mclk           ,b/pinctrl/sai3/sai3m0-sclk           ,n/pinctrl/sai3/sai3m0-sdi            ,y/pinctrl/sai3/sai3m0-sdo            ,/pinctrl/sai3/sai3m1-lrck           ,/pinctrl/sai3/sai3m1-mclk           ,/pinctrl/sai3/sai3m1-sclk           ,/pinctrl/sai3/sai3m1-sdi            ,/pinctrl/sai3/sai3m1-sdo            ,/pinctrl/sai3/sai3m2-lrck           ,/pinctrl/sai3/sai3m2-mclk           ,/pinctrl/sai3/sai3m2-sclk           ,/pinctrl/sai3/sai3m2-sdi            ,/pinctrl/sai3/sai3m2-sdo            ,/pinctrl/sai3/sai3m3-lrck           -/pinctrl/sai3/sai3m3-mclk           -/pinctrl/sai3/sai3m3-sclk           -/pinctrl/sai3/sai3m3-sdi            -'/pinctrl/sai3/sai3m3-sdo            -2/pinctrl/sai4/sai4m0-lrck           ->/pinctrl/sai4/sai4m0-mclk           -J/pinctrl/sai4/sai4m0-sclk           -V/pinctrl/sai4/sai4m0-sdi            -a/pinctrl/sai4/sai4m0-sdo            -l/pinctrl/sai4/sai4m1-lrck           -x/pinctrl/sai4/sai4m1-mclk           -/pinctrl/sai4/sai4m1-sclk           -/pinctrl/sai4/sai4m1-sdi            -/pinctrl/sai4/sai4m1-sdo            -/pinctrl/sai4/sai4m2-lrck           -/pinctrl/sai4/sai4m2-mclk           -/pinctrl/sai4/sai4m2-sclk           -/pinctrl/sai4/sai4m2-sdi            -/pinctrl/sai4/sai4m2-sdo            -/pinctrl/sai4/sai4m3-lrck           -/pinctrl/sai4/sai4m3-mclk           -/pinctrl/sai4/sai4m3-sclk           ./pinctrl/sai4/sai4m3-sdi            ./pinctrl/sai4/sai4m3-sdo            ./pinctrl/sata30/sata30-sata       +  .&/pinctrl/sata30_port0/sata30_port0m0-port0        +  .;/pinctrl/sata30_port0/sata30_port0m1-port0        +  .P/pinctrl/sata30_port1/sata30_port1m0-port1        +  .e/pinctrl/sata30_port1/sata30_port1m1-port1          .z/pinctrl/sdmmc0/sdmmc0-bus4         ./pinctrl/sdmmc0/sdmmc0-clk          ./pinctrl/sdmmc0/sdmmc0-cmd          ./pinctrl/sdmmc0/sdmmc0-det          ./pinctrl/sdmmc0/sdmmc0-pwren            ./pinctrl/sdmmc1/sdmmc1m0-bus4           ./pinctrl/sdmmc1/sdmmc1m0-clk            ./pinctrl/sdmmc1/sdmmc1m0-cmd            ./pinctrl/sdmmc1/sdmmc1m0-det            ./pinctrl/sdmmc1/sdmmc1m0-pwren          ./pinctrl/sdmmc1/sdmmc1m1-bus4           //pinctrl/sdmmc1/sdmmc1m1-clk            //pinctrl/sdmmc1/sdmmc1m1-cmd            / /pinctrl/sdmmc1/sdmmc1m1-det            /-/pinctrl/sdmmc1/sdmmc1m1-pwren          /</pinctrl/sdmmc1/sdmmc1m2-det          ,  /I/pinctrl/sdmmc0_testclk/sdmmc0_testclk-test       .  /]/pinctrl/sdmmc0_testdata/sdmmc0_testdata-test         .  /r/pinctrl/sdmmc1_testclk/sdmmc1_testclkm0-test         0  //pinctrl/sdmmc1_testdata/sdmmc1_testdatam0-test         //pinctrl/spdif/spdifm0-rx0          //pinctrl/spdif/spdifm0-rx1          //pinctrl/spdif/spdifm0-tx0          //pinctrl/spdif/spdifm0-tx1          //pinctrl/spdif/spdifm1-rx0          //pinctrl/spdif/spdifm1-rx1          //pinctrl/spdif/spdifm1-tx0          //pinctrl/spdif/spdifm1-tx1          //pinctrl/spdif/spdifm2-rx0          0/pinctrl/spdif/spdifm2-rx1          0/pinctrl/spdif/spdifm2-tx0          0#/pinctrl/spdif/spdifm2-tx1          0//pinctrl/spi0/spi0m0-pins           0;/pinctrl/spi0/spi0m0-csn0           0G/pinctrl/spi0/spi0m0-csn1           0S/pinctrl/spi0/spi0m1-pins           0_/pinctrl/spi0/spi0m1-csn0           0k/pinctrl/spi0/spi0m1-csn1           0w/pinctrl/spi0/spi0m2-pins           0/pinctrl/spi0/spi0m2-csn0           0/pinctrl/spi0/spi0m2-csn1           /pinctrl/spi1/spi1m0-pins           /pinctrl/spi1/spi1m0-csn0           0/pinctrl/spi1/spi1m0-csn1            /pinctrl/spi1/spi1m1-pins            /pinctrl/spi1/spi1m1-csn0             /pinctrl/spi1/spi1m1-csn1           0/pinctrl/spi1/spi1m2-pins           0/pinctrl/spi1/spi1m2-csn0           0/pinctrl/spi1/spi1m2-csn1           0/pinctrl/spi2/spi2m0-pins           0/pinctrl/spi2/spi2m0-csn0           0/pinctrl/spi2/spi2m0-csn1           0/pinctrl/spi2/spi2m1-pins           0/pinctrl/spi2/spi2m1-csn0           1/pinctrl/spi2/spi2m1-csn1           1/pinctrl/spi2/spi2m2-pins           1/pinctrl/spi2/spi2m2-csn0           1+/pinctrl/spi2/spi2m2-csn1           17/pinctrl/spi3/spi3m0-pins           1C/pinctrl/spi3/spi3m0-csn0           1O/pinctrl/spi3/spi3m0-csn1           1[/pinctrl/spi3/spi3m1-pins           1g/pinctrl/spi3/spi3m1-csn0           1s/pinctrl/spi3/spi3m1-csn1           1/pinctrl/spi3/spi3m2-pins           1/pinctrl/spi3/spi3m2-csn0           1/pinctrl/spi3/spi3m2-csn1           1/pinctrl/spi4/spi4m0-pins           1/pinctrl/spi4/spi4m0-csn0           1/pinctrl/spi4/spi4m0-csn1           1/pinctrl/spi4/spi4m1-pins           1/pinctrl/spi4/spi4m1-csn0           1/pinctrl/spi4/spi4m1-csn1           1/pinctrl/spi4/spi4m2-pins           1/pinctrl/spi4/spi4m2-csn0           2/pinctrl/spi4/spi4m2-csn1           2/pinctrl/spi4/spi4m3-pins           2/pinctrl/spi4/spi4m3-csn0           2'/pinctrl/spi4/spi4m3-csn1            23/pinctrl/test_clk/test_clk-pins         2A/pinctrl/tsadc/tsadcm0-pins         2N/pinctrl/tsadc/tsadcm1-pins       $  2[/pinctrl/tsadc_ctrl/tsadc_ctrl-pins         2k/pinctrl/uart0/uart0m0-xfer         2x/pinctrl/uart0/uart0m1-xfer         2/pinctrl/uart1/uart1m0-xfer         2/pinctrl/uart1/uart1m0-ctsn         2/pinctrl/uart1/uart1m0-rtsn         2/pinctrl/uart1/uart1m1-xfer         2/pinctrl/uart1/uart1m1-ctsn         2/pinctrl/uart1/uart1m1-rtsn         2/pinctrl/uart1/uart1m2-xfer         2/pinctrl/uart1/uart1m2-ctsn         2/pinctrl/uart1/uart1m2-rtsn         2/pinctrl/uart2/uart2m0-xfer         3/pinctrl/uart2/uart2m0-ctsn         3/pinctrl/uart2/uart2m0-rtsn         3!/pinctrl/uart2/uart2m1-xfer         3./pinctrl/uart2/uart2m1-ctsn         3;/pinctrl/uart2/uart2m1-rtsn         3H/pinctrl/uart2/uart2m2-xfer         3U/pinctrl/uart2/uart2m2-ctsn         3b/pinctrl/uart2/uart2m2-rtsn         3o/pinctrl/uart3/uart3m0-xfer         3|/pinctrl/uart3/uart3m0-ctsn         3/pinctrl/uart3/uart3m0-rtsn         3/pinctrl/uart3/uart3m1-xfer         3/pinctrl/uart3/uart3m1-ctsn         3/pinctrl/uart3/uart3m1-rtsn         3/pinctrl/uart3/uart3m2-xfer         3/pinctrl/uart3/uart3m2-ctsn         3/pinctrl/uart3/uart3m2-rtsn         3/pinctrl/uart4/uart4m0-xfer         3/pinctrl/uart4/uart4m0-ctsn         3/pinctrl/uart4/uart4m0-rtsn         4/pinctrl/uart4/uart4m1-xfer         4/pinctrl/uart4/uart4m1-ctsn         4%/pinctrl/uart4/uart4m1-rtsn         42/pinctrl/uart4/uart4m2-xfer         4?/pinctrl/uart5/uart5m0-xfer         4L/pinctrl/uart5/uart5m0-ctsn         4Y/pinctrl/uart5/uart5m0-rtsn         4f/pinctrl/uart5/uart5m1-xfer         4s/pinctrl/uart5/uart5m1-ctsn         4/pinctrl/uart5/uart5m1-rtsn         4/pinctrl/uart5/uart5m2-xfer         4/pinctrl/uart5/uart5m2-ctsn         4/pinctrl/uart5/uart5m2-rtsn         4/pinctrl/uart6/uart6m0-xfer         4/pinctrl/uart6/uart6m0-ctsn         4/pinctrl/uart6/uart6m0-rtsn         4/pinctrl/uart6/uart6m1-xfer         4/pinctrl/uart6/uart6m1-ctsn         4/pinctrl/uart6/uart6m1-rtsn         5/pinctrl/uart6/uart6m2-xfer         5/pinctrl/uart6/uart6m2-ctsn         5/pinctrl/uart6/uart6m2-rtsn         5)/pinctrl/uart6/uart6m3-xfer         56/pinctrl/uart7/uart7m0-xfer         5C/pinctrl/uart7/uart7m0-ctsn         5P/pinctrl/uart7/uart7m0-rtsn         5]/pinctrl/uart7/uart7m1-xfer         5j/pinctrl/uart7/uart7m1-ctsn         5w/pinctrl/uart7/uart7m1-rtsn         5/pinctrl/uart7/uart7m2-xfer         5/pinctrl/uart8/uart8m0-xfer         5/pinctrl/uart8/uart8m0-ctsn         5/pinctrl/uart8/uart8m0-rtsn         5/pinctrl/uart8/uart8m1-xfer         5/pinctrl/uart8/uart8m1-ctsn         5/pinctrl/uart8/uart8m1-rtsn         5/pinctrl/uart8/uart8m2-xfer         5/pinctrl/uart9/uart9m0-xfer         5/pinctrl/uart9/uart9m0-ctsn         6/pinctrl/uart9/uart9m0-rtsn         6/pinctrl/uart9/uart9m1-xfer         6 /pinctrl/uart9/uart9m1-ctsn         6-/pinctrl/uart9/uart9m1-rtsn         6:/pinctrl/uart9/uart9m2-xfer         6G/pinctrl/uart10/uart10m0-xfer           6U/pinctrl/uart10/uart10m0-ctsn           6c/pinctrl/uart10/uart10m0-rtsn           6q/pinctrl/uart10/uart10m1-xfer           6/pinctrl/uart10/uart10m1-ctsn           6/pinctrl/uart10/uart10m1-rtsn           6/pinctrl/uart10/uart10m2-xfer           6/pinctrl/uart11/uart11m0-xfer           6/pinctrl/uart11/uart11m0-ctsn           6/pinctrl/uart11/uart11m0-rtsn           6/pinctrl/uart11/uart11m1-xfer           6/pinctrl/uart11/uart11m1-ctsn           6/pinctrl/uart11/uart11m1-rtsn           6/pinctrl/uart11/uart11m2-xfer           7/pinctrl/ufs/ufs-refclk         7/pinctrl/ufs/ufs-rst            7/pinctrl/ufs/ufs-rstgpio          *  7*/pinctrl/ufs_testdata0/ufs_testdata0-test         *  7=/pinctrl/ufs_testdata1/ufs_testdata1-test         *  7P/pinctrl/ufs_testdata2/ufs_testdata2-test         *  7c/pinctrl/ufs_testdata3/ufs_testdata3-test           7v/pinctrl/vi_cif/vi_cif-pins         7/pinctrl/vo_lcdc/vo_lcdc-pins           7/pinctrl/vo_post/vo_post-pins            7/pinctrl/vp0_sync/vp0_sync-pins          7/pinctrl/vp1_sync/vp1_sync-pins          7/pinctrl/vp2_sync/vp2_sync-pins         7/pinctrl/pmic/pmic-pins         7/pinctrl/vo/bt1120-pins         7/pinctrl/vo/bt656-pins          7/pinctrl/vo/rgb3x8-pins-m0          7/pinctrl/vo/rgb3x8-pins-m1          8/pinctrl/vo/rgb565-pins         8/pinctrl/vo/rgb666-pins         8/pinctrl/vo/rgb888-pins         8)/pinctrl/vo_ebc/vo_ebc-pins         85/pinctrl/vo_ebc/vo_ebc-extern           8C/pinctrl/gmac/gmac0-rst         8M/pinctrl/gmac/gmac1-rst         8W/pinctrl/headphone/hp-det-l         8`/pinctrl/hym8563/hym8563-int            8l/pinctrl/leds/led-red-en            8v/pinctrl/leds/led-green-en          8/pinctrl/pcie/pcie-pwr-en           8/pinctrl/pcie/pcie-reset            8/pinctrl/usb/usb-host-pwren         8/pinctrl/usb/usb-otg0-pwren         8/pinctrl/usb/usbc0-interrupt            8/pinctrl/usb/usbc0-sbu1         8/pinctrl/usb/usbc0-sbu2       &  8/pinctrl/wireless-bluetooth/bt-reg-on         )  8/pinctrl/wireless-bluetooth/host-wake-bt          )  8/pinctrl/wireless-bluetooth/bt-wake-host          &  8/pinctrl/wireless-wlan/wifi-wake-host         #  9/pinctrl/wireless-wlan/wifi-reg-on        	  9/pmu-a53          	  9"/pmu-a72            9*/thermal-zones          98/thermal-zones/package-thermal        2  9H/thermal-zones/package-thermal/trips/package-crit           9U/thermal-zones/bigcore-thermal        3  9e/thermal-zones/bigcore-thermal/trips/bigcore-alert        2  9s/thermal-zones/bigcore-thermal/trips/bigcore-crit         "  9/thermal-zones/littlecore-thermal         9  9/thermal-zones/littlecore-thermal/trips/littlecore-alert          8  9/thermal-zones/littlecore-thermal/trips/littlecore-crit         9/thermal-zones/gpu-thermal        +  9/thermal-zones/gpu-thermal/trips/gpu-alert        *  9/thermal-zones/gpu-thermal/trips/gpu-crit           9/thermal-zones/npu-thermal        *  9/thermal-zones/npu-thermal/trips/npu-crit           9/thermal-zones/ddr-thermal        *  9/thermal-zones/ddr-thermal/trips/ddr-crit           9/soc/pcie@22000000        /  :/soc/pcie@22000000/legacy-interrupt-controller          :/soc/pcie@22400000        /  :/soc/pcie@22400000/legacy-interrupt-controller          :/soc/usb@23000000         (  :-/soc/usb@23000000/ports/port@0/endpoint       (  :</soc/usb@23000000/ports/port@1/endpoint         :K/soc/usb@23400000           :Y/soc/syscon@2600a000            :a/soc/syscon@2600c000            :m/soc/syscon@2600e000            :y/soc/syscon@26010000            :/soc/syscon@26016000            :/soc/syscon@26018000            :/soc/syscon@2601a000            :/soc/syscon@2601e000            :/soc/syscon@26020000            :/soc/syscon@26024000            :/soc/syscon@26026000            :/soc/syscon@26028000            :/soc/syscon@2602a000            :/soc/syscon@2602c000            :/soc/syscon@2602e000             :/soc/syscon@2602e000/usb2-phy@0       )  :/soc/syscon@2602e000/usb2-phy@0/otg-port          #  ;/soc/syscon@2602e000/usb2-phy@2000        ,  ;	/soc/syscon@2602e000/usb2-phy@2000/otg-port         ;/soc/syscon@26032000            ;!/soc/syscon@26034000            ;//soc/syscon@26036000            ;7/soc/syscon@26038000            ;B/soc/syscon@26040000            ;J/soc/clock-controller@27200000           =/soc/i2c@27300000           ;N/soc/serial@27310000            \/soc/power-management@27380000        0  ;T/soc/power-management@27380000/power-controller         ;Z/soc/gpu@27800000           ;^/soc/video-codec@27b00000           ;c/soc/iommu@27b00800         ;l/soc/vop@27d00000           ;p/soc/vop@27d00000/ports         ;x/soc/vop@27d00000/ports/port@0        *  ;|/soc/vop@27d00000/ports/port@0/endpoint@2           ;/soc/vop@27d00000/ports/port@1          ;/soc/vop@27d00000/ports/port@2          ;/soc/iommu@27d07e00         ;/soc/sai@27d40000           ;/soc/sai@27d50000           ;/soc/dsi@27d80000           ;/soc/dsi@27d80000/ports/port@0          ;/soc/dsi@27d80000/ports/port@1          ;/soc/hdmi@27da0000           ;/soc/hdmi@27da0000/ports/port@0       )  ;/soc/hdmi@27da0000/ports/port@0/endpoint             ;/soc/hdmi@27da0000/ports/port@1       )  ;/soc/hdmi@27da0000/ports/port@1/endpoint            ;/soc/sai@27ed0000           ;/soc/sai@27ee0000           ;/soc/sai@27ef0000           ;/soc/qos@27f02000           ;/soc/qos@27f04000           </soc/qos@27f04080           </soc/qos@27f04100           </soc/qos@27f04180           < /soc/qos@27f04200           <*/soc/qos@27f04280           <6/soc/qos@27f05000           <>/soc/qos@27f06000           <H/soc/qos@27f08000           <T/soc/qos@27f08080           <a/soc/qos@27f08100           <n/soc/qos@27f09000           <w/soc/qos@27f09080           </soc/qos@27f0a000           </soc/qos@27f0a080           </soc/qos@27f0c000           </soc/qos@27f0d000           </soc/qos@27f0e000           </soc/qos@27f0e080           </soc/qos@27f0f000           </soc/qos@27f10000           </soc/qos@27f10080           </soc/qos@27f10100           </soc/qos@27f10180           </soc/qos@27f10200           =/soc/qos@27f11000           =/soc/qos@27f12800           =/soc/qos@27f12880           ='/soc/qos@27f13000           =//soc/qos@27f13080           =8/soc/qos@27f13100           =A/soc/qos@27f13180           =J/soc/qos@27f13200           =S/soc/qos@27f20000           =^/soc/qos@27f21000           =i/soc/qos@27f22080           =v/soc/qos@27f22100           </soc/ethernet@2a220000          =/soc/ethernet@2a220000/mdio       "  =/soc/ethernet@2a220000/mdio/phy@1         )  =/soc/ethernet@2a220000/stmmac-axi-config          (  =/soc/ethernet@2a220000/rx-queues-config       (  =/soc/ethernet@2a220000/tx-queues-config         </soc/ethernet@2a230000          =/soc/ethernet@2a230000/mdio       "  =/soc/ethernet@2a230000/mdio/phy@1         )  =/soc/ethernet@2a230000/stmmac-axi-config          (  =/soc/ethernet@2a230000/rx-queues-config       (  >/soc/ethernet@2a230000/tx-queues-config         >/soc/sata@2a240000          >%/soc/sata@2a250000          </soc/ufshc@2a2d0000         >+/soc/spi@2a300000           <$/soc/mmc@2a310000           	)/soc/mmc@2a320000           >0/soc/mmc@2a330000           >6/soc/spi@2a340000           >;/soc/rng@2a410000           >?/soc/otp@2a580000           >C/soc/otp@2a580000/cpu-code@2             >L/soc/otp@2a580000/cpu-version@5         >\/soc/otp@2a580000/id@a        "  >c/soc/otp@2a580000/cpub-leakage@1e         "  >p/soc/otp@2a580000/cpul-leakage@1f         !  >}/soc/otp@2a580000/npu-leakage@20          !  >/soc/otp@2a580000/gpu-leakage@21          !  >/soc/otp@2a580000/log-leakage@22          (  >/soc/otp@2a580000/bigcore-tsadc-trim@24       (  >/soc/otp@2a580000/litcore-tsadc-trim@26       $  >/soc/otp@2a580000/ddr-tsadc-trim@28       $  >/soc/otp@2a580000/npu-tsadc-trim@2a       $  >/soc/otp@2a580000/gpu-tsadc-trim@2c       $  >/soc/otp@2a580000/soc-tsadc-trim@64         ?/soc/sai@2a600000           ?/soc/sai@2a610000           ?/soc/sai@2a620000           ?/soc/sai@2a630000           ?/soc/sai@2a640000         #  ?/soc/interrupt-controller@2a701000          ? /soc/dma-controller@2ab90000            ?&/soc/dma-controller@2abb0000            ?,/soc/dma-controller@2abd0000             B/soc/i2c@2ac40000         )  ?2/soc/i2c@2ac40000/pmic@23/dvs1-null-pins          )  ?B/soc/i2c@2ac40000/pmic@23/dvs2-null-pins          )  ?R/soc/i2c@2ac40000/pmic@23/dvs3-null-pins          (  ?b/soc/i2c@2ac40000/pmic@23/dvs1-slp-pins       *  ?q/soc/i2c@2ac40000/pmic@23/dvs1-pwrdn-pins         (  ?/soc/i2c@2ac40000/pmic@23/dvs1-rst-pins       (  ?/soc/i2c@2ac40000/pmic@23/dvs2-slp-pins       *  ?/soc/i2c@2ac40000/pmic@23/dvs2-pwrdn-pins         (  ?/soc/i2c@2ac40000/pmic@23/dvs2-rst-pins       (  ?/soc/i2c@2ac40000/pmic@23/dvs2-dvs-pins       )  ?/soc/i2c@2ac40000/pmic@23/dvs2-gpio-pins          (  ?/soc/i2c@2ac40000/pmic@23/dvs3-slp-pins       *  ?/soc/i2c@2ac40000/pmic@23/dvs3-pwrdn-pins         (  ?/soc/i2c@2ac40000/pmic@23/dvs3-rst-pins       (  @/soc/i2c@2ac40000/pmic@23/dvs3-dvs-pins       )  @/soc/i2c@2ac40000/pmic@23/dvs3-gpio-pins          /  @-/soc/i2c@2ac40000/pmic@23/regulators/dcdc-reg1        /  @</soc/i2c@2ac40000/pmic@23/regulators/dcdc-reg2        /  @G/soc/i2c@2ac40000/pmic@23/regulators/dcdc-reg3        /  @V/soc/i2c@2ac40000/pmic@23/regulators/dcdc-reg4        /  @a/soc/i2c@2ac40000/pmic@23/regulators/dcdc-reg5        /  @l/soc/i2c@2ac40000/pmic@23/regulators/dcdc-reg6        /  @x/soc/i2c@2ac40000/pmic@23/regulators/dcdc-reg7        /  @/soc/i2c@2ac40000/pmic@23/regulators/dcdc-reg8        /  @/soc/i2c@2ac40000/pmic@23/regulators/dcdc-reg9        0  @/soc/i2c@2ac40000/pmic@23/regulators/dcdc-reg10       /  @/soc/i2c@2ac40000/pmic@23/regulators/pldo-reg1        /  @/soc/i2c@2ac40000/pmic@23/regulators/pldo-reg2        /  @/soc/i2c@2ac40000/pmic@23/regulators/pldo-reg3        /  @/soc/i2c@2ac40000/pmic@23/regulators/pldo-reg4        /  @/soc/i2c@2ac40000/pmic@23/regulators/pldo-reg5        /  @/soc/i2c@2ac40000/pmic@23/regulators/pldo-reg6        /  @/soc/i2c@2ac40000/pmic@23/regulators/nldo-reg1        /  A/soc/i2c@2ac40000/pmic@23/regulators/nldo-reg2        /  A/soc/i2c@2ac40000/pmic@23/regulators/nldo-reg3        /  A&/soc/i2c@2ac40000/pmic@23/regulators/nldo-reg4        /  A3/soc/i2c@2ac40000/pmic@23/regulators/nldo-reg5           G/soc/i2c@2ac50000         !  A@/soc/i2c@2ac50000/typec-portc@22          A  AF/soc/i2c@2ac50000/typec-portc@22/connector/ports/port@0/endpoint          A  AR/soc/i2c@2ac50000/typec-portc@22/connector/ports/port@1/endpoint          A  A^/soc/i2c@2ac50000/typec-portc@22/connector/ports/port@2/endpoint            Aj/soc/i2c@2ac50000/rtc@51             L/soc/i2c@2ac60000         !  Ar/soc/i2c@2ac60000/audio-codec@10             Q/soc/i2c@2ac70000            V/soc/i2c@2ac80000            [/soc/i2c@2ac90000            `/soc/i2c@2aca0000            e/soc/i2c@2acb0000           Ay/soc/timer@2acc0000         A/soc/watchdog@2ace0000           /soc/spi@2acf0000            /soc/spi@2ad00000            /soc/spi@2ad10000            /soc/spi@2ad20000            /soc/spi@2ad30000           A/soc/serial@2ad40000            A/soc/serial@2ad50000            A/soc/serial@2ad60000            A/soc/serial@2ad70000            A/soc/serial@2ad80000            A/soc/serial@2ad90000            A/soc/serial@2ada0000            A/soc/serial@2adb0000            A/soc/serial@2adc0000            A/soc/adc@2ae00000           A/soc/tsadc@2ae70000          j/soc/i2c@2ae80000           A/soc/serial@2afc0000            A/soc/serial@2afd0000            A/soc/phy@2b020000           A/soc/phy@2b050000           A/soc/phy@2b060000           A/soc/phy@2b010000            B/soc/phy@2b010000/port/endpoint         B/soc/hdmiphy@2b000000           &/soc/sram@3ff88000        !  B/soc/sram@3ff88000/rkvdec-sram@0            B$/soc/scmi-shmem@4010f000            B//hdmi-con/port/endpoint         B;/leds           B@/leds/green-led         BJ/leds/red-led           BR/es8388-sound           B_/regulator-vcc-12v0-dcin            Bm/regulator-vcc-1v1-nldo-s3          B}/regulator-vcc-1v2-ufs-vccq-s0          B/regulator-vcc-1v8-s0            B/regulator-vcc-1v8-ufs-vccq2-s0         B/regulator-vcc-2v0-pldo-s3          B/regulator-vcc-3v3-pcie         B/regulator-vcc-3v3-s0           B/regulator-vcc-5v0-sys          B/regulator-vcc-5v0-device           B/regulator-vcc-5v0-typec0           C/regulator-vcc-5v0-usbhost          C/regulator-vcc-ufs-s0           C"/sdio-pwrseq             	compatible interrupt-parent #address-cells #size-cells model i2c0 i2c1 i2c2 i2c3 i2c4 i2c5 i2c6 i2c7 i2c8 i2c9 serial0 serial1 serial2 serial3 serial4 serial5 serial6 serial7 serial8 serial9 serial10 serial11 spi0 spi1 spi2 spi3 spi4 ethernet0 ethernet1 clock-frequency clock-output-names #clock-cells phandle cpu device_type reg enable-method capacity-dmips-mhz clocks operating-points-v2 dynamic-power-coefficient cpu-idle-states #cooling-cells cpu-supply entry-method arm,psci-suspend-param entry-latency-us exit-latency-us min-residency-us local-timer-stop opp-shared opp-hz opp-microvolt clock-latency-ns opp-suspend ports arm,smc-id shmem simple-audio-card,name simple-audio-card,format simple-audio-card,mclk-fs status sound-dai rockchip,grf ranges gpio-controller gpio-ranges interrupts interrupt-controller #gpio-cells #interrupt-cells bias-pull-up bias-pull-down bias-disable drive-strength input-schmitt-enable output-high output-low rockchip,pins interrupt-affinity polling-delay-passive polling-delay thermal-sensors temperature hysteresis trip cooling-device reg-names bus-range clock-names dma-coherent interrupt-names interrupt-map-mask interrupt-map linux,pci-domain max-link-speed num-ib-windows num-viewport num-ob-windows num-lanes phys phy-names power-domains resets reset-names pinctrl-names pinctrl-0 reset-gpios vpcie3v3-supply dr_mode phy_type snps,dis_enblslpm_quirk snps,dis-u1-entry-quirk snps,dis-u2-entry-quirk snps,dis-u2-freeclk-exists-quirk snps,dis-del-phy-power-chg-quirk snps,dis-tx-ipgap-linecheck-quirk snps,parkmode-disable-hs-quirk snps,parkmode-disable-ss-quirk usb-role-switch remote-endpoint snps,dis_rxdet_inp3_quirk #phy-cells phy-supply #reset-cells assigned-clocks assigned-clock-parents assigned-clock-rates reg-shift reg-io-width dmas #power-domain-cells pm_qos mali-supply iommus sram rockchip,disable-mmu-reset #iommu-cells rockchip,pmu dma-names rockchip,sai-rx-route #sound-dai-cells sound-name-prefix rockchip,sai-tx-route rockchip,vo-grf rockchip,php-grf snps,axi-config snps,mixed-burst snps,mtl-rx-config snps,mtl-tx-config snps,tso phy-mode clock_in_out phy-handle reset-assert-us reset-deassert-us snps,blen snps,rd_osr_lmt snps,wr_osr_lmt snps,rx-queues-to-use snps,tx-queues-to-use ports-implemented fifo-depth max-frequency bus-width cap-mmc-highspeed cap-sd-highspeed disable-wp no-sdio no-mmc sd-uhs-sdr104 vmmc-supply vqmmc-supply cap-sdio-irq keep-power-in-suspend mmc-pwrseq no-sd non-removable sd-uhs-sdr50 wakeup-source supports-cqe full-pwr-cycle-in-suspend mmc-hs400-1_8v mmc-hs400-enhanced-strobe bits arm,pl330-periph-burst #dma-cells system-power-controller vcc1-supply vcc2-supply vcc3-supply vcc4-supply vcc5-supply vcc6-supply vcc7-supply vcc8-supply vcc9-supply vcc10-supply vcc11-supply vcc12-supply vcc13-supply vcc14-supply vcca-supply function regulator-always-on regulator-boot-on regulator-min-microvolt regulator-max-microvolt regulator-ramp-delay regulator-name regulator-enable-ramp-delay regulator-off-in-suspend regulator-suspend-microvolt regulator-on-in-suspend vbus-supply label data-role pd-revision power-role source-pdos svid vdo AVDD-supply DVDD-supply HPVDD-supply num-cs uart-has-rtscts #io-channel-cells vref-supply #thermal-sensor-cells rockchip,hw-tshut-temp rockchip,hw-tshut-mode rockchip,hw-tshut-polarity nvmem-cells nvmem-cell-names rockchip,pipe-grf rockchip,pipe-phy-grf rockchip,u2phy-grf rockchip,usb-grf rockchip,usbdpphy-grf mode-switch orientation-switch sbu1-dc-gpios sbu2-dc-gpios pool stdout-path color linux,default-trigger simple-audio-card,widgets simple-audio-card,routing simple-audio-card,pin-switches system-clock-frequency vin-supply enable-active-high gpio startup-delay-us xin32k xin24m spll cpu_l0 cpu_l1 cpu_l2 cpu_l3 cpu_b0 cpu_b1 cpu_b2 cpu_b3 CPU_SLEEP cluster0_opp_table cluster1_opp_table gpu_opp_table display_subsystem scmi scmi_clk hdmi_sound pinctrl gpio0 gpio1 gpio2 gpio3 gpio4 pcfg_pull_up pcfg_pull_down pcfg_pull_none pcfg_pull_none_drv_level_0 pcfg_pull_none_drv_level_1 pcfg_pull_none_drv_level_2 pcfg_pull_none_drv_level_3 pcfg_pull_none_drv_level_4 pcfg_pull_none_drv_level_5 pcfg_pull_none_drv_level_6 pcfg_pull_none_drv_level_7 pcfg_pull_none_drv_level_8 pcfg_pull_none_drv_level_9 pcfg_pull_none_drv_level_10 pcfg_pull_none_drv_level_11 pcfg_pull_none_drv_level_12 pcfg_pull_none_drv_level_13 pcfg_pull_none_drv_level_14 pcfg_pull_none_drv_level_15 pcfg_pull_up_drv_level_0 pcfg_pull_up_drv_level_1 pcfg_pull_up_drv_level_2 pcfg_pull_up_drv_level_3 pcfg_pull_up_drv_level_4 pcfg_pull_up_drv_level_5 pcfg_pull_up_drv_level_6 pcfg_pull_up_drv_level_7 pcfg_pull_up_drv_level_8 pcfg_pull_up_drv_level_9 pcfg_pull_up_drv_level_10 pcfg_pull_up_drv_level_11 pcfg_pull_up_drv_level_12 pcfg_pull_up_drv_level_13 pcfg_pull_up_drv_level_14 pcfg_pull_up_drv_level_15 pcfg_pull_down_drv_level_0 pcfg_pull_down_drv_level_1 pcfg_pull_down_drv_level_2 pcfg_pull_down_drv_level_3 pcfg_pull_down_drv_level_4 pcfg_pull_down_drv_level_5 pcfg_pull_down_drv_level_6 pcfg_pull_down_drv_level_7 pcfg_pull_down_drv_level_8 pcfg_pull_down_drv_level_9 pcfg_pull_down_drv_level_10 pcfg_pull_down_drv_level_11 pcfg_pull_down_drv_level_12 pcfg_pull_down_drv_level_13 pcfg_pull_down_drv_level_14 pcfg_pull_down_drv_level_15 pcfg_pull_up_smt pcfg_pull_down_smt pcfg_pull_none_smt pcfg_pull_none_drv_level_0_smt pcfg_pull_none_drv_level_1_smt pcfg_pull_none_drv_level_2_smt pcfg_pull_none_drv_level_3_smt pcfg_pull_none_drv_level_4_smt pcfg_pull_none_drv_level_5_smt pcfg_output_high pcfg_output_low aupll_clkm0_pins aupll_clkm1_pins aupll_clkm2_pins cam_clk0m0_clk0 cam_clk0m1_clk0 cam_clk1m0_clk1 cam_clk1m1_clk1 cam_clk2m0_clk2 cam_clk2m1_clk2 can0m0_pins can0m1_pins can0m2_pins can0m3_pins can1m0_pins can1m1_pins can1m2_pins can1m3_pins clk0_32k_pins clk1_32k_pins clk_32k_pins cpubig_pins cpulit_pins debug0_test_pins debug1_test_pins debug2_test_pins debug3_test_pins debug4_test_pins debug5_test_pins debug6_test_pins debug7_test_pins dpm0_pins dpm1_pins dsm_audm0_ln dsm_audm0_lp dsm_audm0_rn dsm_audm0_rp dsm_audm1_ln dsm_audm1_lp dsm_audm1_rn dsm_audm1_rp dsmc_clkn dsmc_clkp dsmc_csn0 dsmc_csn1 dsmc_csn2 dsmc_csn3 dsmc_data0 dsmc_data1 dsmc_data2 dsmc_data3 dsmc_data4 dsmc_data5 dsmc_data6 dsmc_data7 dsmc_data8 dsmc_data9 dsmc_data10 dsmc_data11 dsmc_data12 dsmc_data13 dsmc_data14 dsmc_data15 dsmc_dqs0 dsmc_dqs1 dsmc_int0 dsmc_int1 dsmc_int2 dsmc_int3 dsmc_rdyn dsmc_resetn dsmc_testclk_out dsmc_testdata_out edp_txm0_pins edp_txm1_pins emmc_rstnout emmc_bus8 emmc_clk emmc_cmd emmc_strb emmc_testclk_test emmc_testdata_test eth0m0_miim eth0m0_rx_bus2 eth0m0_tx_bus2 eth0m0_rgmii_clk eth0m0_rgmii_bus eth0m0_mclk eth0m0_ppsclk eth0m0_ppstrig eth0m1_miim eth0m1_rx_bus2 eth0m1_tx_bus2 eth0m1_rgmii_clk eth0m1_rgmii_bus eth0m1_mclk eth0m1_ppsclk eth0m1_ppstrig eth1m0_miim eth1m0_rx_bus2 eth1m0_tx_bus2 eth1m0_rgmii_clk eth1m0_rgmii_bus eth1m0_mclk eth1m0_ppsclk eth1m0_ppstrig eth1m1_miim eth1m1_rx_bus2 eth1m1_tx_bus2 eth1m1_rgmii_clk eth1m1_rgmii_bus eth1m1_mclk eth1m1_ppsclk eth1m1_ppstrig eth0m0_ptp_refclk eth0m1_ptp_refclk eth0_testrxclkm0_test eth0_testrxclkm1_test eth0_testrxdm0_test eth0_testrxdm1_test eth1m0_ptp_refclk eth1m1_ptp_refclk eth1_testrxclkm0_test eth1_testrxclkm1_test eth1_testrxdm0_test eth1_testrxdm1_test ethm0_clk0_25m_out ethm1_clk0_25m_out ethm0_clk1_25m_out ethm1_clk1_25m_out flexbus0m0_csn flexbus0m0_d13 flexbus0m0_d14 flexbus0m0_d15 flexbus0m1_csn flexbus0m1_d13 flexbus0m1_d14 flexbus0m1_d15 flexbus0m2_csn flexbus0m3_csn flexbus0m4_csn flexbus0_clk flexbus0_d10 flexbus0_d11 flexbus0_d12 flexbus0_d0 flexbus0_d1 flexbus0_d2 flexbus0_d3 flexbus0_d4 flexbus0_d5 flexbus0_d6 flexbus0_d7 flexbus0_d8 flexbus0_d9 flexbus1m0_csn flexbus1m0_d12 flexbus1m0_d13 flexbus1m0_d14 flexbus1m0_d15 flexbus1m1_csn flexbus1m1_d12 flexbus1m1_d13 flexbus1m1_d14 flexbus1m1_d15 flexbus1m2_csn flexbus1m3_csn flexbus1m4_csn flexbus1_clk flexbus1_d10 flexbus1_d11 flexbus1_d0 flexbus1_d1 flexbus1_d2 flexbus1_d3 flexbus1_d4 flexbus1_d5 flexbus1_d6 flexbus1_d7 flexbus1_d8 flexbus1_d9 flexbus0_testclk_testclk flexbus0_testdata_testdata flexbus1_testclk_testclk flexbus1_testdata_testdata fspi0_pins fspi0_csn0 fspi0_csn1 fspi1m0_pins fspi1m0_csn0 fspi1m1_pins fspi1m1_csn0 fspi1m1_csn1 fspi0_testclk_test fspi0_testdata_test fspi1_testclkm1_test fspi1_testdatam1_test gpu_pins hdmi_txm0_pins hdmi_txm1_pins hdmi_tx_scl hdmi_tx_sda i2c0m0_xfer i2c0m1_xfer i2c1m0_xfer i2c1m1_xfer i2c2m0_xfer i2c2m1_xfer i2c2m2_xfer i2c2m3_xfer i2c3m0_xfer i2c3m1_xfer i2c3m2_xfer i2c3m3_xfer i2c4m0_xfer i2c4m1_xfer i2c4m2_xfer i2c4m3_xfer i2c5m0_xfer i2c5m1_xfer i2c5m2_xfer i2c5m3_xfer i2c6m0_xfer i2c6m1_xfer i2c6m2_xfer i2c6m3_xfer i2c7m0_xfer i2c7m1_xfer i2c7m2_xfer i2c7m3_xfer i2c8m0_xfer i2c8m1_xfer i2c8m2_xfer i2c8m3_xfer i2c9m0_xfer i2c9m1_xfer i2c9m2_xfer i2c9m3_xfer i3c0m0_xfer i3c0m1_xfer i3c1m0_xfer i3c1m1_xfer i3c1m2_xfer i3c0_sdam0_pu i3c0_sdam1_pu i3c1_sdam0_pu i3c1_sdam1_pu i3c1_sdam2_pu isp_flashm0_pins isp_flashm1_pins isp_prelightm0_pins isp_prelightm1_pins jtagm0_pins jtagm1_pins mipim0_pins mipim1_pins mipim2_pins mipim3_pins npu_pins pcie0m0_pins pcie0m1_pins pcie0m2_pins pcie0m3_pins pcie0_buttonrst pcie1m0_pins pcie1m1_pins pcie1m2_pins pcie1m3_pins pcie1_buttonrst pdm0m0_clk0 pdm0m0_clk1 pdm0m0_sdi0 pdm0m0_sdi1 pdm0m0_sdi2 pdm0m0_sdi3 pdm0m1_clk0 pdm0m1_clk1 pdm0m1_sdi0 pdm0m1_sdi1 pdm0m1_sdi2 pdm0m1_sdi3 pdm0m2_clk0 pdm0m2_clk1 pdm0m2_sdi0 pdm0m2_sdi1 pdm0m2_sdi2 pdm0m2_sdi3 pdm0m3_clk0 pdm0m3_clk1 pdm0m3_sdi0 pdm0m3_sdi1 pdm0m3_sdi2 pdm0m3_sdi3 pdm1m0_clk0 pdm1m0_clk1 pdm1m0_sdi0 pdm1m0_sdi1 pdm1m0_sdi2 pdm1m0_sdi3 pdm1m1_clk0 pdm1m1_clk1 pdm1m1_sdi0 pdm1m1_sdi1 pdm1m1_sdi2 pdm1m1_sdi3 pdm1m2_clk0 pdm1m2_clk1 pdm1m2_sdi0 pdm1m2_sdi1 pdm1m2_sdi2 pdm1m2_sdi3 pmu_debug_test_pins pwm0m0_ch0 pwm0m0_ch1 pwm0m1_ch0 pwm0m1_ch1 pwm0m2_ch0 pwm0m2_ch1 pwm0m3_ch0 pwm0m3_ch1 pwm1m0_ch0 pwm1m0_ch1 pwm1m0_ch2 pwm1m0_ch3 pwm1m0_ch4 pwm1m0_ch5 pwm1m1_ch0 pwm1m1_ch1 pwm1m1_ch2 pwm1m1_ch3 pwm1m1_ch4 pwm1m1_ch5 pwm1m2_ch0 pwm1m2_ch1 pwm1m2_ch2 pwm1m2_ch3 pwm1m2_ch4 pwm1m2_ch5 pwm1m3_ch0 pwm1m3_ch1 pwm1m3_ch2 pwm1m3_ch3 pwm1m3_ch4 pwm1m3_ch5 pwm2m0_ch0 pwm2m0_ch1 pwm2m0_ch2 pwm2m0_ch3 pwm2m0_ch4 pwm2m0_ch5 pwm2m0_ch6 pwm2m0_ch7 pwm2m1_ch0 pwm2m1_ch1 pwm2m1_ch2 pwm2m1_ch3 pwm2m1_ch4 pwm2m1_ch5 pwm2m1_ch6 pwm2m1_ch7 pwm2m2_ch0 pwm2m2_ch1 pwm2m2_ch2 pwm2m2_ch3 pwm2m2_ch4 pwm2m2_ch5 pwm2m2_ch6 pwm2m2_ch7 pwm2m3_ch0 pwm2m3_ch1 pwm2m3_ch2 pwm2m3_ch3 pwm2m3_ch4 pwm2m3_ch5 pwm2m3_ch6 pwm2m3_ch7 ref_clk0_clk0 ref_clk1_clk1 ref_clk2_clk2 sai0m0_lrck sai0m0_mclk sai0m0_sclk sai0m0_sdi0 sai0m0_sdi1 sai0m0_sdi2 sai0m0_sdi3 sai0m0_sdo0 sai0m0_sdo1 sai0m0_sdo2 sai0m0_sdo3 sai0m1_lrck sai0m1_mclk sai0m1_sclk sai0m1_sdi0 sai0m1_sdi1 sai0m1_sdi2 sai0m1_sdi3 sai0m1_sdo0 sai0m1_sdo1 sai0m1_sdo2 sai0m1_sdo3 sai0m2_lrck sai0m2_mclk sai0m2_sclk sai0m2_sdi0 sai0m2_sdi1 sai0m2_sdi2 sai0m2_sdi3 sai0m2_sdo0 sai0m2_sdo1 sai0m2_sdo2 sai0m2_sdo3 sai1m0_lrck sai1m0_mclk sai1m0_sclk sai1m0_sdi0 sai1m0_sdi1 sai1m0_sdi2 sai1m0_sdi3 sai1m0_sdo0 sai1m0_sdo1 sai1m0_sdo2 sai1m0_sdo3 sai1m1_lrck sai1m1_mclk sai1m1_sclk sai1m1_sdi0 sai1m1_sdi1 sai1m1_sdi2 sai1m1_sdi3 sai1m1_sdo0 sai1m1_sdo1 sai1m1_sdo2 sai1m1_sdo3 sai2m0_lrck sai2m0_mclk sai2m0_sclk sai2m0_sdi sai2m0_sdo sai2m1_lrck sai2m1_mclk sai2m1_sclk sai2m1_sdi sai2m1_sdo sai2m2_lrck sai2m2_mclk sai2m2_sclk sai2m2_sdi sai2m2_sdo sai3m0_lrck sai3m0_mclk sai3m0_sclk sai3m0_sdi sai3m0_sdo sai3m1_lrck sai3m1_mclk sai3m1_sclk sai3m1_sdi sai3m1_sdo sai3m2_lrck sai3m2_mclk sai3m2_sclk sai3m2_sdi sai3m2_sdo sai3m3_lrck sai3m3_mclk sai3m3_sclk sai3m3_sdi sai3m3_sdo sai4m0_lrck sai4m0_mclk sai4m0_sclk sai4m0_sdi sai4m0_sdo sai4m1_lrck sai4m1_mclk sai4m1_sclk sai4m1_sdi sai4m1_sdo sai4m2_lrck sai4m2_mclk sai4m2_sclk sai4m2_sdi sai4m2_sdo sai4m3_lrck sai4m3_mclk sai4m3_sclk sai4m3_sdi sai4m3_sdo sata30_sata sata30_port0m0_port0 sata30_port0m1_port0 sata30_port1m0_port1 sata30_port1m1_port1 sdmmc0_bus4 sdmmc0_clk sdmmc0_cmd sdmmc0_det sdmmc0_pwren sdmmc1m0_bus4 sdmmc1m0_clk sdmmc1m0_cmd sdmmc1m0_det sdmmc1m0_pwren sdmmc1m1_bus4 sdmmc1m1_clk sdmmc1m1_cmd sdmmc1m1_det sdmmc1m1_pwren sdmmc1m2_det sdmmc0_testclk_test sdmmc0_testdata_test sdmmc1_testclkm0_test sdmmc1_testdatam0_test spdifm0_rx0 spdifm0_rx1 spdifm0_tx0 spdifm0_tx1 spdifm1_rx0 spdifm1_rx1 spdifm1_tx0 spdifm1_tx1 spdifm2_rx0 spdifm2_rx1 spdifm2_tx0 spdifm2_tx1 spi0m0_pins spi0m0_csn0 spi0m0_csn1 spi0m1_pins spi0m1_csn0 spi0m1_csn1 spi0m2_pins spi0m2_csn0 spi0m2_csn1 spi1m0_csn1 spi1m2_pins spi1m2_csn0 spi1m2_csn1 spi2m0_pins spi2m0_csn0 spi2m0_csn1 spi2m1_pins spi2m1_csn0 spi2m1_csn1 spi2m2_pins spi2m2_csn0 spi2m2_csn1 spi3m0_pins spi3m0_csn0 spi3m0_csn1 spi3m1_pins spi3m1_csn0 spi3m1_csn1 spi3m2_pins spi3m2_csn0 spi3m2_csn1 spi4m0_pins spi4m0_csn0 spi4m0_csn1 spi4m1_pins spi4m1_csn0 spi4m1_csn1 spi4m2_pins spi4m2_csn0 spi4m2_csn1 spi4m3_pins spi4m3_csn0 spi4m3_csn1 test_clk_pins tsadcm0_pins tsadcm1_pins tsadc_ctrl_pins uart0m0_xfer uart0m1_xfer uart1m0_xfer uart1m0_ctsn uart1m0_rtsn uart1m1_xfer uart1m1_ctsn uart1m1_rtsn uart1m2_xfer uart1m2_ctsn uart1m2_rtsn uart2m0_xfer uart2m0_ctsn uart2m0_rtsn uart2m1_xfer uart2m1_ctsn uart2m1_rtsn uart2m2_xfer uart2m2_ctsn uart2m2_rtsn uart3m0_xfer uart3m0_ctsn uart3m0_rtsn uart3m1_xfer uart3m1_ctsn uart3m1_rtsn uart3m2_xfer uart3m2_ctsn uart3m2_rtsn uart4m0_xfer uart4m0_ctsn uart4m0_rtsn uart4m1_xfer uart4m1_ctsn uart4m1_rtsn uart4m2_xfer uart5m0_xfer uart5m0_ctsn uart5m0_rtsn uart5m1_xfer uart5m1_ctsn uart5m1_rtsn uart5m2_xfer uart5m2_ctsn uart5m2_rtsn uart6m0_xfer uart6m0_ctsn uart6m0_rtsn uart6m1_xfer uart6m1_ctsn uart6m1_rtsn uart6m2_xfer uart6m2_ctsn uart6m2_rtsn uart6m3_xfer uart7m0_xfer uart7m0_ctsn uart7m0_rtsn uart7m1_xfer uart7m1_ctsn uart7m1_rtsn uart7m2_xfer uart8m0_xfer uart8m0_ctsn uart8m0_rtsn uart8m1_xfer uart8m1_ctsn uart8m1_rtsn uart8m2_xfer uart9m0_xfer uart9m0_ctsn uart9m0_rtsn uart9m1_xfer uart9m1_ctsn uart9m1_rtsn uart9m2_xfer uart10m0_xfer uart10m0_ctsn uart10m0_rtsn uart10m1_xfer uart10m1_ctsn uart10m1_rtsn uart10m2_xfer uart11m0_xfer uart11m0_ctsn uart11m0_rtsn uart11m1_xfer uart11m1_ctsn uart11m1_rtsn uart11m2_xfer ufs_refclk ufs_rst ufs_rstgpio ufs_testdata0_test ufs_testdata1_test ufs_testdata2_test ufs_testdata3_test vi_cif_pins vo_lcdc_pins vo_post_pins vp0_sync_pins vp1_sync_pins vp2_sync_pins pmic_pins bt1120_pins bt656_pins rgb3x8_pins_m0 rgb3x8_pins_m1 rgb565_pins rgb666_pins rgb888_pins vo_ebc_pins vo_ebc_extern gmac0_rst gmac1_rst hp_det_l hym8563_int led_rgb_r led_rgb_g pcie_pwr_en pcie_reset usb_host_pwren usb_otg0_pwren usbc0_interrupt usbc0_sbu1 usbc0_sbu2 bt_reg_on host_wake_bt bt_wake_host wifi_wake_host wifi_reg_on pmu_a53 pmu_a72 thermal_zones package_thermal package_crit bigcore_thermal bigcore_alert bigcore_crit littlecore_thermal littlecore_alert littlecore_crit gpu_thermal gpu_alert gpu_crit npu_thermal npu_crit ddr_thermal ddr_crit pcie0 pcie0_intc pcie1 pcie1_intc usb_drd0_dwc3 usb_drd0_hs_ep usb_drd0_ss_ep usb_drd1_dwc3 sys_grf bigcore_grf litcore_grf cci_grf gpu_grf npu_grf vo0_grf usb_grf php_grf pmu0_grf pmu1_grf pipe_phy0_grf pipe_phy1_grf usbdpphy_grf usb2phy_grf u2phy0 u2phy0_otg u2phy1 u2phy1_otg hdptxphy_grf mipidcphy_grf vo1_grf sdgmac_grf ioc_grf cru uart1 power gpu vdec vdec_mmu vop vop_out vp0 vp0_out_hdmi vp1 vp2 vop_mmu sai5 sai6 dsi dsi_in dsi_out hdmi_in hdmi_in_vp0 hdmi_out hdmi_out_con sai7 sai8 sai9 qos_hdcp1 qos_fspi1 qos_gmac0 qos_gmac1 qos_sdio qos_sdmmc qos_flexbus qos_gpu qos_vepu1 qos_npu_mcu qos_npu_nsp0 qos_npu_nsp1 qos_emmc qos_fspi0 qos_mmu0 qos_mmu1 qos_rkvdec qos_crypto qos_mmu2 qos_ufshc qos_vepu0 qos_isp_mro qos_isp_mwo qos_vicap_m0 qos_vpss_mro qos_vpss_mwo qos_hdcp0 qos_vop_m0 qos_vop_m1ro qos_ebc qos_rga0 qos_rga1 qos_jpeg qos_vdpp qos_npu_m0 qos_npu_m1 qos_npu_m0ro qos_npu_m1ro mdio0 rgmii_phy0 gmac0_stmmac_axi_setup gmac0_mtl_rx_setup gmac0_mtl_tx_setup mdio1 rgmii_phy1 gmac1_stmmac_axi_setup gmac1_mtl_rx_setup gmac1_mtl_tx_setup sata0 sata1 sfc1 sdhci sfc0 rng otp cpu_code otp_cpu_version otp_id cpub_leakage cpul_leakage npu_leakage gpu_leakage log_leakage bigcore_tsadc_trim litcore_tsadc_trim ddr_tsadc_trim npu_tsadc_trim gpu_tsadc_trim soc_tsadc_trim sai0 sai1 sai2 sai3 sai4 gic dmac0 dmac1 dmac2 rk806_dvs1_null rk806_dvs2_null rk806_dvs3_null rk806_dvs1_slp rk806_dvs1_pwrdn rk806_dvs1_rst rk806_dvs2_slp rk806_dvs2_pwrdn rk806_dvs2_rst rk806_dvs2_dvs rk806_dvs2_gpio rk806_dvs3_slp rk806_dvs3_pwrdn rk806_dvs3_rst rk806_dvs3_dvs rk806_dvs3_gpio vdd_cpu_big_s0 vdd_npu_s0 vdd_cpu_lit_s0 vcc_3v3_s3 vdd_gpu_s0 vddq_ddr_s0 vdd_logic_s0 vcc_1v8_s3 vdd2_ddr_s3 vdd_ddr_s0 vcca_1v8_s0 vcca1v8_pldo2_s0 vdda_1v2_s0 vcca_3v3_s0 vccio_sd_s0 vcca1v8_pldo6_s3 vdd_0v75_s3 vdda_ddr_pll_s0 vdda0v75_hdmi_s0 vdda_0v85_s0 vdda_0v75_s0 usbc0 usbc0_hs_ep usbc0_ss_ep usbc0_dp_ep hym8563 es8388 timer0 wdt uart0 uart2 uart3 uart4 uart5 uart6 uart7 uart8 uart9 saradc tsadc uart10 uart11 mipidcphy combphy0_ps combphy1_psu usbdp_phy usbdp_phy_ep hdptxphy rkvdec_sram scmi_shmem hdmi_con_in leds green_led red_led es8388_sound vcc_12v0_dcin vcc_1v1_nldo_s3 vcc_1v2_ufs_vccq_s0 vcc_1v8_s0 vcc_1v8_ufs_vccq2_s0 vcc_2v0_pldo_s3 vcc_3v3_pcie vcc_3v3_s0 vcc_5v0_sys vcc_5v0_device vcc_5v0_typec0 vcc_5v0_usbhost vcc_3v3_ufs_s0 sdio_pwrseq 