  w   8  o   (            b  oh                                 rockchip,r88 rockchip,rk3368                                     +            7Rockchip R88       aliases          =/pinctrl/gpio@ff750000           C/pinctrl/gpio@ff780000           I/pinctrl/gpio@ff790000           O/pinctrl/gpio@ff7a0000           U/i2c@ff650000            Z/i2c@ff660000            _/i2c@ff140000            d/i2c@ff150000            i/i2c@ff160000            n/i2c@ff170000            s/serial@ff180000             {/serial@ff190000             /serial@ff690000             /serial@ff1b0000             /serial@ff1c0000             /spi@ff110000            /spi@ff120000            /spi@ff130000            /ethernet@ff290000           /mmc@ff0d0000            /mmc@ff0f0000         cpus                         +       cpu-map    cluster0       core0                     core1                     core2                     core3                        cluster1       core0                     core1                     core2                     core3               	            cpu@0            cpu           arm,cortex-a53                            psci                                  cpu@1            cpu           arm,cortex-a53                           psci                                  cpu@2            cpu           arm,cortex-a53                           psci                                  cpu@3            cpu           arm,cortex-a53                           psci                            	      cpu@100          cpu           arm,cortex-a53                           psci                                  cpu@101          cpu           arm,cortex-a53                          psci                                  cpu@102          cpu           arm,cortex-a53                          psci                                  cpu@103          cpu           arm,cortex-a53                          psci                                     display-subsystem             rockchip,display-subsystem              
      	   disabled          arm-pmu           arm,cortex-a53-pmu        `         p          q          r          s          t          u          v          w                        	                  psci              arm,psci-0.2             smc       timer             arm,armv8-timer       0                                
        oscillator            fixed-clock         "n6         2xin24m          E                E      mmc@ff0c0000          0    rockchip,rk3368-dw-mshc rockchip,rk3288-dw-mshc                      @         Rр         `           D      r      v        gbiu ciu ciu-drive ciu-sample            s                              ~              reset         	   disabled          mmc@ff0d0000          0    rockchip,rk3368-dw-mshc rockchip,rk3288-dw-mshc                      @         Rр         `           E      s      w        gbiu ciu ciu-drive ciu-sample            s                  !           ~              reset            okay                  E                                                                                default                          '           3         mmc@ff0f0000          0    rockchip,rk3368-dw-mshc rockchip,rk3288-dw-mshc                      @         Rр         `           G      u      y        gbiu ciu ciu-drive ciu-sample            s                  #           ~              reset            okay                        @                            default                        saradc@ff100000           rockchip,saradc                                      $           R           `      I     [        gsaradc apb_pclk         ~      W        saradc-apb           okay            d         spi@ff110000          (    rockchip,rk3368-spi rockchip,rk3066-spi                               `      A     R        gspiclk apb_pclk                ,           default                                          +          	   disabled          spi@ff120000          (    rockchip,rk3368-spi rockchip,rk3066-spi                               `      B     S        gspiclk apb_pclk                -           default                                          +          	   disabled          spi@ff130000          (    rockchip,rk3368-spi rockchip,rk3066-spi                               `      C     T        gspiclk apb_pclk                )           default                   !   "                     +          	   disabled          i2c@ff140000          (    rockchip,rk3368-i2c rockchip,rk3288-i2c                                      >                        +            gi2c         `     N        default            #      	   disabled          i2c@ff150000          (    rockchip,rk3368-i2c rockchip,rk3288-i2c                                      ?                        +            gi2c         `     O        default            $      	   disabled          i2c@ff160000          (    rockchip,rk3368-i2c rockchip,rk3288-i2c                                      @                        +            gi2c         `     P        default            %      	   disabled          i2c@ff170000          (    rockchip,rk3368-i2c rockchip,rk3288-i2c                                      A                        +            gi2c         `     Q        default            &      	   disabled          serial@ff180000       &    rockchip,rk3368-uart snps,dw-apb-uart                                 "n6         `      M     U        gbaudclk apb_pclk                   7           p           z         	   disabled          serial@ff190000       &    rockchip,rk3368-uart snps,dw-apb-uart                                 "n6         `      N     V        gbaudclk apb_pclk                   8           p           z         	   disabled          serial@ff1b0000       &    rockchip,rk3368-uart snps,dw-apb-uart                                 "n6         `      P     X        gbaudclk apb_pclk                   :           p           z         	   disabled          serial@ff1c0000       &    rockchip,rk3368-uart snps,dw-apb-uart                                 "n6         `      Q     Y        gbaudclk apb_pclk                   ;           p           z         	   disabled          dma-controller@ff250000           arm,pl330 arm,primecell              %        @                                                                  `            	  gapb_pclk          thermal-zones      cpu-thermal            d                     '       trips      cpu_alert0           $                   passive             (      cpu_alert1           8                   passive             )      cpu_crit             s                	   critical             cooling-maps       map0               (      0                    map1               )      0              	            gpu-thermal            d                     '      trips      gpu_alert0           8                   passive             *      gpu_crit             8                	   critical             cooling-maps       map0               *      0                             tsadc@ff280000            rockchip,rk3368-tsadc                (                        %           `      H     Z        gtsadc apb_pclk          ~            
  tsadc-apb           init default sleep             +        #   ,        -   +        7           M s         okay            d            {                '      ethernet@ff290000             rockchip,rk3368-gmac                 )                                   macirq             -      8  `            f      g      c                 ]      M  gstmmaceth mac_clk_rx mac_clk_tx clk_mac_ref clk_mac_refout aclk_mac pclk_mac            ~      B      
  stmmaceth            okay               .        rmii            output             /                              ' B@        default            0           0              mdio              snps,dwmac-mdio                      +             usb@ff500000              generic-ehci                 P                                   `              okay          usb@ff580000          2    rockchip,rk3368-usb rockchip,rk3066-usb snps,dwc2                X                                   `             gotg         !host            )           ;          J            @   @             okay          dma-controller@ff600000           arm,pl330 arm,primecell              `        @                                                                   `            	  gapb_pclk                F      i2c@ff650000          (    rockchip,rk3368-i2c rockchip,rk3288-i2c              e                 `     L        gi2c                <           default            1                     +             okay       syr827@40             silergy,syr827              @        Y           vvdd_cpu           ,         
4         `          @                             2      rtc@51            haoyu,hym8563               Q        E            2xin32k              ]         i2c@ff660000          (    rockchip,rk3368-i2c rockchip,rk3288-i2c              f                        =                        +            gi2c         `     M        default            3      	   disabled          pwm@ff680000          (    rockchip,rk3368-pwm rockchip,rk3288-pwm              h                            default            4        `     _      	   disabled          pwm@ff680010          (    rockchip,rk3368-pwm rockchip,rk3288-pwm              h                           default            5        `     _      	   disabled          pwm@ff680020          (    rockchip,rk3368-pwm rockchip,rk3288-pwm              h                            `     _      	   disabled          pwm@ff680030          (    rockchip,rk3368-pwm rockchip,rk3288-pwm              h 0                          default            6        `     _      	   disabled          serial@ff690000       &    rockchip,rk3368-uart snps,dw-apb-uart                i                 `      O     W        gbaudclk apb_pclk                   9           default            7        p           z            okay          mbox@ff6b0000             rockchip,rk3368-mailbox              k               0                                                  `     E        gpclk_mailbox            "         	   disabled          power-management@ff730000         &    rockchip,rk3368-pmu syscon simple-mfd                s            power-controller          !    rockchip,rk3368-power-controller            .                        +                I   power-domain@12                     `                                                                             c     h     g     n     o     r     s     f     d      d      h      i      l      k      j      n      m      $  B   8   9   :   ;   <   =   >   ?   @        .          power-domain@14                      `                 o      p        B   A   B   C        .          power-domain@16                     `                  @        B   D        .                syscon@ff738000       )    rockchip,rk3368-pmugrf syscon simple-mfd                 s                    Q   io-domains        &    rockchip,rk3368-pmu-io-voltage-domain            okay            I           T         reboot-mode           syscon-reboot-mode          _           fRB         rRB        RB	        RB         clock-controller@ff760000             rockchip,rk3368-cru              v                 `   E        gxin24m             -        E                                syscon@ff770000       &    rockchip,rk3368-grf syscon simple-mfd                w                     -   io-domains        "    rockchip,rk3368-io-voltage-domain            okay                                                         watchdog@ff800000              rockchip,rk3368-wdt snps,dw-wdt                               `     p               O            okay          timer@ff810000        ,    rockchip,rk3368-timer rockchip,rk3288-timer                                       B           `     a      U        gpclk timer        spdif@ff880000            rockchip,rk3368-spdif                                        6           `      S           
  gmclk hclk              F           tx          default            G                  	   disabled          i2s-2ch@ff890000          (    rockchip,rk3368-i2s rockchip,rk3066-i2s                                      (           gi2s_clk i2s_hclk            `      T                F      F           tx rx                     	   disabled          i2s-8ch@ff898000          (    rockchip,rk3368-i2s rockchip,rk3066-i2s                                     5           gi2s_clk i2s_hclk            `      R                F       F           tx rx           default            H                  	   disabled          iommu@ff900800            rockchip,iommu                                                 `                   gaclk iface              I                     	   disabled          iommu@ff914000            rockchip,iommu                @            P                                  `                   gaclk iface                          I                  	   disabled          vop@ff930000              rockchip,rk3368-vop                                                                                6ׄ          `                         gaclk_vop dclk_vop hclk_vop          K   J            I           ~      d      e      f        axi ahb dclk          	   disabled       port                         +                
   endpoint@0                       R   K            N      endpoint@1                      R   L            P            iommu@ff930300            rockchip,iommu                                                 `                   gaclk iface              I                     	   disabled                J      dsi@ff960000          *    rockchip,rk3368-mipi-dsi snps,dw-mipi-dsi                        @                           `     d        gpclk            b   M        gdphy                I           ~      s        apb            -      	   disabled       ports                        +       port@0                  endpoint            R   N            K         port@1                          phy@ff968000              rockchip,rk3368-dsi-dphy                        @         `           s      	  gref pclk            q            ~      r        apb       	   disabled                M      hdmi@ff980000             rockchip,rk3368-dw-hdmi                                      g           `     h      m      n        giahb isfr cec           default            O            I           z              -      	   disabled       ports                        +       port@0                  endpoint            R   P            L         port@1                          iommu@ff9a0440            rockchip,iommu                @       @           @                          `                   gaclk iface                    	   disabled          iommu@ff9a0800            rockchip,iommu                                      	          
           `                   gaclk iface                    	   disabled          qos@ffad0000              rockchip,rk3368-qos syscon                                     8      qos@ffad0080              rockchip,rk3368-qos syscon                                    9      qos@ffad0100              rockchip,rk3368-qos syscon                                    :      qos@ffad0180              rockchip,rk3368-qos syscon                                   ;      qos@ffad0200              rockchip,rk3368-qos syscon                                    <      qos@ffad0280              rockchip,rk3368-qos syscon                                   =      qos@ffad0300              rockchip,rk3368-qos syscon                                    >      qos@ffad0380              rockchip,rk3368-qos syscon                                   ?      qos@ffad0400              rockchip,rk3368-qos syscon                                    @      qos@ffae0000              rockchip,rk3368-qos syscon                                     A      qos@ffae0100              rockchip,rk3368-qos syscon                                    B      qos@ffae0180              rockchip,rk3368-qos syscon                                   C      qos@ffaf0000              rockchip,rk3368-qos syscon                                     D      efuse@ffb00000            rockchip,rk3368-efuse                                               +           `     q        gpclk_efuse     cpu-leakage@17                       temp-adjust@1f                          interrupt-controller@ffb71000             arm,gic-400          |                              @                                 @             `                       	                    pinctrl           rockchip,rk3368-pinctrl            -           Q                     +               gpio@ff750000             rockchip,gpio-bank               u                 `     @               Q                                |                       Z      gpio@ff780000             rockchip,gpio-bank               x                 `     A               R                                |                 gpio@ff790000             rockchip,gpio-bank               y                 `     B               S                                |                       X      gpio@ff7a0000             rockchip,gpio-bank               z                 `     C               T                                |                       /      pcfg-pull-up                         T      pcfg-pull-down                 pcfg-pull-none                       U      pcfg-pull-none-12ma                                 V      emmc       emmc-clk            
            R                  emmc-cmd            
            S                  emmc-pwr            
            T      emmc-bus1           
            T      emmc-bus4         @  
            T            T            T            T      emmc-bus8           
            S            S            S            S            S            S            S            S                  emmc-reset          
             U            W         gmac       rgmii-pins          
            U            U            U            V      	      V      
      V            V            V            V            U            U            U            U            U            U      rmii-pins           
            U            U            U            V      	      V            V            U            U            U            U            0         hdmi       hdmi-i2c-xfer            
            U            U            O         i2c0       i2c0-xfer            
             U             U            1         i2c1       i2c1-xfer            
            U            U            3         i2c2       i2c2-xfer            
       	      U            U            #         i2c3       i2c3-xfer            
            U            U            $         i2c4       i2c4-xfer            
            U            U            %         i2c5       i2c5-xfer            
            U            U            &         i2s    i2s-8ch-bus         
            U            U            U            U            U            U            U            U            U            H         pwm0       pwm0-pin            
            U            4         pwm1       pwm1-pin            
             U            5         pwm3       pwm3-pin            
            U            6         sdio0      sdio0-bus1          
            T      sdio0-bus4        @  
            T            T            T            T                  sdio0-cmd           
             T                  sdio0-clk           
            U                  sdio0-cd            
            T      sdio0-wp            
            T      sdio0-pwr           
            T      sdio0-bkpwr         
            T      sdio0-int           
            T         sdmmc      sdmmc-clk           
      	      U      sdmmc-cmd           
      
      T      sdmmc-cd            
            T      sdmmc-bus1          
            T      sdmmc-bus4        @  
            T            T            T            T         spdif      spdif-tx            
            U            G         spi0       spi0-clk            
            T                  spi0-cs0            
            T                  spi0-cs1            
            T      spi0-tx         
            T                  spi0-rx         
            T                     spi1       spi1-clk            
            T                  spi1-cs0            
            T                  spi1-cs1            
            T      spi1-rx         
            T                  spi1-tx         
            T                     spi2       spi2-clk            
             T                  spi2-cs0            
             T            "      spi2-rx         
       
      T            !      spi2-tx         
             T                      tsadc      otp-pin         
              U            +      otp-out         
             U            ,         uart0      uart0-xfer           
            T            U      uart0-cts           
            U      uart0-rts           
            U         uart1      uart1-xfer           
             T             U      uart1-cts           
             U      uart1-rts           
             U         uart2      uart2-xfer           
            T            U            7         uart3      uart3-xfer           
            T            U      uart3-cts           
            U      uart3-rts           
            U         uart4      uart4-xfer           
             T             U      uart4-cts           
             U      uart4-rts           
             U         pcfg-pull-none-drv-8ma                                  R      pcfg-pull-up-drv-8ma                                    S      ir     ir-int          
             T            \         keys       pwr-key         
              T            Y         leds       stby-pwren          
              U      led-ctl         
             U            [         sdio       wifi-reg-on         
             U            _      bt-rst          
             U            ^         usb    host-vbus-drv           
              U            `            chosen          serial2:115200n8          memory@0             memory                       @         emmc-pwrseq           mmc-pwrseq-emmc            W        default         $   X                         gpio-keys         
    gpio-keys           default            Y   key-power            0        *   Z              >GPIO Power          D   t         gpio-leds         
    gpio-leds      led-0           *   /               >r88:green:led           default            [         ir-receiver           gpio-ir-receiver            *   /              default            \      sdio-pwrseq           mmc-pwrseq-simple           `   ]      
  gext_clock           default            ^   _        $   /         /                        regulator-vcc18           regulator-fixed         vvcc_18           w@         w@                             2                  regulator-vcc-host            regulator-fixed          O           Z               default            `      	  vvcc_host                                 2      regulator-vcc-io              regulator-fixed         vvcc_io           2Z         2Z                             2                  regulator-vcc-lan             regulator-fixed         vvcc_lan          2Z         2Z                                         .      regulator-vcc-sys             regulator-fixed         vvcc_sys          LK@         LK@                              2      regulator-vccio-wl            regulator-fixed       	  vvccio_wl             2Z         2Z                                               regulator-vdd-10              regulator-fixed         vvdd_10           B@         B@                             2         	compatible interrupt-parent #address-cells #size-cells model gpio0 gpio1 gpio2 gpio3 i2c0 i2c1 i2c2 i2c3 i2c4 i2c5 serial0 serial1 serial2 serial3 serial4 spi0 spi1 spi2 ethernet0 mmc0 mmc1 cpu device_type reg enable-method #cooling-cells phandle ports status interrupts interrupt-affinity clock-frequency clock-output-names #clock-cells max-frequency clocks clock-names fifo-depth resets reset-names assigned-clocks assigned-clock-parents bus-width cap-sd-highspeed cap-sdio-irq keep-power-in-suspend mmc-pwrseq non-removable pinctrl-names pinctrl-0 vmmc-supply vqmmc-supply cap-mmc-highspeed #io-channel-cells vref-supply reg-shift reg-io-width #dma-cells arm,pl330-broken-no-flushp arm,pl330-periph-burst polling-delay-passive polling-delay thermal-sensors temperature hysteresis trip cooling-device pinctrl-1 pinctrl-2 #thermal-sensor-cells rockchip,hw-tshut-temp rockchip,hw-tshut-mode rockchip,hw-tshut-polarity interrupt-names rockchip,grf phy-supply phy-mode clock_in_out snps,reset-gpio snps,reset-active-low snps,reset-delays-us tx_delay rx_delay dr_mode g-np-tx-fifo-size g-rx-fifo-size g-tx-fifo-size fcs,suspend-voltage-selector regulator-name regulator-enable-ramp-delay regulator-min-microvolt regulator-max-microvolt regulator-ramp-delay regulator-always-on regulator-boot-on vin-supply #pwm-cells #mbox-cells #power-domain-cells pm_qos pmu-supply vop-supply offset mode-normal mode-recovery mode-bootloader mode-loader #reset-cells audio-supply gpio30-supply gpio1830-supply wifi-supply dmas dma-names #sound-dai-cells power-domains #iommu-cells rockchip,disable-mmu-reset assigned-clock-rates iommus remote-endpoint phys phy-names #phy-cells interrupt-controller #interrupt-cells rockchip,pmu ranges gpio-controller #gpio-cells bias-pull-up bias-pull-down bias-disable drive-strength rockchip,pins stdout-path reset-gpios wakeup-source label linux,code enable-active-high 