  /   8  +   (              +h                                                          Microchip PolarFire-SoC SEV Kit       &   !microchip,mpfs-sev-kit microchip,mpfs      cpus                                       , B@   cpu@0             !sifive,e51 sifive,rocket0 riscv          ?cpu          K   @         ^            k  @          x          	   |rv64imac             rv64i         $   i m a c zicntr zicsr zifencei zihpm                       	   disabled                   interrupt-controller                         !riscv,cpu-intc                        
         cpu@1         #   !sifive,u54-mc sifive,rocket0 riscv              @            @                                           ?cpu          K   @         ^   @         k           )           4            ?riscv,sv39           x            |rv64imafdc           rv64i         (   i m a f d c zicntr zicsr zifencei zihpm                          H        R            okay                   interrupt-controller                         !riscv,cpu-intc                                 cpu@2         #   !sifive,u54-mc sifive,rocket0 riscv              @            @                                           ?cpu          K   @         ^   @         k           )           4            ?riscv,sv39           x            |rv64imafdc           rv64i         (   i m a f d c zicntr zicsr zifencei zihpm                          H        R            okay                   interrupt-controller                         !riscv,cpu-intc                                 cpu@3         #   !sifive,u54-mc sifive,rocket0 riscv              @            @                                           ?cpu          K   @         ^   @         k           )           4            ?riscv,sv39           x            |rv64imafdc           rv64i         (   i m a f d c zicntr zicsr zifencei zihpm                          H        R            okay                   interrupt-controller                         !riscv,cpu-intc                                 cpu@4         #   !sifive,u54-mc sifive,rocket0 riscv              @            @                                           ?cpu          K   @         ^   @         k           )           4            ?riscv,sv39           x            |rv64imafdc           rv64i         (   i m a f d c zicntr zicsr zifencei zihpm                          H        R            okay                   interrupt-controller                         !riscv,cpu-intc                                 cpu-map    cluster0       core0           c         core1           c         core2           c         core3           c         core4           c                  mssrefclk            !fixed-clock         g            tsY@                  syscontroller            !microchip,mpfs-sys-controller                           okay          mssclkclk            !fixed-clock         g            tĴ                   soc                                   !simple-bus              cache-controller@2010000          5   !microchip,mpfs-ccache sifive,fu540-c000-ccache cache             x                      M   @                    `            m                        	                                      clint@2000000         &   !sifive,fu540-c000-clint sifive,clint0            x                    P     
      
                                                         interrupt-controller@c000000          )   !sifive,fu540-c000-plic sifive,plic-1.0.0             x                                                        H     
               	            	            	            	                       	      dma-controller@3000000        !   !microchip,mpfs-pdma sifive,pdma0             x                         	                        	   
                                  clkcfg@20002000          !microchip,mpfs-clkcfg             x                   >                             g                                clock-controller@38010000            !microchip,mpfs-ccc        @   x    8             8             9             9                 g         	   disabled          clock-controller@38040000            !microchip,mpfs-ccc        @   x    8             8             9             9                 g         	   disabled          clock-controller@38100000            !microchip,mpfs-ccc        @   x    8             8              9             9                  g         	   disabled          clock-controller@38400000            !microchip,mpfs-ccc        @   x    8@             8             9@             9                 g         	   disabled          serial@20000000       	   !ns16550a             x                                                	           Z        #                       	   disabled          serial@20100000       	   !ns16550a             x                                               	           [        #                 	         okay          serial@20102000       	   !ns16550a             x                                               	           \        #                 
         okay          serial@20104000       	   !ns16550a             x     @                                         	           ]        #                          okay          serial@20106000       	   !ns16550a             x     `                                         	           ^                       #           okay          mmc@20008000              !microchip,mpfs-sd4hc cdns,sd4hc          x                         	           X                       1          okay            ?            I         T         e         w                                                   spi@20108000             !microchip,mpfs-spi                                     x                        	           6                     	   disabled          spi@20109000             !microchip,mpfs-spi                                     x                        	           7                     	   disabled          spi@21000000          .   !microchip,mpfs-qspi microchip,coreqspi-rtl-v2                                      x    !                     	           U                     	   disabled          i2c@2010a000          ,   !microchip,mpfs-i2c microchip,corei2c-rtl-v7          x                                                  	           :                       t          okay          i2c@2010b000          ,   !microchip,mpfs-i2c microchip,corei2c-rtl-v7          x                                                  	           =                       t       	   disabled          can@2010c000             !microchip,mpfs-can           x                                  %           	           8      	   disabled          can@2010d000             !microchip,mpfs-can           x                                  %           	           9      	   disabled          ethernet@20110000            !microchip,mpfs-macb cdns,macb            x                                                    	           @   A   B   C   D   E                                           
  pclk hclk                          okay            sgmii                 ethernet-phy@9           x   	                  ethernet-phy@8           x                        ethernet@20112000            !microchip,mpfs-macb cdns,macb            x                                                    	           F   G   H   I   J   K                                           
  pclk hclk                          okay            sgmii                    gpio@20120000            !microchip,mpfs-gpio          x                         	                                                               	   disabled          gpio@20121000            !microchip,mpfs-gpio          x                        	                                                               	   disabled          gpio@20122000            !microchip,mpfs-gpio          x                         	                                                                  okay               5   5   5   5   5   5   5   5   5   5   5   5   5   5   5   5   5   5   5   5   5   5   5   5   5   5   5   5   5   5   5   5      rtc@20124000             !microchip,mpfs-rtc           x     @                   	           P   Q                     !        rtc rtcref           okay          usb@20201000             !microchip,mpfs-musb          x                         	           V   W                       dma mc           okay            -otg       mailbox@37020000             !microchip,mpfs-mailbox        0   x    7         X      1       @    7                   	           `        5            okay                      spi@37020100          .   !microchip,mpfs-qspi microchip,coreqspi-rtl-v2                                      x    7                   	           n                  	   disabled             fabric-clk3          !fixed-clock         g            t          fabric-clk1          !fixed-clock         g            tsY@      aliases         A/soc/ethernet@20112000          K/soc/serial@20000000            S/soc/serial@20100000            [/soc/serial@20102000            c/soc/serial@20104000            k/soc/serial@20106000          chosen          sserial1:115200n8          reserved-memory                                      buffer@80000000          !shared-dma-pool          x                    buffer@c4000000          !shared-dma-pool          x                    buffer@d4000000          !shared-dma-pool          x                       memory@1000000000            ?memory           x           v            	#address-cells #size-cells model compatible timebase-frequency device_type i-cache-block-size i-cache-sets i-cache-size reg riscv,isa riscv,isa-base riscv,isa-extensions clocks status phandle #interrupt-cells interrupt-controller d-cache-block-size d-cache-sets d-cache-size d-tlb-sets d-tlb-size i-tlb-sets i-tlb-size mmu-type tlb-split next-level-cache cpu #clock-cells clock-frequency mboxes ranges cache-level cache-unified interrupt-parent interrupts interrupts-extended riscv,ndev dma-channels #dma-cells #reset-cells reg-io-width reg-shift current-speed max-frequency bus-width disable-wp cap-sd-highspeed cap-mmc-highspeed mmc-ddr-1_8v mmc-hs200-1_8v sd-uhs-sdr12 sd-uhs-sdr25 sd-uhs-sdr50 sd-uhs-sdr104 local-mac-address clock-names resets phy-mode phy-handle gpio-controller #gpio-cells interrupt-names dr_mode #mbox-cells ethernet0 serial0 serial1 serial2 serial3 serial4 stdout-path 