8(lmilkv,pioneersophgo,sg2042 &6Milk-V Pioneercpus <cpu-mapsocket0cluster0core0Ocore1Ocore2Ocore3Ocluster1core0Ocore1Ocore2Ocore3Ocluster2core0O core1O core2O core3O cluster3core0O core1Ocore2Ocore3Ocluster4core0Ocore1Ocore2Ocore3Ocluster5core0Ocore1Ocore2Ocore3Ocluster6core0Ocore1Ocore2Ocore3Ocluster7core0Ocore1Ocore2Ocore3O cluster8core0O!core1O"core2O#core3O$cluster9core0O%core1O&core2O'core3O(cluster10core0O)core1O*core2O+core3O,cluster11core0O-core1O.core2O/core3O0cluster12core0O1core1O2core2O3core3O4cluster13core0O5core1O6core2O7core3O8cluster14core0O9core1O:core2O;core3O<cluster15core0O=core1O>core2O?core3O@cpu@0thead,c920riscvScpu _rv64imafdcirv64i(ximafdczicntrzicsrzifenceizihpm@@A riscv,sv39interrupt-controllerriscv,cpu-intc "Xcpu@1thead,c920riscvScpu _rv64imafdcirv64i(ximafdczicntrzicsrzifenceizihpm@@A riscv,sv39interrupt-controllerriscv,cpu-intc "Ycpu@2thead,c920riscvScpu _rv64imafdcirv64i(ximafdczicntrzicsrzifenceizihpm@@A riscv,sv39interrupt-controllerriscv,cpu-intc "Zcpu@3thead,c920riscvScpu _rv64imafdcirv64i(ximafdczicntrzicsrzifenceizihpm@@A riscv,sv39interrupt-controllerriscv,cpu-intc "[cpu@4thead,c920riscvScpu _rv64imafdcirv64i(ximafdczicntrzicsrzifenceizihpm@@B riscv,sv39interrupt-controllerriscv,cpu-intc "\cpu@5thead,c920riscvScpu _rv64imafdcirv64i(ximafdczicntrzicsrzifenceizihpm@@B riscv,sv39interrupt-controllerriscv,cpu-intc "]cpu@6thead,c920riscvScpu _rv64imafdcirv64i(ximafdczicntrzicsrzifenceizihpm@@B riscv,sv39interrupt-controllerriscv,cpu-intc "^cpu@7thead,c920riscvScpu _rv64imafdcirv64i(ximafdczicntrzicsrzifenceizihpm@@B riscv,sv39interrupt-controllerriscv,cpu-intc "_cpu@8thead,c920riscvScpu _rv64imafdcirv64i(ximafdczicntrzicsrzifenceizihpm@@C riscv,sv39interrupt-controllerriscv,cpu-intc "`cpu@9thead,c920riscvScpu _rv64imafdcirv64i(ximafdczicntrzicsrzifenceizihpm @@C riscv,sv39interrupt-controllerriscv,cpu-intc "acpu@10thead,c920riscvScpu _rv64imafdcirv64i(ximafdczicntrzicsrzifenceizihpm @@C riscv,sv39interrupt-controllerriscv,cpu-intc "bcpu@11thead,c920riscvScpu _rv64imafdcirv64i(ximafdczicntrzicsrzifenceizihpm @@C riscv,sv39interrupt-controllerriscv,cpu-intc "ccpu@12thead,c920riscvScpu _rv64imafdcirv64i(ximafdczicntrzicsrzifenceizihpm @@D riscv,sv39interrupt-controllerriscv,cpu-intc "dcpu@13thead,c920riscvScpu _rv64imafdcirv64i(ximafdczicntrzicsrzifenceizihpm @@D riscv,sv39interrupt-controllerriscv,cpu-intc "ecpu@14thead,c920riscvScpu _rv64imafdcirv64i(ximafdczicntrzicsrzifenceizihpm@@D riscv,sv39interrupt-controllerriscv,cpu-intc "fcpu@15thead,c920riscvScpu _rv64imafdcirv64i(ximafdczicntrzicsrzifenceizihpm@@D riscv,sv39interrupt-controllerriscv,cpu-intc "gcpu@16thead,c920riscvScpu _rv64imafdcirv64i(ximafdczicntrzicsrzifenceizihpm@@E riscv,sv39 interrupt-controllerriscv,cpu-intc "hcpu@17thead,c920riscvScpu _rv64imafdcirv64i(ximafdczicntrzicsrzifenceizihpm@@E riscv,sv39 interrupt-controllerriscv,cpu-intc "icpu@18thead,c920riscvScpu _rv64imafdcirv64i(ximafdczicntrzicsrzifenceizihpm@@E riscv,sv39 interrupt-controllerriscv,cpu-intc "jcpu@19thead,c920riscvScpu _rv64imafdcirv64i(ximafdczicntrzicsrzifenceizihpm@@E riscv,sv39 interrupt-controllerriscv,cpu-intc "kcpu@20thead,c920riscvScpu _rv64imafdcirv64i(ximafdczicntrzicsrzifenceizihpm@@F riscv,sv39 interrupt-controllerriscv,cpu-intc "lcpu@21thead,c920riscvScpu _rv64imafdcirv64i(ximafdczicntrzicsrzifenceizihpm@@F riscv,sv39interrupt-controllerriscv,cpu-intc "mcpu@22thead,c920riscvScpu _rv64imafdcirv64i(ximafdczicntrzicsrzifenceizihpm@@F riscv,sv39interrupt-controllerriscv,cpu-intc "ncpu@23thead,c920riscvScpu _rv64imafdcirv64i(ximafdczicntrzicsrzifenceizihpm@@F riscv,sv39interrupt-controllerriscv,cpu-intc "ocpu@24thead,c920riscvScpu _rv64imafdcirv64i(ximafdczicntrzicsrzifenceizihpm@@G riscv,sv39interrupt-controllerriscv,cpu-intc "pcpu@25thead,c920riscvScpu _rv64imafdcirv64i(ximafdczicntrzicsrzifenceizihpm@@G riscv,sv39interrupt-controllerriscv,cpu-intc "qcpu@26thead,c920riscvScpu _rv64imafdcirv64i(ximafdczicntrzicsrzifenceizihpm@@G riscv,sv39interrupt-controllerriscv,cpu-intc "rcpu@27thead,c920riscvScpu _rv64imafdcirv64i(ximafdczicntrzicsrzifenceizihpm@@G riscv,sv39interrupt-controllerriscv,cpu-intc "scpu@28thead,c920riscvScpu _rv64imafdcirv64i(ximafdczicntrzicsrzifenceizihpm@@H riscv,sv39interrupt-controllerriscv,cpu-intc "tcpu@29thead,c920riscvScpu _rv64imafdcirv64i(ximafdczicntrzicsrzifenceizihpm@@H riscv,sv39interrupt-controllerriscv,cpu-intc "ucpu@30thead,c920riscvScpu _rv64imafdcirv64i(ximafdczicntrzicsrzifenceizihpm@@H riscv,sv39interrupt-controllerriscv,cpu-intc "vcpu@31thead,c920riscvScpu _rv64imafdcirv64i(ximafdczicntrzicsrzifenceizihpm@@H riscv,sv39 interrupt-controllerriscv,cpu-intc "wcpu@32thead,c920riscvScpu _rv64imafdcirv64i(ximafdczicntrzicsrzifenceizihpm @@I riscv,sv39!interrupt-controllerriscv,cpu-intc "xcpu@33thead,c920riscvScpu _rv64imafdcirv64i(ximafdczicntrzicsrzifenceizihpm!@@I riscv,sv39"interrupt-controllerriscv,cpu-intc "ycpu@34thead,c920riscvScpu _rv64imafdcirv64i(ximafdczicntrzicsrzifenceizihpm"@@I riscv,sv39#interrupt-controllerriscv,cpu-intc "zcpu@35thead,c920riscvScpu _rv64imafdcirv64i(ximafdczicntrzicsrzifenceizihpm#@@I riscv,sv39$interrupt-controllerriscv,cpu-intc "{cpu@36thead,c920riscvScpu _rv64imafdcirv64i(ximafdczicntrzicsrzifenceizihpm$@@J riscv,sv39%interrupt-controllerriscv,cpu-intc "|cpu@37thead,c920riscvScpu _rv64imafdcirv64i(ximafdczicntrzicsrzifenceizihpm%@@J riscv,sv39&interrupt-controllerriscv,cpu-intc "}cpu@38thead,c920riscvScpu _rv64imafdcirv64i(ximafdczicntrzicsrzifenceizihpm&@@J riscv,sv39'interrupt-controllerriscv,cpu-intc "~cpu@39thead,c920riscvScpu _rv64imafdcirv64i(ximafdczicntrzicsrzifenceizihpm'@@J riscv,sv39(interrupt-controllerriscv,cpu-intc "cpu@40thead,c920riscvScpu _rv64imafdcirv64i(ximafdczicntrzicsrzifenceizihpm(@@K riscv,sv391interrupt-controllerriscv,cpu-intc "cpu@41thead,c920riscvScpu _rv64imafdcirv64i(ximafdczicntrzicsrzifenceizihpm)@@K riscv,sv392interrupt-controllerriscv,cpu-intc "cpu@42thead,c920riscvScpu _rv64imafdcirv64i(ximafdczicntrzicsrzifenceizihpm*@@K riscv,sv393interrupt-controllerriscv,cpu-intc "cpu@43thead,c920riscvScpu _rv64imafdcirv64i(ximafdczicntrzicsrzifenceizihpm+@@K riscv,sv394interrupt-controllerriscv,cpu-intc "cpu@44thead,c920riscvScpu _rv64imafdcirv64i(ximafdczicntrzicsrzifenceizihpm,@@L riscv,sv395interrupt-controllerriscv,cpu-intc "cpu@45thead,c920riscvScpu _rv64imafdcirv64i(ximafdczicntrzicsrzifenceizihpm-@@L riscv,sv396interrupt-controllerriscv,cpu-intc "cpu@46thead,c920riscvScpu _rv64imafdcirv64i(ximafdczicntrzicsrzifenceizihpm.@@L riscv,sv397interrupt-controllerriscv,cpu-intc "cpu@47thead,c920riscvScpu _rv64imafdcirv64i(ximafdczicntrzicsrzifenceizihpm/@@L riscv,sv398interrupt-controllerriscv,cpu-intc "cpu@48thead,c920riscvScpu _rv64imafdcirv64i(ximafdczicntrzicsrzifenceizihpm0@@M riscv,sv39)interrupt-controllerriscv,cpu-intc "cpu@49thead,c920riscvScpu _rv64imafdcirv64i(ximafdczicntrzicsrzifenceizihpm1@@M riscv,sv39*interrupt-controllerriscv,cpu-intc "cpu@50thead,c920riscvScpu _rv64imafdcirv64i(ximafdczicntrzicsrzifenceizihpm2@@M riscv,sv39+interrupt-controllerriscv,cpu-intc "cpu@51thead,c920riscvScpu _rv64imafdcirv64i(ximafdczicntrzicsrzifenceizihpm3@@M riscv,sv39,interrupt-controllerriscv,cpu-intc "cpu@52thead,c920riscvScpu _rv64imafdcirv64i(ximafdczicntrzicsrzifenceizihpm4@@N riscv,sv39-interrupt-controllerriscv,cpu-intc "cpu@53thead,c920riscvScpu _rv64imafdcirv64i(ximafdczicntrzicsrzifenceizihpm5@@N riscv,sv39.interrupt-controllerriscv,cpu-intc "cpu@54thead,c920riscvScpu _rv64imafdcirv64i(ximafdczicntrzicsrzifenceizihpm6@@N riscv,sv39/interrupt-controllerriscv,cpu-intc "cpu@55thead,c920riscvScpu _rv64imafdcirv64i(ximafdczicntrzicsrzifenceizihpm7@@N riscv,sv390interrupt-controllerriscv,cpu-intc "cpu@56thead,c920riscvScpu _rv64imafdcirv64i(ximafdczicntrzicsrzifenceizihpm8@@O riscv,sv399interrupt-controllerriscv,cpu-intc "cpu@57thead,c920riscvScpu _rv64imafdcirv64i(ximafdczicntrzicsrzifenceizihpm9@@O riscv,sv39:interrupt-controllerriscv,cpu-intc "cpu@58thead,c920riscvScpu _rv64imafdcirv64i(ximafdczicntrzicsrzifenceizihpm:@@O riscv,sv39;interrupt-controllerriscv,cpu-intc "cpu@59thead,c920riscvScpu _rv64imafdcirv64i(ximafdczicntrzicsrzifenceizihpm;@@O riscv,sv39<interrupt-controllerriscv,cpu-intc "cpu@60thead,c920riscvScpu _rv64imafdcirv64i(ximafdczicntrzicsrzifenceizihpm<@@P riscv,sv39=interrupt-controllerriscv,cpu-intc "cpu@61thead,c920riscvScpu _rv64imafdcirv64i(ximafdczicntrzicsrzifenceizihpm=@@P riscv,sv39>interrupt-controllerriscv,cpu-intc "cpu@62thead,c920riscvScpu _rv64imafdcirv64i(ximafdczicntrzicsrzifenceizihpm>@@P riscv,sv39?interrupt-controllerriscv,cpu-intc "cpu@63thead,c920riscvScpu _rv64imafdcirv64i(ximafdczicntrzicsrzifenceizihpm?@@P riscv,sv39@interrupt-controllerriscv,cpu-intc "cache-controller-0cache@3?Acache-controller-1cache@3?Bcache-controller-2cache@3?Ecache-controller-3cache@3?Fcache-controller-4cache@3?Ccache-controller-5cache@3?Dcache-controller-6cache@3?Gcache-controller-7cache@3?Hcache-controller-8cache@3?Icache-controller-9cache@3?Jcache-controller-10cache@3?Mcache-controller-11cache@3?Ncache-controller-12cache@3?Kcache-controller-13cache@3?Lcache-controller-14cache@3?Ocache-controller-15cache@3?PaliasesM/soc/serial@7040000000oscillator0 fixed-clock Ucgi_mainhu}x@Toscillator1 fixed-clock Ucgi_dpll0hu}x@Uoscillator2 fixed-clock Ucgi_dpll1hu}x@Vsoc simple-bus Qi2c@7030005000snps,designware-i2cp0P R5refueS  disabledi2c@7030006000snps,designware-i2cp0` R5refufSokaysyscon@17sophgo,sg2042-hwmon-mcui2c@7030007000snps,designware-i2cp0p R5refugS disabledi2c@7030008000snps,designware-i2cp0 R5refuhS disabledgpio@7030009000snps,dw-apb-gpiop0 R2RMbusdbgpio-controller@0snps,dw-apb-gpio-port  "Q`gpio@703000a000snps,dw-apb-gpiop0 R2RMbusdbgpio-controller@0snps,dw-apb-gpio-port  "Qagpio@703000b000snps,dw-apb-gpiop0 R2RMbusdbgpio-controller@0snps,dw-apb-gpio-port  "Qbclock-controller@70300100c0sophgo,sg2042-pllp0@ TUVcgi_maincgi_dpll0cgi_dpll1hWclock-controller@7030010368sophgo,sg2042-rpgatep0hRUrpgatehclock-controller@7030012000sophgo,sg2042-clkgenp0  WWWWmpllfplldpll0dpll1hRinterrupt-controller@70940000001sophgo,sg2042-aclint-mswithead,c900-aclint-mswip@XYZ[\]^_`abcdefghijklmnopqrstuvwxyz{|}~timer@70ac0040005sophgo,sg2042-aclint-mtimerthead,c900-aclint-mtimerp@ mtimecmp XYZ[timer@70ac0140005sophgo,sg2042-aclint-mtimerthead,c900-aclint-mtimerp@ mtimecmp \]^_timer@70ac0240005sophgo,sg2042-aclint-mtimerthead,c900-aclint-mtimerp@ mtimecmp `abctimer@70ac0340005sophgo,sg2042-aclint-mtimerthead,c900-aclint-mtimerp@ mtimecmp defgtimer@70ac0440005sophgo,sg2042-aclint-mtimerthead,c900-aclint-mtimerp@ mtimecmp hijktimer@70ac0540005sophgo,sg2042-aclint-mtimerthead,c900-aclint-mtimerp@ mtimecmp lmnotimer@70ac0640005sophgo,sg2042-aclint-mtimerthead,c900-aclint-mtimerp@ mtimecmp pqrstimer@70ac0740005sophgo,sg2042-aclint-mtimerthead,c900-aclint-mtimerp@ mtimecmp tuvwtimer@70ac0840005sophgo,sg2042-aclint-mtimerthead,c900-aclint-mtimerp@ mtimecmp xyz{timer@70ac0940005sophgo,sg2042-aclint-mtimerthead,c900-aclint-mtimerp @ mtimecmp |}~timer@70ac0a40005sophgo,sg2042-aclint-mtimerthead,c900-aclint-mtimerp @ mtimecmp timer@70ac0b40005sophgo,sg2042-aclint-mtimerthead,c900-aclint-mtimerp @ mtimecmp timer@70ac0c40005sophgo,sg2042-aclint-mtimerthead,c900-aclint-mtimerp @ mtimecmp timer@70ac0d40005sophgo,sg2042-aclint-mtimerthead,c900-aclint-mtimerp @ mtimecmp timer@70ac0e40005sophgo,sg2042-aclint-mtimerthead,c900-aclint-mtimerp@ mtimecmp timer@70ac0f40005sophgo,sg2042-aclint-mtimerthead,c900-aclint-mtimerp@ mtimecmp interrupt-controller@7090000000#sophgo,sg2042-plicthead,c900-plic "p X X Y Y Z Z [ [ \ \ ] ] ^ ^ _ _ ` ` a a b b c c d d e e f f g g h h i i j j k k l l m m n n o o p p q q r r s s t t u u v v w w x x y y z z { { | | } } ~ ~    Qreset-controller@7030013000sophgo,sg2042-resetp00 +Sserial@7040000000snps,dw-apb-uartp@pueR*R/baudclkapb_pclk8BSokaymmc@704002a000sophgo,sg2042-dwcmshcp@QR%R?RKcorebustimerokayOYagummc@704002b000sophgo,sg2042-dwcmshcp@QR&R@RLcorebustimerokayOYuchosenserial0thermal-zonessoc-thermaltripssoc-active1u0@Zactivesoc-active2.Zactivesoc-active3p'Zactivesoc-hot8Zhotboard-thermaltripsboard-active$@Zactive compatible#address-cells#size-cellsdma-noncoherentmodeltimebase-frequencycpudevice_typeriscv,isariscv,isa-baseriscv,isa-extensionsregi-cache-block-sizei-cache-sizei-cache-setsd-cache-block-sized-cache-sized-cache-setsnext-level-cachemmu-typephandleinterrupt-controller#interrupt-cellscache-levelcache-unifiedserial0clock-output-names#clock-cellsclock-frequencyinterrupt-parentrangesclocksclock-namesinterruptsresetsstatus#thermal-sensor-cellsgpio-controller#gpio-cellsngpiosinterrupts-extendedreg-namesriscv,ndev#reset-cellsreg-shiftreg-io-widthbus-widthno-sdiono-sdnon-removablewp-invertedno-mmcstdout-pathpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresis