    8 T   (                                          !    indiedroid,nova rockchip,rk3588s                                     +            7Indiedroid Nova    aliases          =/pinctrl/gpio@fd8a0000           C/pinctrl/gpio@fec20000           I/pinctrl/gpio@fec30000           O/pinctrl/gpio@fec40000           U/pinctrl/gpio@fec50000           [/i2c@fd880000            `/i2c@fea90000            e/i2c@feaa0000            j/i2c@feab0000            o/i2c@feac0000            t/i2c@fead0000            y/i2c@fec80000            ~/i2c@fec90000            /i2c@feca0000            /serial@fd890000             /serial@feb40000             /serial@feb50000             /serial@feb60000             /serial@feb70000             /serial@feb80000             /serial@feb90000             /serial@feba0000             /serial@febb0000             /serial@febc0000             /spi@feb00000            /spi@feb10000            /spi@feb20000            /spi@feb30000            /spi@fecb0000            /mmc@fe2e0000            /mmc@fe2c0000            /mmc@fe2d0000         cpus                         +       cpu-map    cluster0       core0                     core1                     core2                     core3                        cluster1       core0                     core1                        cluster2       core0                     core1               	            cpu@0           cpu           arm,cortex-a55                      psci            "          5   
            <   
            L0,         a           q           ~   @                                 @                                                                        cpu@100         cpu           arm,cortex-a55                     psci            "          5   
            a           q           ~   @                                 @                                                                        cpu@200         cpu           arm,cortex-a55                     psci            "          5   
            a           q           ~   @                                 @                                                                        cpu@300         cpu           arm,cortex-a55                     psci            "          5   
            a           q           ~   @                                 @                                                                        cpu@400         cpu           arm,cortex-a76                     psci            "           5   
           <   
           L0,         a           q           ~   @                                 @                                                                       cpu@500         cpu           arm,cortex-a76                     psci            "           5   
           a           q           ~   @                                 @                                                                       cpu@600         cpu           arm,cortex-a76                     psci            "           5   
           <   
           L0,         a           q           ~   @                                 @                                                                       cpu@700         cpu           arm,cortex-a76                     psci            "           5   
           a           q           ~   @                                 @                                                                 	      idle-states         psci       cpu-sleep             arm,idle-state           #        4           K   d        \   x        l                      l2-cache-l0           cache           s              @                   }                                        l2-cache-l1           cache           s              @                   }                                        l2-cache-l2           cache           s              @                   }                                        l2-cache-l3           cache           s              @                   }                                        l2-cache-b0           cache           s              @                   }                                        l2-cache-b1           cache           s              @                   }                                        l2-cache-b2           cache           s              @                   }                                        l2-cache-b3           cache           s              @                   }                                        l3-cache              cache           s 0             @                   }                                display-subsystem             rockchip,display-subsystem                   firmware       optee             linaro,optee-tz         smc       scmi              arm,scmi-smc                                              +       protocol@14                                  
      protocol@16                                   pmu-a55           arm,cortex-a55-pmu                            pmu-a76           arm,cortex-a76-pmu                            psci              arm,psci-1.0            smc       clock-0           fixed-clock         )׫        spll                      timer             arm,armv8-timer       P                                               
                          %  sec-phys phys virt hyp-phys hyp-virt          clock-1           fixed-clock         n6         xin24m                    clock-2           fixed-clock                    xin32k                    sram@10f000       
    mmio-sram                                                                  +      sram@0            arm,scmi-shmem                                     gpu@fb000000          *    rockchip,rk3588-mali arm,mali-valhall-csf                                             <   
           L         5                       core coregroup stacks                   0         \              ]              ^               job mmu gpu                    -            	  ;disabled       opp-table             operating-points-v2               opp-300000000           B             I 
L 
L P      opp-400000000           B    ׄ         I 
L 
L P      opp-500000000           B    e         I 
L 
L P      opp-600000000           B    #F         I 
L 
L P      opp-700000000           B    )'         I 
` 
` P      opp-800000000           B    /         I q q P      opp-900000000           B    5         I 5  5  P      opp-1000000000          B    ;         I P P P            usb@fc000000              rockchip,rk3588-dwc3 snps,dwc3                      @                                5                       ref_clk suspend_clk bus_clk         Wotg         _                  dusb2-phy usb3-phy         
  nutmi_wide           -              w     R         ~                                                     ;okay             *   port       endpoint            :   !                       usb@fc800000          "    rockchip,rk3588-ehci generic-ehci                                                      5                  "        _   #        dusb         -              ;okay          usb@fc840000          "    rockchip,rk3588-ohci generic-ohci                                                      5                  "        _   #        dusb         -              ;okay          usb@fc880000          "    rockchip,rk3588-ehci generic-ehci                                                      5                  $        _   %        dusb         -              ;okay          usb@fc8c0000          "    rockchip,rk3588-ohci generic-ohci                                                      5                  $        _   %        dusb         -              ;okay          usb@fcd00000              rockchip,rk3588-dwc3 snps,dwc3                     @                              (  5     j     i     h     k     r      &  ref_clk suspend_clk bus_clk utmi pipe           Whost            _   &         	  dusb3-phy          
  nutmi_wide           w     4         ~                                    J        ;okay          iommu@fc900000            arm,smmu-v3                             @        q             s             v             o               eventq gerror priq cmdq-sync            d         	  ;disabled          iommu@fcb00000            arm,smmu-v3                             @        }                                       {               eventq gerror priq cmdq-sync            d         	  ;disabled          syscon@fd58a000       )    rockchip,rk3588-pmugrf syscon simple-mfd                X                   f      syscon@fd58c000           rockchip,rk3588-sys-grf syscon              X                   a      syscon@fd5a4000           rockchip,rk3588-vop-grf syscon              Z@                    b      syscon@fd5a6000           rockchip,rk3588-vo-grf syscon               Z`                 5                      syscon@fd5a8000           rockchip,rk3588-vo-grf syscon               Z                5                c      syscon@fd5ac000           rockchip,rk3588-usb-grf syscon              Z       @                  syscon@fd5b0000           rockchip,rk3588-php-grf syscon              [                    (      syscon@fd5bc000       $    rockchip,rk3588-pipe-phy-grf syscon             [                         syscon@fd5c4000       $    rockchip,rk3588-pipe-phy-grf syscon             \@                         syscon@fd5c8000       $    rockchip,rk3588-usbdpphy-grf syscon             \       @                  syscon@fd5d0000       .    rockchip,rk3588-usb2phy-grf syscon simple-mfd               ]        @                      +                 usb2phy@0             rockchip,rk3588-usb2phy                                    5             phyclk          usb480m_phy0                                 w     m             qphy apb         ;okay                  otg-port            }            ;okay                           syscon@fd5d8000       .    rockchip,rk3588-usb2phy-grf syscon simple-mfd               ]       @                      +      usb2phy@8000              rockchip,rk3588-usb2phy                                   5             phyclk          usb480m_phy2                                 w     o             qphy apb         ;okay               "   host-port           }            ;okay               '           #            syscon@fd5dc000       .    rockchip,rk3588-usb2phy-grf syscon simple-mfd               ]       @                      +      usb2phy@c000              rockchip,rk3588-usb2phy                                   5             phyclk          usb480m_phy3                                 w     p              qphy apb         ;okay               $   host-port           }            ;okay               '           %            syscon@fd5e0000       $    rockchip,rk3588-hdptxphy-grf syscon             ^                          syscon@fd5f0000           rockchip,rk3588-ioc syscon              _                          sram@fd600000         
    mmio-sram               `                         `                          +         clock-controller@fd7c0000             rockchip,rk3588-cru             |                <                                                                         ]      q                 @  LA .  2Fq )׫ׄ e /  ׄ   e Zр            (                                       i2c@fd880000          (    rockchip,rk3588-i2c rockchip,rk3399-i2c                                    =               5     t     s      	  i2c pclk               )        default                      +            ;okay       regulator@42              rockchip,rk8602            B                                    dp        vdd_cpu_big0_s0                   2           O   *              regulator-state-mem          Z         regulator@43               rockchip,rk8603 rockchip,rk8602            C                                    dp        vdd_cpu_big1_s0                   2           O   *              regulator-state-mem          Z            serial@fd890000       &    rockchip,rk3588-uart snps,dw-apb-uart                                      K               5                  baudclk apb_pclk            s   +      +           xtx rx              ,        default                             	  ;disabled          pwm@fd8b0000          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                              5                	  pwm pclk               -        default                  	  ;disabled          pwm@fd8b0010          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                             5                	  pwm pclk               .        default                  	  ;disabled          pwm@fd8b0020          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                              5                	  pwm pclk               /        default                  	  ;disabled          pwm@fd8b0030          (    rockchip,rk3588-pwm rockchip,rk3328-pwm              0               5                	  pwm pclk               0        default                  	  ;disabled          power-management@fd8d8000         &    rockchip,rk3588-pmu syscon simple-mfd                                  d   power-controller          !    rockchip,rk3588-power-controller                                    +            ;okay                  power-domain@8                                              +       power-domain@9             	         5     !     #     "                1   2   3                                 +       power-domain@10            
        5     !     #     "           4                  power-domain@11                    5     !     #     "           5                        power-domain@12                    5                          6   7   8   9                  power-domain@13                                 +                   power-domain@14                  (  5                                    :                  power-domain@15                     5                               ;                  power-domain@16                    5                     <   =   >                     +                   power-domain@17                     5                               ?   @   A                        power-domain@21                    5                                                                                                      B   C   D   E   F   G   H   I                     +                   power-domain@23                    5      C      A                J                  power-domain@14                     5                               :                  power-domain@15                    5                          ;                  power-domain@22                    5                     K                     power-domain@24                    5     [     Z     ]           L   M                     +                   power-domain@25                  8  5                                   Z           N                     power-domain@26                  8  5                                   Q           O   P                  power-domain@27                  0  5                                         Q   R   S   T                     +                   power-domain@28                     5                               U   V                  power-domain@29                  (  5                                    W   X                     power-domain@30                    5     z     {           Y                  power-domain@31                  @  5     W                                              Z   [   \   ]                  power-domain@33            !        5     W     Z     [                  power-domain@34            "        5     W     Z     [                  power-domain@37            %        5          2           ^                  power-domain@38            &        5      4      5                  power-domain@40            (           _                        video-codec@fdc70000              rockchip,rk3588-av1-vpu                                     l               vdpu            <      A      C        Lׄ ׄ         5      A      C      
  aclk hclk           -               w                           vop@fdd90000              rockchip,rk3588-vop                      B     P                vop gamma-lut                               8  5     ]     \     a     b     c     d     [      7  aclk hclk dclk_vp0 dclk_vp1 dclk_vp2 dclk_vp3 pclk_vop             `        -                 a           b           c           d      	  ;disabled       ports                        +                  port@0                       +                      port@1                       +                     port@2                       +                     port@3                       +                           iommu@fdd97e00        ,    rockchip,rk3588-iommu rockchip,rk3568-iommu              ~                                                  5     ]     \        aclk iface          d            -            	  ;disabled               `      i2s@fddc0000              rockchip,rk3588-i2s-tdm                                                    5                       mclk_tx mclk_rx hclk            <                           s   e            xtx          -              w             qtx-m                      	  ;disabled          i2s@fddf0000              rockchip,rk3588-i2s-tdm                                                    5     4     4     5        mclk_tx mclk_rx hclk            <     1                      s   e           xtx          -              w             qtx-m                      	  ;disabled          i2s@fddfc000              rockchip,rk3588-i2s-tdm                                                   5     0     0     ,        mclk_tx mclk_rx hclk            <     -                      s   e           xrx          -              w             qrx-m                      	  ;disabled          qos@fdf35000              rockchip,rk3588-qos syscon              P                    6      qos@fdf35200              rockchip,rk3588-qos syscon              R                    7      qos@fdf35400              rockchip,rk3588-qos syscon              T                    8      qos@fdf35600              rockchip,rk3588-qos syscon              V                    9      qos@fdf36000              rockchip,rk3588-qos syscon              `                    Y      qos@fdf39000              rockchip,rk3588-qos syscon                                  ^      qos@fdf3d800              rockchip,rk3588-qos syscon                                  _      qos@fdf3e000              rockchip,rk3588-qos syscon                                  [      qos@fdf3e200              rockchip,rk3588-qos syscon                                  Z      qos@fdf3e400              rockchip,rk3588-qos syscon                                  \      qos@fdf3e600              rockchip,rk3588-qos syscon                                  ]      qos@fdf40000              rockchip,rk3588-qos syscon                                   W      qos@fdf40200              rockchip,rk3588-qos syscon                                  X      qos@fdf40400              rockchip,rk3588-qos syscon                                  Q      qos@fdf40500              rockchip,rk3588-qos syscon                                  R      qos@fdf40600              rockchip,rk3588-qos syscon                                  S      qos@fdf40800              rockchip,rk3588-qos syscon                                  T      qos@fdf41000              rockchip,rk3588-qos syscon                                  U      qos@fdf41100              rockchip,rk3588-qos syscon                                  V      qos@fdf60000              rockchip,rk3588-qos syscon                                   <      qos@fdf60200              rockchip,rk3588-qos syscon                                  =      qos@fdf60400              rockchip,rk3588-qos syscon                                  >      qos@fdf61000              rockchip,rk3588-qos syscon                                  ?      qos@fdf61200              rockchip,rk3588-qos syscon                                  @      qos@fdf61400              rockchip,rk3588-qos syscon                                  A      qos@fdf62000              rockchip,rk3588-qos syscon                                   :      qos@fdf63000              rockchip,rk3588-qos syscon              0                    ;      qos@fdf64000              rockchip,rk3588-qos syscon              @                    J      qos@fdf66000              rockchip,rk3588-qos syscon              `                    B      qos@fdf66200              rockchip,rk3588-qos syscon              b                    C      qos@fdf66400              rockchip,rk3588-qos syscon              d                    D      qos@fdf66600              rockchip,rk3588-qos syscon              f                    E      qos@fdf66800              rockchip,rk3588-qos syscon              h                    F      qos@fdf66a00              rockchip,rk3588-qos syscon              j                    G      qos@fdf66c00              rockchip,rk3588-qos syscon              l                    H      qos@fdf66e00              rockchip,rk3588-qos syscon              n                    I      qos@fdf67000              rockchip,rk3588-qos syscon              p                    K      qos@fdf67200              rockchip,rk3588-qos syscon              r               qos@fdf70000              rockchip,rk3588-qos syscon                                   4      qos@fdf71000              rockchip,rk3588-qos syscon                                  5      qos@fdf72000              rockchip,rk3588-qos syscon                                   1      qos@fdf72200              rockchip,rk3588-qos syscon              "                    2      qos@fdf72400              rockchip,rk3588-qos syscon              $                    3      qos@fdf80000              rockchip,rk3588-qos syscon                                   N      qos@fdf81000              rockchip,rk3588-qos syscon                                  O      qos@fdf81200              rockchip,rk3588-qos syscon                                  P      qos@fdf82000              rockchip,rk3588-qos syscon                                   L      qos@fdf82200              rockchip,rk3588-qos syscon              "                    M      dfi@fe060000                                   rockchip,rk3588-dfi       @                       &              0              :                  f      pcie@fe180000         *    rockchip,rk3588-pcie rockchip,rk3568-pcie           '   0   ?      0  5     C     H     >     M     R           )  aclk_mst aclk_slv aclk_dbi pclk aux pipe            pci       P                                                                                sys pmc msg legacy err          1           B                     `  U                  g                      g                     g                     g           c           t             0    h  0                       _   &         	  dpcie-phy            -      "      T                                                       @      	       @         0     
@       @                                     dbi apb config          w     )     .      	  qpwr pipe                         +         	  ;disabled       legacy-interrupt-controller                               1                                                g         pcie@fe190000         *    rockchip,rk3588-pcie rockchip,rk3568-pcie           '   @   O      0  5     D     I     ?     N     S     s      )  aclk_mst aclk_slv aclk_dbi pclk aux pipe            pci       P                                                                                sys pmc msg legacy err          1           B                     `  U                  i                      i                     i                     i           c           t             @    h  @                       _   j         	  dpcie-phy            -      "      T                                                       @      
        @         0     
A        @                                     dbi apb config          w     *     /      	  qpwr pipe                         +           ;okay               k        default    legacy-interrupt-controller                               1                                                i         ethernet@fe1c0000         &    rockchip,rk3588-gmac snps,dwmac-4.20a                                                                     macirq eth_wake_irq       (  5     6     7     Y     ^     5      0  stmmaceth clk_mac_ref pclk_mac aclk_mac ptp_ref         -      !        w     $      
  qstmmaceth              a           (           l                    m           n               	  ;disabled       mdio              snps,dwmac-mdio                      +          stmmac-axi-config                                                       %              l      rx-queues-config            5              m   queue0        queue1           tx-queues-config            K              n   queue0        queue1              sata@fe210000         '    rockchip,rk3588-dwc-ahci snps,dwc-ahci              !                                    (  5     b     _     e     T     o        sata pmalive rxoob ref asic         a                        +          	  ;disabled       sata-port@0                     s @          _   j         	  dsata-phy                                     sata@fe230000         '    rockchip,rk3588-dwc-ahci snps,dwc-ahci              #                                    (  5     d     a     g     V     q        sata pmalive rxoob ref asic         a                        +          	  ;disabled       sata-port@0                     s @          _   &         	  dsata-phy                                     spi@fe2b0000              rockchip,sfc                +        @                               5     /     0        clk_sfc hclk_sfc                         +          	  ;disabled          mmc@fe2c0000          0    rockchip,rk3588-dw-mshc rockchip,rk3288-dw-mshc             ,        @                                5   
      
   	                  biu ciu ciu-drive ciu-sample                                default            o   p   q   r        -      (        ;okay                                                                                s           t      mmc@fe2d0000          0    rockchip,rk3588-dw-mshc rockchip,rk3288-dw-mshc             -        @                                5                            biu ciu ciu-drive ciu-sample                                default            u        -      %        ;okay                                 %                  2        H   v                  S         Y                    s           w      mmc@fe2e0000              rockchip,rk3588-dwcmshc             .                                       <     -     .     ,        L n6        (  5     ,     *     +     -     .        core bus axi block timer                        x   y   z   {   |        default       (  w                                 qcore bus axi block timer            ;okay                        g         S                  Y           }           w      i2s@fe470000              rockchip,rk3588-i2s-tdm             G                                       5      +      /      (        mclk_tx mclk_rx hclk            <      )      -                            s   +       +           xtx rx           -      &        w      *      +      
  qtx-m rx-m            t        default            ~                                ;okay       port                  endpoint            i2s                    :                          i2s@fe480000              rockchip,rk3588-i2s-tdm             H                                       5     y     }     u        mclk_tx mclk_rx hclk            s   +      +           xtx rx           w     ^     _      
  qtx-m rx-m            t        default       (                                                  	  ;disabled          i2s@fe490000          (    rockchip,rk3588-i2s rockchip,rk3066-i2s             I                                       5                    i2s_clk i2s_hclk            <                            s                     xtx rx           -      &        default                                       	  ;disabled          i2s@fe4a0000          (    rockchip,rk3588-i2s rockchip,rk3066-i2s             J                                       5      %              i2s_clk i2s_hclk            <      "                      s                    xtx rx           -      &        default                                       	  ;disabled          interrupt-controller@fe600000             arm,gic-v3               `             h                       	                            a               8                                      1            +                 msi-controller@fe640000           arm,gic-v3-its              d                                        h      msi-controller@fe660000           arm,gic-v3-its              f                                   ppi-partitions     interrupt-partition-0                                        interrupt-partition-1                       	                       dma-controller@fea10000           arm,pl330 arm,primecell                     @                 V              W                        5      n      	  apb_pclk                          +      dma-controller@fea30000           arm,pl330 arm,primecell                     @                 X              Y                        5      o      	  apb_pclk                                i2c@fea90000          (    rockchip,rk3588-i2c rockchip,rk3399-i2c                              5            {      	  i2c pclk                  >                          default                      +          	  ;disabled          i2c@feaa0000          (    rockchip,rk3588-i2c rockchip,rk3399-i2c                              5            |      	  i2c pclk                  ?                          default                      +            ;okay       regulator@42              rockchip,rk8602            B                           ~         dp        vdd_npu_s0                    2           O   *   regulator-state-mem          Z            i2c@feab0000          (    rockchip,rk3588-i2c rockchip,rk3399-i2c                              5            }      	  i2c pclk                  @                          default                      +          	  ;disabled          i2c@feac0000          (    rockchip,rk3588-i2c rockchip,rk3399-i2c                              5            ~      	  i2c pclk                  A                          default                      +          	  ;disabled          i2c@fead0000          (    rockchip,rk3588-i2c rockchip,rk3399-i2c                              5                  	  i2c pclk                  B                          default                      +          	  ;disabled          timer@feae0000        ,    rockchip,rk3588-timer rockchip,rk3288-timer                                     !               5      T      W        pclk timer        watchdog@feaf0000              rockchip,rk3588-wdt snps,dw-wdt                              5      d      c      
  tclk pclk                 ;             spi@feb00000          (    rockchip,rk3588-spi rockchip,rk3066-spi                                    F               5                    spiclk apb_pclk         s   +      +           xtx rx                                       default                      +          	  ;disabled          spi@feb10000          (    rockchip,rk3588-spi rockchip,rk3066-spi                                    G               5                    spiclk apb_pclk         s   +      +           xtx rx                                       default                      +          	  ;disabled          spi@feb20000          (    rockchip,rk3588-spi rockchip,rk3066-spi                                    H               5                    spiclk apb_pclk         s                    xtx rx                                    default                      +            ;okay            <              L    pmic@0            rockchip,rk806                      	            	                                                      default         	 B@        	1   *        	=   *        	I   *        	U   *        	a   *        	m   *        	y   *        	   *        	   *        	   *        	           	   *        	           	           	   *   dvs1-null-pins          	gpio_pwrctrl1         	  	pin_fun0                     dvs2-null-pins          	gpio_pwrctrl2         	  	pin_fun0                     dvs3-null-pins          	gpio_pwrctrl3         	  	pin_fun0                     regulators     dcdc-reg1                    	           ~         dp        vdd_gpu_s0            0   regulator-state-mem          Z         dcdc-reg2                              ~         dp          0        vdd_cpu_lit_s0                regulator-state-mem          Z         dcdc-reg3                              q         
L        vdd_logic_s0              0   regulator-state-mem          
        
, q         dcdc-reg4                              ~         dp        vdd_vdenc_s0              0   regulator-state-mem          Z         dcdc-reg5                              q         P          0        vdd_ddr_s0     regulator-state-mem          Z        
, P         dcdc-reg6                                               vdd2_ddr_s3    regulator-state-mem          
         dcdc-reg7                                               vdd_2v0_pldo_s3               regulator-state-mem          
        
,          dcdc-reg8                              2Z         2Z        vcc_3v3_s3             s   regulator-state-mem          
        
, 2Z         dcdc-reg9                              	'         	'        vddq_ddr_s0    regulator-state-mem          Z         dcdc-reg10                             w@         w@        vcc_1v8_s3             w   regulator-state-mem          
        
, w@         pldo-reg1                              w@         w@        vcc_1v8_s0     regulator-state-mem          Z         pldo-reg2                              w@         w@        vcca_1v8_s0               regulator-state-mem          Z        
, w@         pldo-reg3                              O         O        vdda_1v2_s0    regulator-state-mem          Z         pldo-reg4                              2Z         2Z        vcca_3v3_s0    regulator-state-mem          Z         pldo-reg5                              2Z         w@        vccio_sd_s0            t   regulator-state-mem          Z         pldo-reg6                              w@         w@        vcc_1v8_s3_pldo6       regulator-state-mem          
        
, w@         nldo-reg1                              q         q        vdd_0v75_s3    regulator-state-mem          
        
, q         nldo-reg2                              P         P        vdda_ddr_pll_s0    regulator-state-mem          Z        
, P         nldo-reg3                              q         q        avdd_0v75_s0       regulator-state-mem          Z         nldo-reg4                              P         P        vdda_0v85_s0       regulator-state-mem          Z         nldo-reg5                  spi@feb30000          (    rockchip,rk3588-spi rockchip,rk3066-spi                                    I               5                    spiclk apb_pclk         s                    xtx rx                                       default                      +          	  ;disabled          serial@feb40000       &    rockchip,rk3588-uart snps,dw-apb-uart                                      L               5                    baudclk apb_pclk            s   +      +   	        xtx rx                      default                             	  ;disabled          serial@feb50000       &    rockchip,rk3588-uart snps,dw-apb-uart                                      M               5                    baudclk apb_pclk            s   +   
   +           xtx rx                      default                               ;okay          serial@feb60000       &    rockchip,rk3588-uart snps,dw-apb-uart                                      N               5                    baudclk apb_pclk            s   +      +           xtx rx                      default                             	  ;disabled          serial@feb70000       &    rockchip,rk3588-uart snps,dw-apb-uart                                      O               5                    baudclk apb_pclk            s      	      
        xtx rx                      default                             	  ;disabled          serial@feb80000       &    rockchip,rk3588-uart snps,dw-apb-uart                                      P               5                    baudclk apb_pclk            s                    xtx rx                      default                             	  ;disabled          serial@feb90000       &    rockchip,rk3588-uart snps,dw-apb-uart                                      Q               5                    baudclk apb_pclk            s                    xtx rx                      default                             	  ;disabled          serial@feba0000       &    rockchip,rk3588-uart snps,dw-apb-uart                                      R               5                    baudclk apb_pclk            s   e      e           xtx rx                      default                             	  ;disabled          serial@febb0000       &    rockchip,rk3588-uart snps,dw-apb-uart                                      S               5                    baudclk apb_pclk            s   e   	   e   
        xtx rx                      default                             	  ;disabled          serial@febc0000       &    rockchip,rk3588-uart snps,dw-apb-uart                                      T               5                    baudclk apb_pclk                             default                               ;okay             
H   bluetooth         *    realtek,rtl8821cs-bt realtek,rtl8723bs-bt           
X                  
j                  
w                                   default          pwm@febd0000          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                              5      L      K      	  pwm pclk                       default                  	  ;disabled          pwm@febd0010          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                             5      L      K      	  pwm pclk                       default                  	  ;disabled          pwm@febd0020          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                              5      L      K      	  pwm pclk                       default                  	  ;disabled          pwm@febd0030          (    rockchip,rk3588-pwm rockchip,rk3328-pwm              0               5      L      K      	  pwm pclk                       default                  	  ;disabled          pwm@febe0000          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                              5      O      N      	  pwm pclk                       default                  	  ;disabled          pwm@febe0010          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                             5      O      N      	  pwm pclk                       default                  	  ;disabled          pwm@febe0020          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                              5      O      N      	  pwm pclk                       default                  	  ;disabled          pwm@febe0030          (    rockchip,rk3588-pwm rockchip,rk3328-pwm              0               5      O      N      	  pwm pclk                       default                  	  ;disabled          pwm@febf0000          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                              5      R      Q      	  pwm pclk                       default                  	  ;disabled          pwm@febf0010          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                             5      R      Q      	  pwm pclk                       default                  	  ;disabled          pwm@febf0020          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                              5      R      Q      	  pwm pclk                       default                  	  ;disabled          pwm@febf0030          (    rockchip,rk3588-pwm rockchip,rk3328-pwm              0               5      R      Q      	  pwm pclk                       default                  	  ;disabled          tsadc@fec00000            rockchip,rk3588-tsadc                                                     5                    tsadc apb_pclk          <              L         w      V      W        qtsadc-apb tsadc         
         
            
                       
           gpio otpout         
           ;okay          adc@fec10000              rockchip,rk3588-saradc                                                    
           5                    saradc apb_pclk         w      U        qsaradc-apb          ;okay                                i2c@fec80000          (    rockchip,rk3588-i2c rockchip,rk3399-i2c                              5                  	  i2c pclk                  C                          default                      +            ;okay       typec-portc@22            fcs,fusb302            "                                             default               connector             usb-c-connector         dual            $USB-C           *dual            5sink            D,        Pd        Z B@   ports                        +       port@0                 endpoint            :                       port@1                endpoint            :              !         port@2                endpoint            :                                rtc@51            haoyu,hym8563              Q                    hym8563                                              default          l                    i2c@fec90000          (    rockchip,rk3588-i2c rockchip,rk3399-i2c                              5                  	  i2c pclk                  D                          default                      +            ;okay       audio-codec@11            everest,es8388                     L          <      1        z   s        mclk            5      1           w           s           w               port       endpoint            :                             i2c@feca0000          (    rockchip,rk3588-i2c rockchip,rk3399-i2c                              5                  	  i2c pclk                  E                          default                      +          	  ;disabled          spi@fecb0000          (    rockchip,rk3588-spi rockchip,rk3066-spi                                    J               5                    spiclk apb_pclk         s   e      e           xtx rx                                       default                      +          	  ;disabled          efuse@fecc0000            rockchip,rk3588-otp                               5                                otp apb_pclk phy arb            w                          qotp apb arb                      +      cpu-code@2                      id@7                        cpu-leakage@17                      cpu-leakage@18                      cpu-leakage@19                      log-leakage@1a                      gpu-leakage@1b                      cpu-version@1c                                    npu-leakage@28             (         codec-leakage@29               )            dma-controller@fed10000           arm,pl330 arm,primecell                     @                 Z              [                        5      p      	  apb_pclk                          e      phy@fed60000              rockchip,rk3588-hdptx-phy                                 5          T        ref apb         }          8  w     #          c     d     e     !     "      "  qphy apb init cmn lane ropll lcpll                    	  ;disabled          phy@fed80000              rockchip,rk3588-usbdp-phy                                }           5          l     V           refclk immortal pclk utmi         (  w                                     qinit cmn lane pcs_apb pma_apb                                                       ;okay                                                                   )                     port                         +       endpoint@0                      :                    endpoint@1                     :                          phy@fee00000              rockchip,rk3588-naneng-combphy                               5          v     W        ref apb pipe            <             L         }           w     <     C        qphy apb         >   (        P           ;okay               j      phy@fee20000              rockchip,rk3588-naneng-combphy                               5          x     W        ref apb pipe            <             L         }           w     >     E        qphy apb         >   (        P           ;okay               &      sram@ff001000         
    mmio-sram                                                                +         pinctrl           rockchip,rk3588-pinctrl                                          +                 gpio@fd8a0000             rockchip,gpio-bank                                                    5     q     r         	        f                                	           1         :  r                        HEADER_12_1v8   HEADER_24_1v8                        gpio@fec20000             rockchip,gpio-bank                                                    5      s      t         	        f                                	           1           rHEADER_27_3v3    HEADER_29_1v8  HEADER_7_1v8   HEADER_31_1v8 HEADER_33_1v8  HEADER_11_1v8 HEADER_13_1v8    HEADER_28_3v3             HEADER_5_3v3 HEADER_3_3v3        gpio@fec30000             rockchip,gpio-bank                                                    5      u      v         	        f          @                     	           1         gpio@fec40000             rockchip,gpio-bank                                                    5      w      x         	        f          `                     	           1           r        HEADER_16_1v8 HEADER_18_1v8      HEADER_19_1v8 HEADER_21_1v8 HEADER_23_1v8  HEADER_26_1v8 HEADER_15_1v8 HEADER_22_1v8                 gpio@fec50000             rockchip,gpio-bank                                                    5      y      z         	        f                               	           1           r  HEADER_37_3v3 HEADER_8_3v3 HEADER_10_3v3  HEADER_32_3v3 HEADER_35_3v3    HEADER_40_3v3 HEADER_38_3v3 HEADER_36_3v3                                     pcfg-pull-up                              pcfg-pull-down                            pcfg-pull-none                            pcfg-pull-none-drv-level-2                                       pcfg-pull-up-drv-level-1                                         pcfg-pull-up-drv-level-2                                         pcfg-pull-none-smt                                     auddsm        bt1120        can0          can1          can2          cif       clk32k        cpu       ddrphych0         ddrphych1         ddrphych2         ddrphych3         dp0       dp1       emmc       emmc-rstnout                                   x      emmc-bus8                                                                                                                      y      emmc-clk                                   z      emmc-cmd                                    {      emmc-data-strobe                                   |         eth1          fspi          gmac1         gpu       hdmi          i2c0       i2c0m2-xfer                                               )         i2c1       i2c1m0-xfer                    	             	                       i2c2       i2c2m0-xfer                    	             	                       i2c3       i2c3m0-xfer                   	            	                       i2c4       i2c4m0-xfer                   	            	                       i2c5       i2c5m0-xfer                   	            	                       i2c6       i2c6m3-xfer                	   	            	                       i2c7       i2c7m0-xfer                   	            	                       i2c8       i2c8m0-xfer                   	            	                       i2s0       i2s0-lrck                                  ~      i2s0-mclk                                        i2s0-sclk                                        i2s0-sdi0                                        i2s0-sdo0                                           i2s1       i2s1m0-lrck                                      i2s1m0-sclk                                      i2s1m0-sdi0                                      i2s1m0-sdi1                                      i2s1m0-sdi2                                      i2s1m0-sdi3                                      i2s1m0-sdo0               	                       i2s1m0-sdo1               
                       i2s1m0-sdo2                                      i2s1m0-sdo3                                         i2s2       i2s2m1-lrck                                      i2s2m1-sclk                                      i2s2m1-sdi                
                       i2s2m1-sdo                                          i2s3       i2s3-lrck                                        i2s3-sclk                                        i2s3-sdi                                         i2s3-sdo                                            jtag          litcpu        mcu       mipi          npu       pcie20x1          pcie30phy         pcie30x1          pcie30x2          pcie30x4          pdm0          pdm1          pmic       pmic-pins         p                                                                                                                  pmu       pwm0       pwm0m0-pins                                 -         pwm1       pwm1m0-pins                                 .         pwm2       pwm2m0-pins                                 /         pwm3       pwm3m0-pins                                 0         pwm4       pwm4m0-pins                                          pwm5       pwm5m0-pins                	                          pwm6       pwm6m0-pins                                          pwm7       pwm7m0-pins                                          pwm8       pwm8m0-pins                                         pwm9       pwm9m0-pins                                         pwm10      pwm10m0-pins                                             pwm11      pwm11m0-pins                                            pwm12      pwm12m0-pins                                            pwm13      pwm13m0-pins                                            pwm14      pwm14m0-pins                                            pwm15      pwm15m0-pins                                            refclk        sata          sata0         sata1         sata2         sdio       sdiom1-pins       `                                                                                      u         sdmmc      sdmmc-bus4        @                                                             r      sdmmc-clk                                  o      sdmmc-cmd                                  p      sdmmc-det                                   q         spdif0        spdif1        spi0       spi0m0-pins       0                                                          spi0m0-cs0                                        spi0m0-cs1                                           spi1       spi1m1-pins       0                                                       spi1m1-cs0                                       spi1m1-cs1                                          spi2       spi2m2-pins       0                                                          spi2m2-cs0                 	                          spi3       spi3m1-pins       0                                                       spi3m1-cs0                                       spi3m1-cs1                                          spi4       spi4m0-pins       0                                                       spi4m0-cs0                                       spi4m0-cs1                                          tsadc      tsadc-shut                                           uart0      uart0m1-xfer                                 	                 ,         uart1      uart1m1-xfer                      
            
                       uart2      uart2m0-xfer                       
             
                       uart3      uart3m1-xfer                      
            
                       uart4      uart4m1-xfer                      
            
                       uart5      uart5m1-xfer                      
            
                       uart6      uart6m1-xfer                       
            
                       uart7      uart7m1-xfer                      
            
                       uart8      uart8m1-xfer                      
            
                       uart9      uart9m2-xfer                      
            
                    uart9m2-ctsn                     
                    uart9m2-rtsn                     
                       vop       bt656         gpio-func      tsadc-gpio-func                                           bluetooth-pins     bt-reset                                           bt-wake-dev                                        bt-wake-host                                              ethernet-pins      rtl8111-perstb                                  k         hym8563    hym8563-int                                           sdio-pwrseq    wifi-enable-h                                             usb-typec      usbc0-int                                          typec5v-pwren                                               adc-keys-0        	    adc-keys            buttons                         w@           d   button-boot         $boot            "           -  FP         adc-keys-1        	    adc-keys            buttons                        w@           d   button-recovery       	  $recovery            "           -  FP         chosen          Gserial2:1500000n8         sdio-pwrseq           mmc-pwrseq-simple         
  ext_clock           5                      default         S           j                    v      sound             audio-graph-card            $rockchip,es8388-codec         )  vMicrophone Mic Jack Headphone Headphones          3  ~LINPUT2 Mic Jack Headphones LOUT1 Headphones ROUT1                   vbus5v0-typec-regulator           regulator-fixed                                               default         vbus5v0_typec            LK@         LK@        O   '                 vcc-1v1-nldo-s3-regulator             regulator-fixed                                             vcc_1v1_nldo_s3         O   *                 vcc-3v3-s0-regulator              regulator-fixed                            2Z         2Z        vcc_3v3_s0          O   s           }   regulator-state-mem          Z         vcc5v0-sys-regulator              regulator-fixed                            LK@         LK@        vcc5v0_sys             *      vcc5v0-usb-regulator              regulator-fixed                            LK@         LK@        vcc5v0_usb          O              '      vcc5v0-usbdcin-regulator              regulator-fixed                            LK@         LK@        vcc5v0_usbdcin                      	compatible interrupt-parent #address-cells #size-cells model gpio0 gpio1 gpio2 gpio3 gpio4 i2c0 i2c1 i2c2 i2c3 i2c4 i2c5 i2c6 i2c7 i2c8 serial0 serial1 serial2 serial3 serial4 serial5 serial6 serial7 serial8 serial9 spi0 spi1 spi2 spi3 spi4 mmc0 mmc1 mmc2 cpu device_type reg enable-method capacity-dmips-mhz clocks assigned-clocks assigned-clock-rates cpu-idle-states i-cache-size i-cache-line-size i-cache-sets d-cache-size d-cache-line-size d-cache-sets next-level-cache dynamic-power-coefficient #cooling-cells cpu-supply phandle entry-method local-timer-stop arm,psci-suspend-param entry-latency-us exit-latency-us min-residency-us cache-level cache-unified ports arm,smc-id shmem #clock-cells #reset-cells interrupts clock-frequency clock-output-names interrupt-names ranges clock-names operating-points-v2 power-domains status opp-hz opp-microvolt dr_mode phys phy-names phy_type resets snps,dis_enblslpm_quirk snps,dis-u1-entry-quirk snps,dis-u2-entry-quirk snps,dis-u2-freeclk-exists-quirk snps,dis-del-phy-power-chg-quirk snps,dis-tx-ipgap-linecheck-quirk usb-role-switch remote-endpoint snps,dis_rxdet_inp3_quirk #iommu-cells reset-names #phy-cells phy-supply rockchip,grf pinctrl-0 pinctrl-names regulator-always-on regulator-boot-on regulator-max-microvolt regulator-min-microvolt regulator-name regulator-ramp-delay fcs,suspend-voltage-selector vin-supply regulator-off-in-suspend dmas dma-names reg-shift reg-io-width #pwm-cells #power-domain-cells pm_qos reg-names iommus rockchip,vop-grf rockchip,vo1-grf rockchip,pmu assigned-clock-parents #sound-dai-cells bus-range #interrupt-cells interrupt-map-mask interrupt-map linux,pci-domain max-link-speed msi-map num-lanes interrupt-controller rockchip,php-grf snps,axi-config snps,mixed-burst snps,mtl-rx-config snps,mtl-tx-config snps,tso snps,blen snps,wr_osr_lmt snps,rd_osr_lmt snps,rx-queues-to-use snps,tx-queues-to-use ports-implemented hba-port-cap snps,rx-ts-max snps,tx-ts-max fifo-depth max-frequency bus-width cap-mmc-highspeed cap-sd-highspeed disable-wp no-sdio no-mmc sd-uhs-sdr104 vmmc-supply vqmmc-supply cap-sdio-irq keep-power-in-suspend mmc-pwrseq no-sd non-removable no-mmc-hs400 rockchip,trcm-sync-tx-only dai-format mclk-fs mbi-alias mbi-ranges msi-controller #msi-cells affinity arm,pl330-periph-burst #dma-cells num-cs #gpio-cells gpio-controller spi-max-frequency vcc1-supply vcc2-supply vcc3-supply vcc4-supply vcc5-supply vcc6-supply vcc7-supply vcc8-supply vcc9-supply vcc10-supply vcc11-supply vcc12-supply vcc13-supply vcc14-supply vcca-supply pins function regulator-enable-ramp-delay regulator-on-in-suspend regulator-suspend-microvolt uart-has-rtscts device-wake-gpios enable-gpios host-wake-gpios rockchip,hw-tshut-temp rockchip,hw-tshut-mode rockchip,hw-tshut-polarity pinctrl-1 #thermal-sensor-cells #io-channel-cells vref-supply vbus-supply data-role label power-role try-power-role source-pdos sink-pdos op-sink-microwatt wakeup-source AVDD-supply DVDD-supply HPVDD-supply bits rockchip,u2phy-grf rockchip,usb-grf rockchip,usbdpphy-grf rockchip,vo-grf orientation-switch mode-switch sbu1-dc-gpios sbu2-dc-gpios rockchip,dp-lane-mux rockchip,pipe-grf rockchip,pipe-phy-grf gpio-ranges gpio-line-names bias-pull-up bias-pull-down bias-disable drive-strength input-schmitt-enable rockchip,pins io-channel-names io-channels keyup-threshold-microvolt poll-interval linux,code press-threshold-microvolt stdout-path post-power-on-delay-ms reset-gpios widgets routing dais enable-active-high gpio 