 M   8 ?    (             >                             )    rockchip,rk3588-evb1-v10 rockchip,rk3588                                     +            7Rockchip RK3588 EVB1 V10 Board     aliases          =/pinctrl/gpio@fd8a0000           C/pinctrl/gpio@fec20000           I/pinctrl/gpio@fec30000           O/pinctrl/gpio@fec40000           U/pinctrl/gpio@fec50000           [/i2c@fd880000            `/i2c@fea90000            e/i2c@feaa0000            j/i2c@feab0000            o/i2c@feac0000            t/i2c@fead0000            y/i2c@fec80000            ~/i2c@fec90000            /i2c@feca0000            /serial@fd890000             /serial@feb40000             /serial@feb50000             /serial@feb60000             /serial@feb70000             /serial@feb80000             /serial@feb90000             /serial@feba0000             /serial@febb0000             /serial@febc0000             /spi@feb00000            /spi@feb10000            /spi@feb20000            /spi@feb30000            /spi@fecb0000            /ethernet@fe1b0000           /mmc@fe2e0000         cpus                         +       cpu-map    cluster0       core0                     core1                     core2                     core3                        cluster1       core0                     core1                        cluster2       core0                     core1               	            cpu@0           cpu           arm,cortex-a55                      psci            "          5   
            <   
            L0,         a           q           ~   @                                 @                                                                        cpu@100         cpu           arm,cortex-a55                     psci            "          5   
            a           q           ~   @                                 @                                                                        cpu@200         cpu           arm,cortex-a55                     psci            "          5   
            a           q           ~   @                                 @                                                                        cpu@300         cpu           arm,cortex-a55                     psci            "          5   
            a           q           ~   @                                 @                                                                        cpu@400         cpu           arm,cortex-a76                     psci            "           5   
           <   
           L0,         a           q           ~   @                                 @                                                                       cpu@500         cpu           arm,cortex-a76                     psci            "           5   
           a           q           ~   @                                 @                                                                       cpu@600         cpu           arm,cortex-a76                     psci            "           5   
           <   
           L0,         a           q           ~   @                                 @                                                                       cpu@700         cpu           arm,cortex-a76                     psci            "           5   
           a           q           ~   @                                 @                                                                 	      idle-states         psci       cpu-sleep             arm,idle-state           #        4           K   d        \   x        l                      l2-cache-l0           cache           s              @                   }                                        l2-cache-l1           cache           s              @                   }                                        l2-cache-l2           cache           s              @                   }                                        l2-cache-l3           cache           s              @                   }                                        l2-cache-b0           cache           s              @                   }                                        l2-cache-b1           cache           s              @                   }                                        l2-cache-b2           cache           s              @                   }                                        l2-cache-b3           cache           s              @                   }                                        l3-cache              cache           s 0             @                   }                                display-subsystem             rockchip,display-subsystem                   firmware       optee             linaro,optee-tz         smc       scmi              arm,scmi-smc                                              +       protocol@14                                  
      protocol@16                                   pmu-a55           arm,cortex-a55-pmu                            pmu-a76           arm,cortex-a76-pmu                            psci              arm,psci-1.0            smc       clock-0           fixed-clock         )׫        spll                      timer             arm,armv8-timer       P                                               
                          %  sec-phys phys virt hyp-phys hyp-virt          clock-1           fixed-clock         n6         xin24m                    clock-2           fixed-clock                    xin32k                    sram@10f000       
    mmio-sram                                                                  +      sram@0            arm,scmi-shmem                                     gpu@fb000000          *    rockchip,rk3588-mali arm,mali-valhall-csf                                             <   
           L         5                       core coregroup stacks                   0         \              ]              ^               job mmu gpu                    -              ;okay            B           N       opp-table             operating-points-v2               opp-300000000           Z             a 
L 
L P      opp-400000000           Z    ׄ         a 
L 
L P      opp-500000000           Z    e         a 
L 
L P      opp-600000000           Z    #F         a 
L 
L P      opp-700000000           Z    )'         a 
` 
` P      opp-800000000           Z    /         a q q P      opp-900000000           Z    5         a 5  5  P      opp-1000000000          Z    ;         a P P P            usb@fc000000              rockchip,rk3588-dwc3 snps,dwc3                      @                                5                       ref_clk suspend_clk bus_clk         ootg         w   !   "           |usb2-phy usb3-phy         
  utmi_wide           -                   R                                                               ;okay             B   port                         +       endpoint@0                      R   #                       usb@fc800000          "    rockchip,rk3588-ehci generic-ehci                                                      5                  $        w   %        |usb         -              ;okay          usb@fc840000          "    rockchip,rk3588-ohci generic-ohci                                                      5                  $        w   %        |usb         -              ;okay          usb@fc880000          "    rockchip,rk3588-ehci generic-ehci                                                      5                  &        w   '        |usb         -              ;okay          usb@fc8c0000          "    rockchip,rk3588-ohci generic-ohci                                                      5                  &        w   '        |usb         -              ;okay          usb@fcd00000              rockchip,rk3588-dwc3 snps,dwc3                     @                              (  5     j     i     h     k     r      &  ref_clk suspend_clk bus_clk utmi pipe           ohost            w   (         	  |usb3-phy          
  utmi_wide                4                                              b      	  ;disabled          iommu@fc900000            arm,smmu-v3                             @        q             s             v             o               eventq gerror priq cmdq-sync            |         	  ;disabled          iommu@fcb00000            arm,smmu-v3                             @        }                                       {               eventq gerror priq cmdq-sync            |         	  ;disabled          syscon@fd58a000       )    rockchip,rk3588-pmugrf syscon simple-mfd                X                   g      syscon@fd58c000           rockchip,rk3588-sys-grf syscon              X                   b      syscon@fd5a4000           rockchip,rk3588-vop-grf syscon              Z@                    c      syscon@fd5a6000           rockchip,rk3588-vo-grf syscon               Z`                 5                      syscon@fd5a8000           rockchip,rk3588-vo-grf syscon               Z                5                d      syscon@fd5ac000           rockchip,rk3588-usb-grf syscon              Z       @                  syscon@fd5b0000           rockchip,rk3588-php-grf syscon              [                    *      syscon@fd5bc000       $    rockchip,rk3588-pipe-phy-grf syscon             [                         syscon@fd5c4000       $    rockchip,rk3588-pipe-phy-grf syscon             \@                         syscon@fd5c8000       $    rockchip,rk3588-usbdpphy-grf syscon             \       @                  syscon@fd5d0000       .    rockchip,rk3588-usb2phy-grf syscon simple-mfd               ]        @                      +                 usb2phy@0             rockchip,rk3588-usb2phy                                    5             phyclk          usb480m_phy0                                      m             phy apb         ;okay                  otg-port                        ;okay               !            syscon@fd5d8000       .    rockchip,rk3588-usb2phy-grf syscon simple-mfd               ]       @                      +      usb2phy@8000              rockchip,rk3588-usb2phy                                   5             phyclk          usb480m_phy2                                      o             phy apb         ;okay               $   host-port                       ;okay               )           %            syscon@fd5dc000       .    rockchip,rk3588-usb2phy-grf syscon simple-mfd               ]       @                      +      usb2phy@c000              rockchip,rk3588-usb2phy                                   5             phyclk          usb480m_phy3                                      p              phy apb         ;okay               &   host-port                       ;okay               )           '            syscon@fd5e0000       $    rockchip,rk3588-hdptxphy-grf syscon             ^                          syscon@fd5f0000           rockchip,rk3588-ioc syscon              _                          sram@fd600000         
    mmio-sram               `                         `                          +         clock-controller@fd7c0000             rockchip,rk3588-cru             |                <                                                                         ]      q                 @  LA .  2Fq )׫ׄ e /  ׄ   e Zр            *                                       i2c@fd880000          (    rockchip,rk3588-i2c rockchip,rk3399-i2c                                    =               5     t     s      	  i2c pclk               +        default                      +          	  ;disabled          serial@fd890000       &    rockchip,rk3588-uart snps,dw-apb-uart                                      K               5                  baudclk apb_pclk               ,      ,           tx rx              -        default                             	  ;disabled          pwm@fd8b0000          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                              5                	  pwm pclk               .        default                  	  ;disabled          pwm@fd8b0010          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                             5                	  pwm pclk               /        default                  	  ;disabled          pwm@fd8b0020          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                              5                	  pwm pclk               0        default                    ;okay                    pwm@fd8b0030          (    rockchip,rk3588-pwm rockchip,rk3328-pwm              0               5                	  pwm pclk               1        default                  	  ;disabled          power-management@fd8d8000         &    rockchip,rk3588-pmu syscon simple-mfd                                  e   power-controller          !    rockchip,rk3588-power-controller                                    +            ;okay                  power-domain@8                                              +       power-domain@9             	         5     !     #     "                2   3   4                                 +       power-domain@10            
        5     !     #     "           5                  power-domain@11                    5     !     #     "           6                        power-domain@12                    5                          7   8   9   :                  power-domain@13                                 +                   power-domain@14                  (  5                                    ;                  power-domain@15                     5                               <                  power-domain@16                    5                     =   >   ?                     +                   power-domain@17                     5                               @   A   B                        power-domain@21                    5                                                                                                      C   D   E   F   G   H   I   J                     +                   power-domain@23                    5      C      A                K                  power-domain@14                     5                               ;                  power-domain@15                    5                          <                  power-domain@22                    5                     L                     power-domain@24                    5     [     Z     ]           M   N                     +                   power-domain@25                  8  5                                   Z           O                     power-domain@26                  8  5                                   Q           P   Q                  power-domain@27                  0  5                                         R   S   T   U                     +                   power-domain@28                     5                               V   W                  power-domain@29                  (  5                                    X   Y                     power-domain@30                    5     z     {           Z                  power-domain@31                  @  5     W                                              [   \   ]   ^                  power-domain@33            !        5     W     Z     [                  power-domain@34            "        5     W     Z     [                  power-domain@37            %        5          2           _                  power-domain@38            &        5      4      5                  power-domain@40            (           `                        video-codec@fdc70000              rockchip,rk3588-av1-vpu                                     l               vdpu            <      A      C        Lׄ ׄ         5      A      C      
  aclk hclk           -                                          vop@fdd90000              rockchip,rk3588-vop                      B     P                vop gamma-lut                               8  5     ]     \     a     b     c     d     [      7  aclk hclk dclk_vp0 dclk_vp1 dclk_vp2 dclk_vp3 pclk_vop          &   a        -                 b        -   c        >   d        O   e      	  ;disabled       ports                        +                  port@0                       +                      port@1                       +                     port@2                       +                     port@3                       +                           iommu@fdd97e00        ,    rockchip,rk3588-iommu rockchip,rk3568-iommu              ~                                                  5     ]     \        aclk iface          |            -            	  ;disabled               a      i2s@fddc0000              rockchip,rk3588-i2s-tdm                                                    5                       mclk_tx mclk_rx hclk            <             \                 f            tx          -                           tx-m            s          	  ;disabled          i2s@fddf0000              rockchip,rk3588-i2s-tdm                                                    5     4     4     5        mclk_tx mclk_rx hclk            <     1        \                 f           tx          -                           tx-m            s          	  ;disabled          i2s@fddfc000              rockchip,rk3588-i2s-tdm                                                   5     0     0     ,        mclk_tx mclk_rx hclk            <     -        \                 f           rx          -                           rx-m            s          	  ;disabled          qos@fdf35000              rockchip,rk3588-qos syscon              P                    7      qos@fdf35200              rockchip,rk3588-qos syscon              R                    8      qos@fdf35400              rockchip,rk3588-qos syscon              T                    9      qos@fdf35600              rockchip,rk3588-qos syscon              V                    :      qos@fdf36000              rockchip,rk3588-qos syscon              `                    Z      qos@fdf39000              rockchip,rk3588-qos syscon                                  _      qos@fdf3d800              rockchip,rk3588-qos syscon                                  `      qos@fdf3e000              rockchip,rk3588-qos syscon                                  \      qos@fdf3e200              rockchip,rk3588-qos syscon                                  [      qos@fdf3e400              rockchip,rk3588-qos syscon                                  ]      qos@fdf3e600              rockchip,rk3588-qos syscon                                  ^      qos@fdf40000              rockchip,rk3588-qos syscon                                   X      qos@fdf40200              rockchip,rk3588-qos syscon                                  Y      qos@fdf40400              rockchip,rk3588-qos syscon                                  R      qos@fdf40500              rockchip,rk3588-qos syscon                                  S      qos@fdf40600              rockchip,rk3588-qos syscon                                  T      qos@fdf40800              rockchip,rk3588-qos syscon                                  U      qos@fdf41000              rockchip,rk3588-qos syscon                                  V      qos@fdf41100              rockchip,rk3588-qos syscon                                  W      qos@fdf60000              rockchip,rk3588-qos syscon                                   =      qos@fdf60200              rockchip,rk3588-qos syscon                                  >      qos@fdf60400              rockchip,rk3588-qos syscon                                  ?      qos@fdf61000              rockchip,rk3588-qos syscon                                  @      qos@fdf61200              rockchip,rk3588-qos syscon                                  A      qos@fdf61400              rockchip,rk3588-qos syscon                                  B      qos@fdf62000              rockchip,rk3588-qos syscon                                   ;      qos@fdf63000              rockchip,rk3588-qos syscon              0                    <      qos@fdf64000              rockchip,rk3588-qos syscon              @                    K      qos@fdf66000              rockchip,rk3588-qos syscon              `                    C      qos@fdf66200              rockchip,rk3588-qos syscon              b                    D      qos@fdf66400              rockchip,rk3588-qos syscon              d                    E      qos@fdf66600              rockchip,rk3588-qos syscon              f                    F      qos@fdf66800              rockchip,rk3588-qos syscon              h                    G      qos@fdf66a00              rockchip,rk3588-qos syscon              j                    H      qos@fdf66c00              rockchip,rk3588-qos syscon              l                    I      qos@fdf66e00              rockchip,rk3588-qos syscon              n                    J      qos@fdf67000              rockchip,rk3588-qos syscon              p                    L      qos@fdf67200              rockchip,rk3588-qos syscon              r               qos@fdf70000              rockchip,rk3588-qos syscon                                   5      qos@fdf71000              rockchip,rk3588-qos syscon                                  6      qos@fdf72000              rockchip,rk3588-qos syscon                                   2      qos@fdf72200              rockchip,rk3588-qos syscon              "                    3      qos@fdf72400              rockchip,rk3588-qos syscon              $                    4      qos@fdf80000              rockchip,rk3588-qos syscon                                   O      qos@fdf81000              rockchip,rk3588-qos syscon                                  P      qos@fdf81200              rockchip,rk3588-qos syscon                                  Q      qos@fdf82000              rockchip,rk3588-qos syscon                                   M      qos@fdf82200              rockchip,rk3588-qos syscon              "                    N      dfi@fe060000                                   rockchip,rk3588-dfi       @                       &              0              :               O   g      pcie@fe180000         *    rockchip,rk3588-pcie rockchip,rk3568-pcie              0   ?      0  5     C     H     >     M     R           )  aclk_mst aclk_slv aclk_dbi pclk aux pipe            pci       P                                                                                sys pmc msg legacy err                                          `                    h                      h                     h                     h                                   0    i  0                       w   (         	  |pcie-phy            -      "      T                                                       @      	       @         0     
@       @                                     dbi apb config               )     .      	  pwr pipe                         +           ;okay               j               default            k   l   legacy-interrupt-controller                                                                               h         pcie@fe190000         *    rockchip,rk3588-pcie rockchip,rk3568-pcie              @   O      0  5     D     I     ?     N     S     s      )  aclk_mst aclk_slv aclk_dbi pclk aux pipe            pci       P                                                                                sys pmc msg legacy err                                          `                    m                      m                     m                     m                                   @    i  @                       w   n         	  |pcie-phy            -      "      T                                                       @      
        @         0     
A        @                                     dbi apb config               *     /      	  pwr pipe                         +         	  ;disabled       legacy-interrupt-controller                                                                               m         ethernet@fe1c0000         &    rockchip,rk3588-gmac snps,dwmac-4.20a                                                                     macirq eth_wake_irq       (  5     6     7     Y     ^     5      0  stmmaceth clk_mac_ref pclk_mac aclk_mac ptp_ref         -      !             $      
  stmmaceth              b           *        $   o         4        E   p        X   q         k      	  ;disabled       mdio              snps,dwmac-mdio                      +          stmmac-axi-config           t                                 ~                         o      rx-queues-config                          p   queue0        queue1           tx-queues-config                          q   queue0        queue1              sata@fe210000         '    rockchip,rk3588-dwc-ahci snps,dwc-ahci              !                                    (  5     b     _     e     T     o        sata pmalive rxoob ref asic                                 +            ;okay       sata-port@0                      @          w   n         	  |sata-phy                                     sata@fe230000         '    rockchip,rk3588-dwc-ahci snps,dwc-ahci              #                                    (  5     d     a     g     V     q        sata pmalive rxoob ref asic                                 +          	  ;disabled       sata-port@0                      @          w   (         	  |sata-phy                                     spi@fe2b0000              rockchip,sfc                +        @                               5     /     0        clk_sfc hclk_sfc                         +          	  ;disabled          mmc@fe2c0000          0    rockchip,rk3588-dw-mshc rockchip,rk3288-dw-mshc             ,        @                                5   
      
   	                  biu ciu ciu-drive ciu-sample                                default            r   s   t   u        -      (      	  ;disabled          mmc@fe2d0000          0    rockchip,rk3588-dw-mshc rockchip,rk3288-dw-mshc             -        @                                5                            biu ciu ciu-drive ciu-sample                                default            v        -      %      	  ;disabled          mmc@fe2e0000              rockchip,rk3588-dwcmshc             .                                       <     -     .     ,        L n6        (  5     ,     *     +     -     .        core bus axi block timer                        w   x   y   z   {        default       (                                   core bus axi block timer            ;okay                         *         2         8         F         U      i2s@fe470000              rockchip,rk3588-i2s-tdm             G                                       5      +      /      (        mclk_tx mclk_rx hclk            <      )      -        \                       ,       ,           tx rx           -      &              *      +      
  tx-m rx-m            o        default            |   }   ~              s            ;okay              	      i2s@fe480000              rockchip,rk3588-i2s-tdm             H                                       5     y     }     u        mclk_tx mclk_rx hclk               ,      ,           tx rx                ^     _      
  tx-m rx-m            o        default       (                                        s          	  ;disabled          i2s@fe490000          (    rockchip,rk3588-i2s rockchip,rk3066-i2s             I                                       5                    i2s_clk i2s_hclk            <              \                                   tx rx           -      &        default                             s          	  ;disabled          i2s@fe4a0000          (    rockchip,rk3588-i2s rockchip,rk3066-i2s             J                                       5      %              i2s_clk i2s_hclk            <      "        \                                  tx rx           -      &        default                             s          	  ;disabled          interrupt-controller@fe600000             arm,gic-v3               `             h                       	                            a               8                                                  +                 msi-controller@fe640000           arm,gic-v3-its              d                                        i      msi-controller@fe660000           arm,gic-v3-its              f                                              ppi-partitions     interrupt-partition-0                                        interrupt-partition-1                       	                       dma-controller@fea10000           arm,pl330 arm,primecell                     @                 V              W                        5      n      	  apb_pclk                          ,      dma-controller@fea30000           arm,pl330 arm,primecell                     @                 X              Y                        5      o      	  apb_pclk                                i2c@fea90000          (    rockchip,rk3588-i2c rockchip,rk3399-i2c                              5            {      	  i2c pclk                  >                          default                      +          	  ;disabled          i2c@feaa0000          (    rockchip,rk3588-i2c rockchip,rk3399-i2c                              5            |      	  i2c pclk                  ?                          default                      +            ;okay       usb-typec@22              fcs,fusb302            "                                  default                               ;okay       connector             usb-c-connector         USB-C           dual              B@        dual            d        ',        3source     ports                        +       port@0                 endpoint            R                       port@1                endpoint            R              #         port@2                endpoint            R                                rtc@51            haoyu,hym8563              Q                    hym8563         default                                               B         i2c@feab0000          (    rockchip,rk3588-i2c rockchip,rk3399-i2c                              5            }      	  i2c pclk                  @                          default                      +          	  ;disabled          i2c@feac0000          (    rockchip,rk3588-i2c rockchip,rk3399-i2c                              5            ~      	  i2c pclk                  A                          default                      +          	  ;disabled          i2c@fead0000          (    rockchip,rk3588-i2c rockchip,rk3399-i2c                              5                  	  i2c pclk                  B                          default                      +          	  ;disabled          timer@feae0000        ,    rockchip,rk3588-timer rockchip,rk3288-timer                                     !               5      T      W        pclk timer        watchdog@feaf0000              rockchip,rk3588-wdt snps,dw-wdt                              5      d      c      
  tclk pclk                 ;             spi@feb00000          (    rockchip,rk3588-spi rockchip,rk3066-spi                                    F               5                    spiclk apb_pclk            ,      ,           tx rx           P                            default                      +          	  ;disabled          spi@feb10000          (    rockchip,rk3588-spi rockchip,rk3066-spi                                    G               5                    spiclk apb_pclk            ,      ,           tx rx           P                            default                      +          	  ;disabled          spi@feb20000          (    rockchip,rk3588-spi rockchip,rk3066-spi                                    H               5                    spiclk apb_pclk                             tx rx           P                            default                      +            ;okay            <              L    pmic@0            rockchip,rk806                      W            c                                                      default         s B@                                                                                                                    		           	           	#           	0           	=           	J      dvs1-null-pins          	Vgpio_pwrctrl1         	  	[pin_fun0                     dvs2-null-pins          	Vgpio_pwrctrl2         	  	[pin_fun0                     dvs3-null-pins          	Vgpio_pwrctrl3         	  	[pin_fun0                     regulators     dcdc-reg1            	d         	x        	 dp        	 ~        	  0        	vdd_gpu_s0          	          	            
  '              regulator-state-mem          
.         dcdc-reg2            	d         	x        	 dp        	 ~        	  0        	vdd_npu_s0     regulator-state-mem          
.         dcdc-reg3            	d         	x        	 
L        	 q        	  0        	vdd_log_s0     regulator-state-mem          
.        
G q         dcdc-reg4            	d         	x        	 dp        	 ~        	  0        	vdd_vdenc_s0       regulator-state-mem          
.         dcdc-reg5            	d         	x        	 
L        	 ~        	  0        	          	vdd_gpu_mem_s0          	           
  '               regulator-state-mem          
.         dcdc-reg6            	d         	x        	 
L        	 ~        	  0        	vdd_npu_mem_s0     regulator-state-mem          
.         dcdc-reg7            	d         	x        	         	         	  0        	vdd_2v0_pldo_s3               regulator-state-mem          
c        
G          dcdc-reg8            	d         	x        	 
L        	 ~        	  0        	vdd_vdenc_mem_s0       regulator-state-mem          
.         dcdc-reg9            	d         	x        	vdd2_ddr_s3    regulator-state-mem          
c         dcdc-reg10           	d         	x        	         	         	  0        	vcc_1v1_nldo_s3               regulator-state-mem          
c        
G          pldo-reg1            	d         	x        	 w@        	 w@        	  0        	avcc_1v8_s0              regulator-state-mem          
.         pldo-reg2            	d         	x        	 w@        	 w@        	  0        	vdd1_1v8_ddr_s3    regulator-state-mem          
c        
G w@         pldo-reg3            	d         	x        	 w@        	 w@        	  0        	avcc_1v8_codec_s0                 regulator-state-mem          
.         pldo-reg4            	d         	x        	 2Z        	 2Z        	  0        	vcc_3v3_s3     regulator-state-mem          
c        
G 2Z         pldo-reg5            	d         	x        	 w@        	 2Z        	  0        	vccio_sd_s0    regulator-state-mem          
.         pldo-reg6            	d         	x        	 w@        	 w@        	  0        	vccio_1v8_s3       regulator-state-mem          
c        
G w@         nldo-reg1            	d         	x        	 q        	 q        	  0        	vdd_0v75_s3    regulator-state-mem          
c        
G q         nldo-reg2            	d         	x        	         	         	vdd2l_0v9_ddr_s3       regulator-state-mem          
c        
G          nldo-reg3            	d         	x        	 q        	 q        	vdd_0v75_hdmi_edp_s0       regulator-state-mem          
.         nldo-reg4            	d         	x        	 q        	 q        	avdd_0v75_s0                 regulator-state-mem          
.         nldo-reg5            	d         	x        	 P        	 P        	vdd_0v85_s0    regulator-state-mem          
.               pmic@1            rockchip,rk806                     W            c                                                   default         s B@                                                                                                           		           	           	#           	0           	=           	J      dvs1-null-pins          	Vgpio_pwrctrl1         	  	[pin_fun0                     dvs2-null-pins          	Vgpio_pwrctrl2         	  	[pin_fun0                     dvs3-null-pins          	Vgpio_pwrctrl3         	  	[pin_fun0                     regulators     dcdc-reg1            	d         	x        	 dp        	         	  0        	vdd_cpu_big1_s0               regulator-state-mem          
.         dcdc-reg2            	d         	x        	 dp        	         	  0        	vdd_cpu_big0_s0               regulator-state-mem          
.         dcdc-reg3            	d         	x        	 dp        	 ~        	  0        	vdd_cpu_lit_s0                regulator-state-mem          
.         dcdc-reg4            	d         	x        	 2Z        	 2Z        	  0        	vcc_3v3_s0                regulator-state-mem          
.         dcdc-reg5            	d         	x        	 
L        	         	  0        	vdd_cpu_big1_mem_s0    regulator-state-mem          
.         dcdc-reg6            	d         	x        	 
L        	         	  0        	vdd_cpu_big0_mem_s0    regulator-state-mem          
.         dcdc-reg7            	d         	x        	 w@        	 w@        	  0        	vcc_1v8_s0                regulator-state-mem          
.         dcdc-reg8            	d         	x        	 
L        	 ~        	  0        	vdd_cpu_lit_mem_s0     regulator-state-mem          
.         dcdc-reg9            	d         	x        	vddq_ddr_s0    regulator-state-mem          
.         dcdc-reg10           	d         	x        	 
L        	         	  0        	vdd_ddr_s0     regulator-state-mem          
.         pldo-reg1            	d         	x        	 w@        	 w@        	  0        	vcc_1v8_cam_s0     regulator-state-mem          
.         pldo-reg2            	d         	x        	 w@        	 w@        	  0        	avdd1v8_ddr_pll_s0     regulator-state-mem          
.         pldo-reg3            	d         	x        	 w@        	 w@        	  0        	vdd_1v8_pll_s0     regulator-state-mem          
.         pldo-reg4            	d         	x        	 2Z        	 2Z        	  0        	vcc_3v3_sd_s0      regulator-state-mem          
.         pldo-reg5            	d         	x        	 *        	 *        	  0        	vcc_2v8_cam_s0     regulator-state-mem          
.         pldo-reg6            	d         	x        	 w@        	 w@      	  	pldo6_s3       regulator-state-mem          
c        
G w@         nldo-reg1            	d         	x        	 q        	 q        	  0        	vdd_0v75_pll_s0    regulator-state-mem          
.         nldo-reg2            	d         	x        	 P        	 P        	vdd_ddr_pll_s0     regulator-state-mem          
.         nldo-reg3            	d         	x        	 P        	 P        	  0        	avdd_0v85_s0                 regulator-state-mem          
.         nldo-reg4            	d         	x        	 O        	 O        	  0        	avdd_1v2_cam_s0    regulator-state-mem          
.         nldo-reg5            	d         	x        	 O        	 O        	  0        	avdd_1v2_s0    regulator-state-mem          
.                  spi@feb30000          (    rockchip,rk3588-spi rockchip,rk3066-spi                                    I               5                    spiclk apb_pclk                             tx rx           P                            default                      +          	  ;disabled          serial@feb40000       &    rockchip,rk3588-uart snps,dw-apb-uart                                      L               5                    baudclk apb_pclk               ,      ,   	        tx rx                      default                             	  ;disabled          serial@feb50000       &    rockchip,rk3588-uart snps,dw-apb-uart                                      M               5                    baudclk apb_pclk               ,   
   ,           tx rx                      default                               ;okay          serial@feb60000       &    rockchip,rk3588-uart snps,dw-apb-uart                                      N               5                    baudclk apb_pclk               ,      ,           tx rx                      default                             	  ;disabled          serial@feb70000       &    rockchip,rk3588-uart snps,dw-apb-uart                                      O               5                    baudclk apb_pclk                  	      
        tx rx                      default                             	  ;disabled          serial@feb80000       &    rockchip,rk3588-uart snps,dw-apb-uart                                      P               5                    baudclk apb_pclk                                tx rx                      default                             	  ;disabled          serial@feb90000       &    rockchip,rk3588-uart snps,dw-apb-uart                                      Q               5                    baudclk apb_pclk                                tx rx                      default                             	  ;disabled          serial@feba0000       &    rockchip,rk3588-uart snps,dw-apb-uart                                      R               5                    baudclk apb_pclk               f      f           tx rx                      default                             	  ;disabled          serial@febb0000       &    rockchip,rk3588-uart snps,dw-apb-uart                                      S               5                    baudclk apb_pclk               f   	   f   
        tx rx                      default                             	  ;disabled          serial@febc0000       &    rockchip,rk3588-uart snps,dw-apb-uart                                      T               5                    baudclk apb_pclk               f      f           tx rx                      default                             	  ;disabled          pwm@febd0000          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                              5      L      K      	  pwm pclk                       default                  	  ;disabled          pwm@febd0010          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                             5      L      K      	  pwm pclk                       default                  	  ;disabled          pwm@febd0020          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                              5      L      K      	  pwm pclk                       default                  	  ;disabled          pwm@febd0030          (    rockchip,rk3588-pwm rockchip,rk3328-pwm              0               5      L      K      	  pwm pclk                       default                  	  ;disabled          pwm@febe0000          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                              5      O      N      	  pwm pclk                       default                  	  ;disabled          pwm@febe0010          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                             5      O      N      	  pwm pclk                       default                  	  ;disabled          pwm@febe0020          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                              5      O      N      	  pwm pclk                       default                  	  ;disabled          pwm@febe0030          (    rockchip,rk3588-pwm rockchip,rk3328-pwm              0               5      O      N      	  pwm pclk                       default                  	  ;disabled          pwm@febf0000          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                              5      R      Q      	  pwm pclk                       default                  	  ;disabled          pwm@febf0010          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                             5      R      Q      	  pwm pclk                       default                  	  ;disabled          pwm@febf0020          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                              5      R      Q      	  pwm pclk                       default                  	  ;disabled          pwm@febf0030          (    rockchip,rk3588-pwm rockchip,rk3328-pwm              0               5      R      Q      	  pwm pclk                       default                  	  ;disabled          tsadc@fec00000            rockchip,rk3588-tsadc                                                     5                    tsadc apb_pclk          <              L               V      W        tsadc-apb tsadc         
{         
            
                       
           gpio otpout         
         	  ;disabled          adc@fec10000              rockchip,rk3588-saradc                                                    
           5                    saradc apb_pclk               U        saradc-apb          ;okay            
                   i2c@fec80000          (    rockchip,rk3588-i2c rockchip,rk3399-i2c                              5                  	  i2c pclk                  C                          default                      +          	  ;disabled          i2c@fec90000          (    rockchip,rk3588-i2c rockchip,rk3399-i2c                              5                  	  i2c pclk                  D                          default                      +            ;okay       audio-codec@11            everest,es8388                     5      1        <      1        L                                                      s              
         i2c@feca0000          (    rockchip,rk3588-i2c rockchip,rk3399-i2c                              5                  	  i2c pclk                  E                          default                      +          	  ;disabled          spi@fecb0000          (    rockchip,rk3588-spi rockchip,rk3066-spi                                    J               5                    spiclk apb_pclk            f      f           tx rx           P                            default                      +          	  ;disabled          efuse@fecc0000            rockchip,rk3588-otp                               5                                otp apb_pclk phy arb                                      otp apb arb                      +      cpu-code@2                      id@7                        cpu-leakage@17                      cpu-leakage@18                      cpu-leakage@19                      log-leakage@1a                      gpu-leakage@1b                      cpu-version@1c                        '            npu-leakage@28             (         codec-leakage@29               )            dma-controller@fed10000           arm,pl330 arm,primecell                     @                 Z              [                        5      p      	  apb_pclk                          f      phy@fed60000              rockchip,rk3588-hdptx-phy                                 5          T        ref apb                   8       #          c     d     e     !     "      "  phy apb init cmn lane ropll lcpll                    	  ;disabled          phy@fed80000              rockchip,rk3588-usbdp-phy                                           5          l     V           refclk immortal pclk utmi         (                                       init cmn lane pcs_apb pma_apb           ,           ?           P           f           ;okay             v                    j                  j                  "   port                         +       endpoint@0                      R                    endpoint@1                     R                          phy@fee00000              rockchip,rk3588-naneng-combphy                               5          v     W        ref apb pipe            <             L                         <     C        phy apb            *                   ;okay               n      phy@fee20000              rockchip,rk3588-naneng-combphy                               5          x     W        ref apb pipe            <             L                         >     E        phy apb            *                   ;okay               (      sram@ff001000         
    mmio-sram                                                                +         pinctrl           rockchip,rk3588-pinctrl                                          +                 gpio@fd8a0000             rockchip,gpio-bank                                                    5     q     r         c                                        W                               gpio@fec20000             rockchip,gpio-bank                                                    5      s      t         c                                        W                              gpio@fec30000             rockchip,gpio-bank                                                    5      u      v         c                  @                     W                    gpio@fec40000             rockchip,gpio-bank                                                    5      w      x         c                  `                     W                               gpio@fec50000             rockchip,gpio-bank                                                    5      y      z         c                                       W                         j      pcfg-pull-up                              pcfg-pull-down                            pcfg-pull-none                            pcfg-pull-none-drv-level-2                                       pcfg-pull-up-drv-level-1                                         pcfg-pull-up-drv-level-2                                         pcfg-pull-none-smt                                     auddsm        bt1120        can0          can1          can2          cif       clk32k        cpu       ddrphych0         ddrphych1         ddrphych2         ddrphych3         dp0       dp1       emmc       emmc-rstnout            2                       w      emmc-bus8           2                                                                                                           x      emmc-clk            2                       y      emmc-cmd            2                        z      emmc-data-strobe            2                       {         eth1          fspi          gmac1         gpu       hdmi          i2c0       i2c0m0-xfer          2                                     +         i2c1       i2c1m0-xfer          2          	             	                       i2c2       i2c2m0-xfer          2          	             	                       i2c3       i2c3m0-xfer          2         	            	                       i2c4       i2c4m0-xfer          2         	            	                       i2c5       i2c5m0-xfer          2         	            	                       i2c6       i2c6m0-xfer          2          	             	                       i2c7       i2c7m0-xfer          2         	            	                       i2c8       i2c8m0-xfer          2         	            	                       i2s0       i2s0-lrck           2                       |      i2s0-mclk           2                       }      i2s0-sclk           2                       ~      i2s0-sdi0           2                             i2s0-sdo0           2                                i2s1       i2s1m0-lrck         2                             i2s1m0-sclk         2                             i2s1m0-sdi0         2                             i2s1m0-sdi1         2                             i2s1m0-sdi2         2                             i2s1m0-sdi3         2                             i2s1m0-sdo0         2      	                       i2s1m0-sdo1         2      
                       i2s1m0-sdo2         2                             i2s1m0-sdo3         2                                i2s2       i2s2m1-lrck         2                             i2s2m1-sclk         2                             i2s2m1-sdi          2      
                       i2s2m1-sdo          2                                i2s3       i2s3-lrck           2                             i2s3-sclk           2                             i2s3-sdi            2                             i2s3-sdo            2                                jtag          litcpu        mcu       mipi          npu       pcie20x1          pcie30phy         pcie30x1          pcie30x2          pcie30x4          pdm0          pdm1          pmic       pmic-pins         p  2                                                                                                                pmu       pwm0       pwm0m0-pins         2                        .         pwm1       pwm1m0-pins         2                        /         pwm2       pwm2m0-pins         2                        0         pwm3       pwm3m0-pins         2                        1         pwm4       pwm4m0-pins         2                                 pwm5       pwm5m0-pins         2       	                          pwm6       pwm6m0-pins         2                                 pwm7       pwm7m0-pins         2                                 pwm8       pwm8m0-pins         2                                pwm9       pwm9m0-pins         2                                pwm10      pwm10m0-pins            2                                 pwm11      pwm11m0-pins            2                                pwm12      pwm12m0-pins            2                                pwm13      pwm13m0-pins            2                                pwm14      pwm14m0-pins            2                                pwm15      pwm15m0-pins            2                                refclk        sata          sata0         sata1         sata2         sdio       sdiom1-pins       `  2                                                                                    v         sdmmc      sdmmc-bus4        @  2                                                           u      sdmmc-clk           2                       r      sdmmc-cmd           2                       s      sdmmc-det           2                        t         spdif0        spdif1        spi0       spi0m0-pins       0  2                                                        spi0m0-cs0          2                              spi0m0-cs1          2                                 spi1       spi1m1-pins       0  2                                                     spi1m1-cs0          2                             spi1m1-cs1          2                                spi2       spi2m2-pins       0  2                                                        spi2m2-cs0          2       	                       spi2m2-cs1          2                                 spi3       spi3m1-pins       0  2                                                     spi3m1-cs0          2                             spi3m1-cs1          2                                spi4       spi4m0-pins       0  2                                                     spi4m0-cs0          2                             spi4m0-cs1          2                                tsadc      tsadc-shut          2                                 uart0      uart0m1-xfer             2                    	                 -         uart1      uart1m1-xfer             2         
            
                       uart2      uart2m0-xfer             2          
             
                       uart3      uart3m1-xfer             2         
            
                       uart4      uart4m1-xfer             2         
            
                       uart5      uart5m1-xfer             2         
            
                       uart6      uart6m1-xfer             2          
            
                       uart7      uart7m1-xfer             2         
            
                       uart8      uart8m1-xfer             2         
            
                       uart9      uart9m1-xfer             2         
            
                       vop       bt656         gpio-func      tsadc-gpio-func         2                                  eth0          gmac0      gmac0-miim           2                                         gmac0-rx-bus2         0  2                                                     gmac0-tx-bus2         0  2                                                     gmac0-rgmii-clk          2                                         gmac0-rgmii-bus       @  2                              	            
                          audio      headphone-detect            2                             headphone-amplifier-en          2                             speaker-amplifier-en            2                                rtl8111    rtl8111-isolate         2                        l         rtl8211f       rtl8211f-rst            2                                 hym8563    hym8563-int         2                                  pcie2      pcie2-1-rst         2                        k         pcie3      pcie3-reset         2                              vcc3v3-pcie30-en            2                                usb    vcc5v0-host-en          2                                usb-typec      typec5v-pwren           2                             usbc0-int           2                                    usb@fc400000              rockchip,rk3588-dwc3 snps,dwc3              @       @                                5                       ref_clk suspend_clk bus_clk         ohost            w                 |usb2-phy usb3-phy         
  utmi_wide           -                   S                                             ;okay          syscon@fd5b8000       %    rockchip,rk3588-pcie3-phy-grf syscon                [                        syscon@fd5c0000       $    rockchip,rk3588-pipe-phy-grf syscon             \                         syscon@fd5cc000       $    rockchip,rk3588-usbdpphy-grf syscon             \       @                  syscon@fd5d4000       .    rockchip,rk3588-usb2phy-grf syscon simple-mfd               ]@       @                      +                 usb2phy@4000              rockchip,rk3588-usb2phy           @                        5             phyclk          usb480m_phy1                                      n             phy apb         ;okay                  otg-port                        ;okay                           i2s@fddc8000              rockchip,rk3588-i2s-tdm             ܀                                      5                       mclk_tx mclk_rx hclk            <             \                 f           tx          -                           tx-m            s          	  ;disabled          i2s@fddf4000              rockchip,rk3588-i2s-tdm             @                                      5     9     9     ?        mclk_tx mclk_rx hclk            <     6        \                 f           tx          -                           tx-m            s          	  ;disabled          i2s@fddf8000              rockchip,rk3588-i2s-tdm             ߀                                      5     +     +     '        mclk_tx mclk_rx hclk            <     (        \                 f           rx          -                           rx-m            s          	  ;disabled          i2s@fde00000              rockchip,rk3588-i2s-tdm                                                    5     &     &     "        mclk_tx mclk_rx hclk            <     #        \                 f           rx          -                           rx-m            s          	  ;disabled          pcie@fe150000         *    rockchip,rk3588-pcie rockchip,rk3568-pcie                        +                        0  5     @     E     ;     J     O     t      )  aclk_mst aclk_slv aclk_dbi pclk aux pipe            pci       P                                                                           sys pmc msg legacy err                                          `                                                                                                                                                       w         	  |pcie-phy            -      "      T                                                       @      	        @         0     
@        @                                     dbi apb config               &     +      	  pwr pipe            ;okay            default                       j               @      legacy-interrupt-controller                                                                                       pcie@fe160000         *    rockchip,rk3588-pcie rockchip,rk3568-pcie                        +                       0  5     A     F     <     K     P     u      )  aclk_mst aclk_slv aclk_dbi pclk aux pipe            pci       P                                                                              sys pmc msg legacy err                                          `                                                                                                                                                    w         	  |pcie-phy            -      "      T                                                       @      	@       @         0     
@@       @                                     dbi apb config               '     ,      	  pwr pipe          	  ;disabled       legacy-interrupt-controller                                                                                        pcie@fe170000         *    rockchip,rk3588-pcie rockchip,rk3568-pcie                  /      0  5     B     G     =     L     Q           )  aclk_mst aclk_slv aclk_dbi pclk aux pipe            pci       P                                                                                sys pmc msg legacy err                                          `                                                                                                                            i                          w            	  |pcie-phy            -      "      T                                                       @      	       @         0     
@       @                                     dbi apb config               (     -      	  pwr pipe                         +         	  ;disabled       legacy-interrupt-controller                                                                                        ethernet@fe1b0000         &    rockchip,rk3588-gmac snps,dwmac-4.20a                                                                     macirq eth_wake_irq       (  5     6     7     X     ]     4      0  stmmaceth clk_mac_ref pclk_mac aclk_mac ptp_ref         -      !             #      
  stmmaceth              b           *        $            4        E           X            k        ;okay            Poutput          ]           hrgmii-rxid                                 default         q            z   C   mdio              snps,dwmac-mdio                      +       ethernet-phy@1            ethernet-phy-id001c.c916                       default                      N                     j                          stmmac-axi-config           t                                 ~                               rx-queues-config                             queue0        queue1           tx-queues-config                             queue0        queue1              sata@fe220000         '    rockchip,rk3588-dwc-ahci snps,dwc-ahci              "                                    (  5     c     `     f     U     p        sata pmalive rxoob ref asic                                 +          	  ;disabled       sata-port@0                      @          w            	  |sata-phy                                     phy@fed90000              rockchip,rk3588-usbdp-phy                                           5          m     W           refclk immortal pclk utmi         (                                       init cmn lane pcs_apb pma_apb           ,           ?           P           f           ;okay                                   phy@fee10000              rockchip,rk3588-naneng-combphy                               5          w     W        ref apb pipe            <             L                         =     D        phy apb            *                	  ;disabled                     phy@fee80000              rockchip,rk3588-pcie3-phy                                            5     y        pclk                 H        phy            *                  ;okay                     chosen          serial2:1500000n8         adc-keys          	    adc-keys                         buttons          w@           d   button-vol-up         
  Volume Up              s        '  Bh      button-vol-down         Volume Down            r        ' \      button-menu         Menu                       '       button-escape           Escape                     ' 8         analog-sound              simple-audio-card           default                   ARK3588 EVB1 Audio           X            s          i2s                                              Headphones Speaker       d  $Speaker Amplifier INL LOUT2 Speaker Amplifier INR ROUT2 Speaker Speaker Amplifier OUTL Speaker Speaker Amplifier OUTR Headphones Amplifier INL LOUT1 Headphones Amplifier INR ROUT1 Headphones Headphones Amplifier OUTL Headphones Headphones Amplifier OUTR LINPUT1 Onboard Microphone RINPUT1 Onboard Microphone LINPUT2 Microphone Jack RINPUT2 Microphone Jack       ^  >Microphone Microphone Jack Microphone Onboard Microphone Headphone Headphones Speaker Speaker      simple-audio-card,cpu           X  	      simple-audio-card,codec         X  
        b                     headphone-amplifier           simple-audio-amplifier          y                 default                   Headphones Amplifier                    speaker-amplifier             simple-audio-amplifier          y                 default                   Speaker Amplifier                   backlight             pwm-backlight                             a          pcie20-avdd0v85-regulator             regulator-fixed         	pcie20_avdd0v85          	d         	x        	 P        	 P                pcie20-avdd1v8-regulator              regulator-fixed         	pcie20_avdd1v8           	d         	x        	 w@        	 w@                pcie30-avdd0v75-regulator             regulator-fixed         	pcie30_avdd0v75          	d         	x        	 q        	 q                pcie30-avdd1v8-regulator              regulator-fixed         	pcie30_avdd1v8           	d         	x        	 w@        	 w@                vbus5v0-typec-regulator           regulator-fixed                     j               default                   	vbus5v0_typec           	 LK@        	 LK@                           vcc12v-dcin-regulator             regulator-fixed         	vcc12v_dcin          	d         	x        	          	                  vcc3v3-pcie30-regulator           regulator-fixed         	vcc3v3_pcie30           	 2Z        	 2Z                                                       default                            vcc5v0-host-regulator             regulator-fixed         	vcc5v0_host          	x         	d        	 LK@        	 LK@                    j               default                                )      vcc5v0-sys-regulator              regulator-fixed         	vcc5v0_sys           	d         	x        	 LK@        	 LK@                           vcc5v0-usbdcin-regulator              regulator-fixed         	vcc5v0_usbdcin           	d         	x        	 LK@        	 LK@                          vcc5v0-usb-regulator              regulator-fixed         	vcc5v0_usb           	d         	x        	 LK@        	 LK@                             	compatible interrupt-parent #address-cells #size-cells model gpio0 gpio1 gpio2 gpio3 gpio4 i2c0 i2c1 i2c2 i2c3 i2c4 i2c5 i2c6 i2c7 i2c8 serial0 serial1 serial2 serial3 serial4 serial5 serial6 serial7 serial8 serial9 spi0 spi1 spi2 spi3 spi4 ethernet0 mmc0 cpu device_type reg enable-method capacity-dmips-mhz clocks assigned-clocks assigned-clock-rates cpu-idle-states i-cache-size i-cache-line-size i-cache-sets d-cache-size d-cache-line-size d-cache-sets next-level-cache dynamic-power-coefficient #cooling-cells cpu-supply phandle entry-method local-timer-stop arm,psci-suspend-param entry-latency-us exit-latency-us min-residency-us cache-level cache-unified ports arm,smc-id shmem #clock-cells #reset-cells interrupts clock-frequency clock-output-names interrupt-names ranges clock-names operating-points-v2 power-domains status mali-supply sram-supply opp-hz opp-microvolt dr_mode phys phy-names phy_type resets snps,dis_enblslpm_quirk snps,dis-u1-entry-quirk snps,dis-u2-entry-quirk snps,dis-u2-freeclk-exists-quirk snps,dis-del-phy-power-chg-quirk snps,dis-tx-ipgap-linecheck-quirk usb-role-switch remote-endpoint snps,dis_rxdet_inp3_quirk #iommu-cells reset-names #phy-cells phy-supply rockchip,grf pinctrl-0 pinctrl-names dmas dma-names reg-shift reg-io-width #pwm-cells #power-domain-cells pm_qos reg-names iommus rockchip,vop-grf rockchip,vo1-grf rockchip,pmu assigned-clock-parents #sound-dai-cells bus-range #interrupt-cells interrupt-map-mask interrupt-map linux,pci-domain max-link-speed msi-map num-lanes reset-gpios interrupt-controller rockchip,php-grf snps,axi-config snps,mixed-burst snps,mtl-rx-config snps,mtl-tx-config snps,tso snps,blen snps,wr_osr_lmt snps,rd_osr_lmt snps,rx-queues-to-use snps,tx-queues-to-use ports-implemented hba-port-cap snps,rx-ts-max snps,tx-ts-max fifo-depth max-frequency bus-width no-sdio no-sd non-removable mmc-hs400-1_8v mmc-hs400-enhanced-strobe rockchip,trcm-sync-tx-only mbi-alias mbi-ranges msi-controller #msi-cells affinity arm,pl330-periph-burst #dma-cells vbus-supply label data-role op-sink-microwatt power-role sink-pdos source-pdos try-power-role wakeup-source num-cs #gpio-cells gpio-controller spi-max-frequency system-power-controller vcc1-supply vcc2-supply vcc3-supply vcc4-supply vcc5-supply vcc6-supply vcc7-supply vcc8-supply vcc9-supply vcc10-supply vcc11-supply vcc12-supply vcc13-supply vcc14-supply vcca-supply pins function regulator-always-on regulator-boot-on regulator-min-microvolt regulator-max-microvolt regulator-ramp-delay regulator-name regulator-enable-ramp-delay regulator-coupled-with regulator-coupled-max-spread regulator-off-in-suspend regulator-suspend-microvolt regulator-on-in-suspend rockchip,hw-tshut-temp rockchip,hw-tshut-mode rockchip,hw-tshut-polarity pinctrl-1 #thermal-sensor-cells #io-channel-cells vref-supply AVDD-supply DVDD-supply HPVDD-supply bits rockchip,u2phy-grf rockchip,usb-grf rockchip,usbdpphy-grf rockchip,vo-grf mode-switch orientation-switch sbu1-dc-gpios sbu2-dc-gpios rockchip,pipe-grf rockchip,pipe-phy-grf gpio-ranges bias-pull-up bias-pull-down bias-disable drive-strength input-schmitt-enable rockchip,pins vpcie3v3-supply clock_in_out phy-handle phy-mode rx_delay tx_delay reset-assert-us reset-deassert-us rockchip,dp-lane-mux rockchip,phy-grf stdout-path io-channels io-channel-names keyup-threshold-microvolt poll-interval linux,code press-threshold-microvolt simple-audio-card,name simple-audio-card,aux-devs simple-audio-card,bitclock-master simple-audio-card,format simple-audio-card,frame-master simple-audio-card,hp-det-gpio simple-audio-card,mclk-fs simple-audio-card,pin-switches simple-audio-card,routing simple-audio-card,widgets sound-dai system-clock-frequency enable-gpios sound-name-prefix power-supply pwms vin-supply enable-active-high startup-delay-us 