     8     (                                                                                 3   ,Gateworks Venice GW72xx-0x i.MX8MM Development Kit           2gw,imx8mm-gw72xx-0x    aliases       &   =/soc@0/bus@30800000/ethernet@30be0000         "   G/soc@0/bus@30000000/gpio@30200000         "   M/soc@0/bus@30000000/gpio@30210000         "   S/soc@0/bus@30000000/gpio@30220000         "   Y/soc@0/bus@30000000/gpio@30230000         "   _/soc@0/bus@30000000/gpio@30240000         !   e/soc@0/bus@30800000/i2c@30a20000          !   j/soc@0/bus@30800000/i2c@30a30000          !   o/soc@0/bus@30800000/i2c@30a40000          !   t/soc@0/bus@30800000/i2c@30a50000          !   y/soc@0/bus@30800000/mmc@30b40000          !   ~/soc@0/bus@30800000/mmc@30b50000          !   /soc@0/bus@30800000/mmc@30b60000          6   /soc@0/bus@30800000/spba-bus@30800000/serial@30860000         6   /soc@0/bus@30800000/spba-bus@30800000/serial@30890000         6   /soc@0/bus@30800000/spba-bus@30800000/serial@30880000         $   /soc@0/bus@30800000/serial@30a60000       3   /soc@0/bus@30800000/spba-bus@30800000/spi@30820000        3   /soc@0/bus@30800000/spba-bus@30800000/spi@30830000        3   /soc@0/bus@30800000/spba-bus@30800000/spi@30840000        9   /soc@0/pcie@33800000/pcie@0,0/pcie@1,0/pcie@2,3/pcie@5,0          !   /soc@0/bus@32c00000/usb@32e40000          !   /soc@0/bus@32c00000/usb@32e50000          cpus                                 idle-states          psci       cpu-pd-wait          2arm,idle-state             3                                       !  
        2            cpu@0           :cpu          2arm,cortex-a53          F            J  l        X              _psci            m           z   @                                 @                                                    speed_grade                               &           2   
      cpu@1           :cpu          2arm,cortex-a53          F           J  l        X              _psci            m           z   @                                 @                                                               &           2         cpu@2           :cpu          2arm,cortex-a53          F           J  l        X              _psci            m           z   @                                 @                                                               &           2         cpu@3           :cpu          2arm,cortex-a53          F           J  l        X              _psci            m           z   @                                 @                                                               &           2         l2-cache0            2cache           1           o           |   @                   2            opp-table            2operating-points-v2          =        2      opp-1200000000          H    G         O P        ]              n I               opp-1600000000          H    _^         O ~        ]              n I               opp-1800000000          H    kI         O B@        ]              n I                  clock-osc-32k            2fixed-clock                                osc_32k         2         clock-osc-24m            2fixed-clock                     n6         osc_24m         2         clock-ext1           2fixed-clock                     k@      	  clk_ext1            2         clock-ext2           2fixed-clock                     k@      	  clk_ext2            2         clock-ext3           2fixed-clock                     k@      	  clk_ext3            2         clock-ext4           2fixed-clock                     k@      	  clk_ext4            2         psci             2arm,psci-1.0             smc       pmu          2arm,cortex-a53-pmu                        timer            2arm,armv8-timer       0                                
           z                thermal-zones      cpu-thermal                                    trips      trip0            L                  Apassive         2   	      trip1            s                	  Acritical            2   X         cooling-maps       map0            (   	      0  -   
                        usbphynop1          <             2usb-nop-xceiv           X              G              W      2      	  nmain_clk            z           2   @      usbphynop2          <             2usb-nop-xceiv           X              G              W      2      	  nmain_clk            z           2   C      soc@0            2fsl,imx8mm-soc simple-bus                                                >           @       @                         soc_unique_id           2   Y   bus@30000000             2fsl,aips-bus simple-bus         F0    @                                   0   0    @          2   Z   spba-bus@30000000            2fsl,spba-bus simple-bus                                  F0                       2   [   sai@30010000                         2fsl,imx8mm-sai fsl,imx8mq-sai           F0                    _            X                                  nbus mclk1 mclk2 mclk3                                               rx tx         	  disabled            2   \      sai@30020000                         2fsl,imx8mm-sai fsl,imx8mq-sai           F0                    `            X                                  nbus mclk1 mclk2 mclk3                                              rx tx         	  disabled            2   ]      sai@30030000                         2fsl,imx8mm-sai fsl,imx8mq-sai           F0                    2            X                                  nbus mclk1 mclk2 mclk3                                              rx tx           okay            default                    G      n        W      &        w          2   ^      sai@30050000                         2fsl,imx8mm-sai fsl,imx8mq-sai           F0                    Z            X                                  nbus mclk1 mclk2 mclk3                               	               rx tx         	  disabled            2   _      sai@30060000                         2fsl,imx8mm-sai fsl,imx8mq-sai           F0                    Z            X                                  nbus mclk1 mclk2 mclk3                  
                            rx tx         	  disabled            2   `      audio-controller@30080000            2fsl,imx8mm-micfil           F0           0         m          n          ,          -         (  X                  &      '            )  nipg_clk ipg_clk_app pll8k pll11k clkext3                                rx        	  disabled            2   a      spdif@30090000           2fsl,imx35-spdif         F0	                             P  X      ^            r                           ^                           :  ncore rxtx0 rxtx1 rxtx2 rxtx3 rxtx4 rxtx5 rxtx6 rxtx7 spba                                              rx tx         	  disabled            2   b         gpio@30200000            2fsl,imx8mm-gpio fsl,imx35-gpio          F0                     @          A           X                                   
                   0          
         G  <rs485_term mipi_gpio4     pci_usb_sel dio0  dio1                                2   U      gpio@30210000            2fsl,imx8mm-gpio fsl,imx35-gpio          F0!                    B          C           X                                   
                   0          (           2   (      gpio@30220000            2fsl,imx8mm-gpio fsl,imx35-gpio          F0"                    D          E           X                                   
                   0          =           2   c      gpio@30230000            2fsl,imx8mm-gpio fsl,imx35-gpio          F0#                    F          G           X                                   
                   0          W          W  <rs485_en mipi_gpio3 rs485_hd mipi_gpio2 mipi_gpio1   pci_wdis#                                  2   ,   rs485_en          	  rs485_en                                             gpio@30240000            2fsl,imx8mm-gpio fsl,imx35-gpio          F0$                    H          I           X                                   
                   0          w           2   "      tmu@30260000             2fsl,imx8mm-tmu          F0&             X              L            2         watchdog@30280000            2fsl,imx8mm-wdt fsl,imx21-wdt            F0(                    N           X              okay            default                     b        2   d      watchdog@30290000            2fsl,imx8mm-wdt fsl,imx21-wdt            F0)                    O           X            	  disabled            2   e      watchdog@302a0000            2fsl,imx8mm-wdt fsl,imx21-wdt            F0*                    
           X            	  disabled            2   f      dma-controller@302c0000           2fsl,imx8mm-sdma fsl,imx8mq-sdma         F0,                    g           X                    nipg ahb         w           imx/sdma/sdma-imx7d.bin         2         dma-controller@302b0000           2fsl,imx8mm-sdma fsl,imx8mq-sdma         F0+                    "           X                    nipg ahb         w           imx/sdma/sdma-imx7d.bin         2   g      pinctrl@30330000             2fsl,imx8mm-iomuxc           F03             default                    2      fec1grp      h     h                    l                 p                    t                    x                    |                                                                                                                                                                                       \                      2   9      gscgrp                             Y        2   '      i2c1grp       0      |            @                 @         2   &      i2c2grp       0                  @                  @         2   *      uart2grp          `    <              @  @                @  P               @  L               @        2         usdhc3grp            8                 <                                                    $                 (                 0                    h                 l                 p                  d                     2   4      usdhc3-100mhzgrp             8                 <                                                    $                 (                 0                    h                 l                 p                  d                     2   5      usdhc3-200mhzgrp             8                 <                                                    $                 (                 0                    h                 l                 p                  d                     2   6      wdoggrp            0                        2         hoggrp              P           @  A   @              @  A  x             @  A   D              @  A   L              @  A   (              @   \             @   d             @         2         accelgrp              p               Y        2   +      gpioledgrp        0      X                  T                      2   S      i2c3grp       0    $              @   (              @         2   -      pcie0grp              t                A        2   J      ppsgrp             d                 A        2   T      regusb1grp        0     X                 A   \                A        2   V      regusb2grp             H                 A        2   W      sai3grp       x      @                   D                   L                   H                   <                       2         spi2grp       `      l                   p                   t                   x                      2   !      uart1grp          0    4              @  8                @        2   #      uart3grp          0    D             @  H                @        2   $      uart4grp          0    L             @  P                @        2   .      usdhc1grp                                                                                                                                     2   h      usdhc2grp                <                   @                   D                   H                   L                   P                      2   /      usdhc2-100mhzgrp                 <                   @                   D                   H                   L                   P                      2   1      usdhc2-200mhzgrp                 <                   @                   D                   H                   L                   P                      2   2      usdhc2gpiogrp         H       8                  T                 8                       2   0         iomuxc-gpr@30340000       2   2fsl,imx8mm-iomuxc-gpr fsl,imx6q-iomuxc-gpr syscon           F04             2   8      efuse@30350000           2fsl,imx8mm-ocotp syscon         F05             X                                       2   i   unique-id@4         F              2         speed-grade@10          F              2         mac-address@90          F              2   7         anatop@30360000          2fsl,imx8mm-anatop syscon            F06             2   j      snvs@30370000         #   2fsl,sec-v4.0-mon syscon simple-mfd          F07             2      snvs-rtc-lp          2fsl,sec-v4.0-mon-rtc-lp                       4                                    X            	  nsnvs-rtc            2   k      snvs-powerkey            2fsl,sec-v4.0-pwrkey                                      X              nsnvs-pwrkey            t               	  disabled            2   l      snvs-lpgpr        +   2fsl,imx8mm-snvs-lpgpr fsl,imx7d-snvs-lpgpr          2   m         clock-controller@30380000            2fsl,imx8mm-ccm          F08                        X                        4  nosc_32k osc_24m clk_ext1 clk_ext2 clk_ext3 clk_ext4       @  G      B            [      ^      `                           W      8      ,      /      8                     ׄ ׄ ,#gp          2         reset-controller@30390000         %   2fsl,imx8mm-src fsl,imx8mq-src syscon            F09                    Y                      2         gpc@303a0000             2fsl,imx8mm-gpc          F0:                    W                         
                   2   n   pgc                              power-domain@0                      F            X      X        G      X        W      @        2         power-domain@1                      F           z           X              2   H      power-domain@2                      F           2         power-domain@3                      F           2         power-domain@4                      F           X            Z        G      Y      Z        W      8      8        / ׄ         2         power-domain@5                      F            X      Z                                         z           2   K      power-domain@6                      F           X              G      T        W      8        2   M      power-domain@7                      F           2   N      power-domain@8                      F           2   O      power-domain@9                      F   	        2   P      power-domain@10                     F   
        X                    G      U      V        W      A      8        e          2   =      power-domain@11                     F           2   >               bus@30400000             2fsl,aips-bus simple-bus         F0@   @                                   0@  0@   @          2   o   pwm@30660000             2fsl,imx8mm-pwm fsl,imx27-pwm            F0f                    Q           X                    nipg per                  	  disabled            2   p      pwm@30670000             2fsl,imx8mm-pwm fsl,imx27-pwm            F0g                    R           X                    nipg per                  	  disabled            2   q      pwm@30680000             2fsl,imx8mm-pwm fsl,imx27-pwm            F0h                    S           X                    nipg per                  	  disabled            2   r      pwm@30690000             2fsl,imx8mm-pwm fsl,imx27-pwm            F0i                    T           X                    nipg per                  	  disabled            2   s      timer@306a0000           2nxp,sysctr-timer            F0j                    /           X           nper         2   t         bus@30800000             2fsl,aips-bus simple-bus         F0   @                                   0  0   @                   2   u   spba-bus@30800000            2fsl,spba-bus simple-bus                                  F0                      2   v   spi@30820000          !   2fsl,imx8mm-ecspi fsl,imx51-ecspi                                      F0                               X                    nipg per                                             rx tx         	  disabled            2   w      spi@30830000          !   2fsl,imx8mm-ecspi fsl,imx51-ecspi                                      F0                                X                    nipg per                                            rx tx           okay            default            !           "              2   x      spi@30840000          !   2fsl,imx8mm-ecspi fsl,imx51-ecspi                                      F0                    !           X                    nipg per                                            rx tx         	  disabled            2   y      serial@30860000          2fsl,imx8mm-uart fsl,imx6q-uart          F0                               X                    nipg per                                              rx tx           okay            default            #        2   z      serial@30880000          2fsl,imx8mm-uart fsl,imx6q-uart          F0                               X                    nipg per                                              rx tx           okay            default            $        2   {      serial@30890000            "                 "               2fsl,imx8mm-uart fsl,imx6q-uart          F0                               X                    nipg per         okay            default                    2   |         crypto@30900000          2fsl,sec-v4.0                                     F0                 0                    [           X      ]      _      	  naclk ipg            2   }   jr@1000          2fsl,sec-v4.0-job-ring           F                     i         	  disabled            2   ~      jr@2000          2fsl,sec-v4.0-job-ring           F                      j           2         jr@3000          2fsl,sec-v4.0-job-ring           F  0                   r           2            i2c@30a20000             2fsl,imx8mm-i2c fsl,imx21-i2c                                      F0                    #           X              okay                     default            &        2      gsc@20           2gw,gsc          F               '             (                       
                                             2   )   adc          2gw,gsc-adc                               channel@6           
            F           temp          channel@8           
           F           vdd_bat       channel@16          
           F         	  fan_tach          channel@82          
           F           vdd_vin           VT        channel@84          
           F         	  vdd_adc1              '  '      channel@86          
           F         	  vdd_adc2              '  '      channel@88          
           F         	  vdd_dram          channel@8c          
           F           vdd_1p2       channel@8e          
           F           vdd_1p0       channel@90          
           F           vdd_2p5           '  '      channel@92          
           F           vdd_3p3           '  '      channel@98          
           F         	  vdd_0p95          channel@9a          
           F           vdd_1p8       channel@a2          
           F           vdd_gsc           '  '         fan-controller@0                                       2gw,gsc-fan          F   
         gpio@23          2nxp,pca9555         F   #                                 )                   2   R      eeprom@50            2atmel,24c02         F   P        0         eeprom@51            2atmel,24c02         F   Q        0         eeprom@52            2atmel,24c02         F   R        0         eeprom@53            2atmel,24c02         F   S        0         rtc@68           2dallas,ds1672           F   h      pmic@69          2mps,mp5416          F   i   regulators     buck1           9buck1           H 5         ` B@        x 9         g                        buck2           9buck2           H 5         `         x !         OX                        buck3           9buck3           H 5         ` B@        x 9         g                 2         buck4           9buck4           H w@        ` w@        x !         OX                        ldo1            9ldo1            H w@        ` w@                        ldo2            9ldo2            H 5         ` 5                         ldo3            9ldo3            H         `                         ldo4            9ldo4            H w@        ` w@                                 i2c@30a30000             2fsl,imx8mm-i2c fsl,imx21-i2c                                      F0                    $           X              okay                     default            *        2      eeprom@52            2atmel,24c32         F   R        0          accelerometer@19            default            +         2st,lis2de12         F                           ,                      INT1             i2c@30a40000                                       2fsl,imx8mm-i2c fsl,imx21-i2c            F0                    %           X              okay                     default            -        2         i2c@30a50000             2fsl,imx8mm-i2c fsl,imx21-i2c                                      F0                    &           X            	  disabled            2         serial@30a60000          2fsl,imx8mm-uart fsl,imx6q-uart          F0                               X                    nipg per                                              rx tx         	  disabled           default            .        2         mailbox@30aa0000             2fsl,imx8mm-mu fsl,imx6sx-mu         F0                    X           X                         2         mmc@30b40000          !   2fsl,imx8mm-usdhc fsl,imx7d-usdhc            F0                               X      _      S              nipg ahb per                                        	  disabled            2         mmc@30b50000          !   2fsl,imx8mm-usdhc fsl,imx7d-usdhc            F0                               X      _      S              nipg ahb per                                          okay          "  default state_100mhz state_200mhz              /   0        '   1   0        1   2   0        ;   (              D   3        2         mmc@30b60000          !   2fsl,imx8mm-usdhc fsl,imx7d-usdhc            F0                               X      _      S              nipg ahb per                                          okay          "  default state_100mhz state_200mhz              4        '   5        1   6         P        2         spi@30bb0000                                       2nxp,imx8mm-fspi         F0                   ^fspi_base fspi_mmap                k           X                    nfspi_en fspi          	  disabled            2         dma-controller@30bd0000           2fsl,imx8mm-sdma fsl,imx8mq-sdma         F0                               X            ]        nipg ahb         w           imx/sdma/sdma-imx7d.bin         2          ethernet@30be0000         -   2fsl,imx8mm-fec fsl,imx8mq-fec fsl,imx6sx-fec            F0           0         v          w          x          y         (  X                  u      t      v      "  nipg ahb ptp enet_clk_ref enet_out            G      R      u      t      v         W      6      :      ;      9             sY@            h           z              7        mac-address            8              okay            default            9      	  rgmii-id               :        2      mdio                                 ethernet-phy@0           2ethernet-phy-ieee802.3-c22          F                                                        2   :               bus@32c00000             2fsl,aips-bus simple-bus         F2   @                                   2  2   @          2      csi@32e20000             2fsl,imx8mm-csi fsl,imx7-csi         F2                               X              nmclk            z   ;          	  disabled            2      port       endpoint               <        2   ?            blk-ctrl@32e28000             2fsl,imx8mm-disp-blk-ctrl syscon         F2            z   =   =   =   >   >      '  bus csi-bridge lcdif mipi-dsi mipi-csi        P  X                                                                  o  ncsi-bridge-axi csi-bridge-apb csi-bridge-core lcdif-axi lcdif-apb lcdif-pix dsi-pclk dsi-ref csi-aclk csi-pclk                     2   ;      mipi-csi@32e30000            2fsl,imx8mm-mipi-csi2            F2                               G                    W      A      A        -@         X                                npclk wrap phy axi           z   ;         	  disabled            2      ports                                port@0          F          port@1          F      endpoint               ?        2   <               usb@32e40000             2fsl,imx8mm-usb fsl,imx7d-usb            F2                    (           X              nusb1_ctrl_root_clk          G      X        W      @           @           A            z           okay            (otg          0        H   B        2         usbmisc@32e40200          %   2fsl,imx8mm-usbmisc fsl,imx7d-usbmisc            T           F2            2   A      usb@32e50000             2fsl,imx8mm-usb fsl,imx7d-usb            F2                    )           X              nusb1_ctrl_root_clk          G      X        W      @           C           D            z           okay            (host             a        H   E        2         usbmisc@32e50200          %   2fsl,imx8mm-usbmisc fsl,imx7d-usbmisc            T           F2            2   D      pcie-phy@32f00000            2fsl,imx8mm-pcie-phy         F2             X   F        nref         G      h                 W      :                      vpciephy         <            okay                                2   I         dma-controller@33000000       &   2fsl,imx7d-dma-apbh fsl,imx28-dma-apbh           F3             0                                                  gpmi0 gpmi1 gpmi2 gpmi3         w                      X              2   G      nand-controller@33002000          )   2fsl,imx8mm-gpmi-nand fsl,imx7d-gpmi-nand                                      F3       3 @   @         ^gpmi-nand bch                             bch         X                    ngpmi_io gpmi_bch_apb               G            rx-tx         	  disabled            2         pcie@33800000            2fsl,imx8mm-pcie         F3   @               ^dbi config                                   :pci                      0                                                                              z           msi                                                                    }                            |                            {                            z                                  z   H                            vapps turnoff               I      	   pcie-phy            okay            default            J        *   ,              X            i   F        npcie pcie_aux pcie_bus          G      i      g         沀        W      9      >        2      pcie@0,0            F                                                 pcie@1,0            F                                                 pcie@2,3            F                                                pcie@5,0            F                                                      5                2                     gpu@38000000             2vivante,gc          F8                                 X      Z                          nreg bus core shader         G            *        W      *            ;         z   K        2         gpu@38008000             2vivante,gc          F8                               X      Z                    nreg bus core            G            *        W      *            ;         z   K        2         video-codec@38300000             2nxp,imx8mm-vpu-g1           F80                               X              z   L            2         video-codec@38310000             2nxp,imx8mq-vpu-g2           F81                               X              z   L           2         blk-ctrl@38330000            2fsl,imx8mm-vpu-blk-ctrl syscon          F83             z   M   N   O   P        bus g1 g2 h1            X                        	  ng1 g2 h1            G      c      d        W      +      +        #F #F                    2   L      interrupt-controller@38800000            2arm,gic-v3          F8     8                         
              	           2         memory-controller@3d400000           2fsl,imx8mm-ddrc fsl,imx8m-ddrc          F=@   @          ncore pll alt apb             X                  a      b           Q        2      opp-table            2operating-points-v2         2   Q   opp-25M         H    }x@      opp-100M            H           opp-750M            H    ,            ddr-pmu@3d800000          %   2fsl,imx8mm-ddr-pmu fsl,imx8m-ddr-pmu            F=   @                 b            memory@40000000         :memory          F    @                gpio-keys         
   2gpio-keys      key-user-pb         user_pb            R              G         key-user-pb1x         
  user_pb1x           G               )                  key-erased          key_erased          G               )                 key-eeprom-wp         
  eeprom_wp           G               )                 key-tamper          tamper          G               )                 switch-hold         switch_hold         G               )                    led-controller        
   2gpio-leds           default            S   led-0           Rstatus          [              "               aon        
  oheartbeat         led-1           Rstatus          [              "               aoff          pcie0-refclk             2fixed-clock                              2   F      pps       	   2pps-gpio            default            T           U               okay          regulator-3p3v           2regulator-fixed         93P3V            H 2Z        ` 2Z                 2   3      regulator-usb-otg1          default            V         2regulator-fixed         9usb_otg1_vbus           0   U                        H LK@        ` LK@        2   B      regulator-usb-otg2          default            W         2regulator-fixed         9usb_otg2_vbus           0   U                        H LK@        ` LK@        2   E      chosen        6  /soc@0/bus@30800000/spba-bus@30800000/serial@30890000         __symbols__         /cpus/idle-states/cpu-pd-wait           /cpus/cpu@0         /cpus/cpu@1         /cpus/cpu@2         /cpus/cpu@3         /cpus/l2-cache0         /opp-table          /clock-osc-32k          /clock-osc-24m          /clock-ext1         /clock-ext2         /clock-ext3         	/clock-ext4       '  	/thermal-zones/cpu-thermal/trips/trip0        '  	/thermal-zones/cpu-thermal/trips/trip1          	&/usbphynop1         	1/usbphynop2         	</soc@0          	@/soc@0/bus@30000000       &  	F/soc@0/bus@30000000/spba-bus@30000000         3  	L/soc@0/bus@30000000/spba-bus@30000000/sai@30010000        3  	Q/soc@0/bus@30000000/spba-bus@30000000/sai@30020000        3  	V/soc@0/bus@30000000/spba-bus@30000000/sai@30030000        3  	[/soc@0/bus@30000000/spba-bus@30000000/sai@30050000        3  	`/soc@0/bus@30000000/spba-bus@30000000/sai@30060000        @  	e/soc@0/bus@30000000/spba-bus@30000000/audio-controller@30080000       5  	l/soc@0/bus@30000000/spba-bus@30000000/spdif@30090000          "   M/soc@0/bus@30000000/gpio@30200000         "   S/soc@0/bus@30000000/gpio@30210000         "   Y/soc@0/bus@30000000/gpio@30220000         "   _/soc@0/bus@30000000/gpio@30230000         "  	s/soc@0/bus@30000000/gpio@30240000         !  	y/soc@0/bus@30000000/tmu@30260000          &  	}/soc@0/bus@30000000/watchdog@30280000         &  	/soc@0/bus@30000000/watchdog@30290000         &  	/soc@0/bus@30000000/watchdog@302a0000         ,  	/soc@0/bus@30000000/dma-controller@302c0000       ,  	/soc@0/bus@30000000/dma-controller@302b0000       %  	/soc@0/bus@30000000/pinctrl@30330000          -  	/soc@0/bus@30000000/pinctrl@30330000/fec1grp          ,  	/soc@0/bus@30000000/pinctrl@30330000/gscgrp       -  	/soc@0/bus@30000000/pinctrl@30330000/i2c1grp          -  	/soc@0/bus@30000000/pinctrl@30330000/i2c2grp          .  	/soc@0/bus@30000000/pinctrl@30330000/uart2grp         /  	/soc@0/bus@30000000/pinctrl@30330000/usdhc3grp        6  	/soc@0/bus@30000000/pinctrl@30330000/usdhc3-100mhzgrp         6  
/soc@0/bus@30000000/pinctrl@30330000/usdhc3-200mhzgrp         -  
/soc@0/bus@30000000/pinctrl@30330000/wdoggrp          ,  
+/soc@0/bus@30000000/pinctrl@30330000/hoggrp       .  
7/soc@0/bus@30000000/pinctrl@30330000/accelgrp         0  
E/soc@0/bus@30000000/pinctrl@30330000/gpioledgrp       -  
W/soc@0/bus@30000000/pinctrl@30330000/i2c3grp          .  
d/soc@0/bus@30000000/pinctrl@30330000/pcie0grp         ,  
r/soc@0/bus@30000000/pinctrl@30330000/ppsgrp       0  
~/soc@0/bus@30000000/pinctrl@30330000/regusb1grp       0  
/soc@0/bus@30000000/pinctrl@30330000/regusb2grp       -  
/soc@0/bus@30000000/pinctrl@30330000/sai3grp          -  
/soc@0/bus@30000000/pinctrl@30330000/spi2grp          .  
/soc@0/bus@30000000/pinctrl@30330000/uart1grp         .  
/soc@0/bus@30000000/pinctrl@30330000/uart3grp         .  
/soc@0/bus@30000000/pinctrl@30330000/uart4grp         /  
/soc@0/bus@30000000/pinctrl@30330000/usdhc1grp        /  
/soc@0/bus@30000000/pinctrl@30330000/usdhc2grp        6  /soc@0/bus@30000000/pinctrl@30330000/usdhc2-100mhzgrp         6  /soc@0/bus@30000000/pinctrl@30330000/usdhc2-200mhzgrp         3  4/soc@0/bus@30000000/pinctrl@30330000/usdhc2gpiogrp        (  H/soc@0/bus@30000000/iomuxc-gpr@30340000       #  L/soc@0/bus@30000000/efuse@30350000        /  R/soc@0/bus@30000000/efuse@30350000/unique-id@4        2  ]/soc@0/bus@30000000/efuse@30350000/speed-grade@10         2  m/soc@0/bus@30000000/efuse@30350000/mac-address@90         $  }/soc@0/bus@30000000/anatop@30360000       "  /soc@0/bus@30000000/snvs@30370000         .  /soc@0/bus@30000000/snvs@30370000/snvs-rtc-lp         0  /soc@0/bus@30000000/snvs@30370000/snvs-powerkey       -  /soc@0/bus@30000000/snvs@30370000/snvs-lpgpr          .  /soc@0/bus@30000000/clock-controller@30380000         .  /soc@0/bus@30000000/reset-controller@30390000         !  /soc@0/bus@30000000/gpc@303a0000          4  /soc@0/bus@30000000/gpc@303a0000/pgc/power-domain@0       4  /soc@0/bus@30000000/gpc@303a0000/pgc/power-domain@1       4  /soc@0/bus@30000000/gpc@303a0000/pgc/power-domain@2       4  /soc@0/bus@30000000/gpc@303a0000/pgc/power-domain@3       4  /soc@0/bus@30000000/gpc@303a0000/pgc/power-domain@4       4  /soc@0/bus@30000000/gpc@303a0000/pgc/power-domain@5       4  /soc@0/bus@30000000/gpc@303a0000/pgc/power-domain@6       4  /soc@0/bus@30000000/gpc@303a0000/pgc/power-domain@7       4  /soc@0/bus@30000000/gpc@303a0000/pgc/power-domain@8       4  /soc@0/bus@30000000/gpc@303a0000/pgc/power-domain@9       5  /soc@0/bus@30000000/gpc@303a0000/pgc/power-domain@10          5  '/soc@0/bus@30000000/gpc@303a0000/pgc/power-domain@11            0/soc@0/bus@30400000       !  6/soc@0/bus@30400000/pwm@30660000          !  ;/soc@0/bus@30400000/pwm@30670000          !  @/soc@0/bus@30400000/pwm@30680000          !  E/soc@0/bus@30400000/pwm@30690000          #  J/soc@0/bus@30400000/timer@306a0000          Y/soc@0/bus@30800000       &  _/soc@0/bus@30800000/spba-bus@30800000         3  e/soc@0/bus@30800000/spba-bus@30800000/spi@30820000        3  l/soc@0/bus@30800000/spba-bus@30800000/spi@30830000        3  s/soc@0/bus@30800000/spba-bus@30800000/spi@30840000        6  
/soc@0/bus@30800000/spba-bus@30800000/serial@30860000         6  
/soc@0/bus@30800000/spba-bus@30800000/serial@30880000         6  	/soc@0/bus@30800000/spba-bus@30800000/serial@30890000         $  z/soc@0/bus@30800000/crypto@30900000       ,  /soc@0/bus@30800000/crypto@30900000/jr@1000       ,  /soc@0/bus@30800000/crypto@30900000/jr@2000       ,  /soc@0/bus@30800000/crypto@30900000/jr@3000       !   j/soc@0/bus@30800000/i2c@30a20000          (  	/soc@0/bus@30800000/i2c@30a20000/gsc@20       )  0/soc@0/bus@30800000/i2c@30a20000/gpio@23          :  /soc@0/bus@30800000/i2c@30a20000/pmic@69/regulators/buck3         !   o/soc@0/bus@30800000/i2c@30a30000          !   t/soc@0/bus@30800000/i2c@30a40000          !  /soc@0/bus@30800000/i2c@30a50000          $  
/soc@0/bus@30800000/serial@30a60000       %  	z/soc@0/bus@30800000/mailbox@30aa0000          !  
/soc@0/bus@30800000/mmc@30b40000          !  /soc@0/bus@30800000/mmc@30b50000          !  	/soc@0/bus@30800000/mmc@30b60000          !  /soc@0/bus@30800000/spi@30bb0000          ,  /soc@0/bus@30800000/dma-controller@30bd0000       &  	/soc@0/bus@30800000/ethernet@30be0000         :  /soc@0/bus@30800000/ethernet@30be0000/mdio/ethernet-phy@0           /soc@0/bus@32c00000       !  /soc@0/bus@32c00000/csi@32e20000          /  /soc@0/bus@32c00000/csi@32e20000/port/endpoint        &  /soc@0/bus@32c00000/blk-ctrl@32e28000         &  /soc@0/bus@32c00000/mipi-csi@32e30000         <  /soc@0/bus@32c00000/mipi-csi@32e30000/ports/port@1/endpoint       !  /soc@0/bus@32c00000/usb@32e40000          %  /soc@0/bus@32c00000/usbmisc@32e40200          !  /soc@0/bus@32c00000/usb@32e50000          %  /soc@0/bus@32c00000/usbmisc@32e50200          &  /soc@0/bus@32c00000/pcie-phy@32f00000           %/soc@0/dma-controller@33000000           ./soc@0/nand-controller@33002000         
l/soc@0/pcie@33800000          9  3/soc@0/pcie@33800000/pcie@0,0/pcie@1,0/pcie@2,3/pcie@5,0            8/soc@0/gpu@38000000         ?/soc@0/gpu@38008000         /soc@0/video-codec@38300000         	/soc@0/video-codec@38310000         F/soc@0/blk-ctrl@38330000          %  S/soc@0/interrupt-controller@38800000          "  W/soc@0/memory-controller@3d400000         ,  \/soc@0/memory-controller@3d400000/opp-table         k/pcie0-refclk           x/regulator-3p3v         /regulator-usb-otg1         /regulator-usb-otg2          	interrupt-parent #address-cells #size-cells model compatible ethernet0 gpio0 gpio1 gpio2 gpio3 gpio4 i2c0 i2c1 i2c2 i2c3 mmc0 mmc1 mmc2 serial0 serial1 serial2 serial3 spi0 spi1 spi2 ethernet1 usb0 usb1 entry-method arm,psci-suspend-param local-timer-stop entry-latency-us exit-latency-us min-residency-us phandle device_type reg clock-latency clocks enable-method i-cache-size i-cache-line-size i-cache-sets d-cache-size d-cache-line-size d-cache-sets next-level-cache operating-points-v2 nvmem-cells nvmem-cell-names cpu-idle-states #cooling-cells cpu-supply cache-level opp-shared opp-hz opp-microvolt opp-supported-hw clock-latency-ns opp-suspend #clock-cells clock-frequency clock-output-names interrupts arm,no-tick-in-suspend polling-delay-passive polling-delay thermal-sensors temperature hysteresis trip cooling-device #phy-cells assigned-clocks assigned-clock-parents clock-names power-domains ranges dma-ranges #sound-dai-cells dmas dma-names status pinctrl-names pinctrl-0 assigned-clock-rates gpio-controller #gpio-cells interrupt-controller #interrupt-cells gpio-ranges gpio-line-names #thermal-sensor-cells fsl,ext-reset-output #dma-cells fsl,sdma-ram-script-name fsl,pins regmap offset linux,keycode wakeup-source #reset-cells #power-domain-cells resets #pwm-cells cs-gpios gw,mode label gw,voltage-divider-ohms pagesize regulator-name regulator-min-microvolt regulator-max-microvolt regulator-min-microamp regulator-max-microamp regulator-boot-on regulator-always-on st,drdy-int-pin interrupt-names #mbox-cells fsl,tuning-start-tap fsl,tuning-step bus-width pinctrl-1 pinctrl-2 cd-gpios vmmc-supply non-removable reg-names fsl,num-tx-queues fsl,num-rx-queues fsl,stop-mode phy-mode phy-handle ti,rx-internal-delay ti,tx-internal-delay tx-fifo-depth rx-fifo-depth remote-endpoint power-domain-names phys fsl,usbmisc dr_mode over-current-active-low vbus-supply #index-cells disable-over-current reset-names fsl,refclk-pad-mode fsl,clkreq-unsupported dma-channels bus-range num-lanes num-viewport interrupt-map-mask interrupt-map fsl,max-link-speed linux,pci-domain phy-names reset-gpio local-mac-address linux,code function color default-state linux,default-trigger enable-active-high stdout-path cpu_pd_wait A53_0 A53_1 A53_2 A53_3 A53_L2 a53_opp_table osc_32k osc_24m clk_ext1 clk_ext2 clk_ext3 clk_ext4 cpu_alert0 cpu_crit0 usbphynop1 usbphynop2 soc aips1 spba2 sai1 sai2 sai3 sai5 sai6 micfil spdif1 gpio5 tmu wdog1 wdog2 wdog3 sdma2 sdma3 iomuxc pinctrl_fec1 pinctrl_gsc pinctrl_i2c1 pinctrl_i2c2 pinctrl_uart2 pinctrl_usdhc3 pinctrl_usdhc3_100mhz pinctrl_usdhc3_200mhz pinctrl_wdog pinctrl_hog pinctrl_accel pinctrl_gpio_leds pinctrl_i2c3 pinctrl_pcie0 pinctrl_pps pinctrl_reg_usb1_en pinctrl_reg_usb2_en pinctrl_sai3 pinctrl_spi2 pinctrl_uart1 pinctrl_uart3 pinctrl_uart4 pinctrl_usdhc1 pinctrl_usdhc2 pinctrl_usdhc2_100mhz pinctrl_usdhc2_200mhz pinctrl_usdhc2_gpio gpr ocotp imx8mm_uid cpu_speed_grade fec_mac_address anatop snvs snvs_rtc snvs_pwrkey snvs_lpgpr clk src gpc pgc_hsiomix pgc_pcie pgc_otg1 pgc_otg2 pgc_gpumix pgc_gpu pgc_vpumix pgc_vpu_g1 pgc_vpu_g2 pgc_vpu_h1 pgc_dispmix pgc_mipi aips2 pwm1 pwm2 pwm3 pwm4 system_counter aips3 spba1 ecspi1 ecspi2 ecspi3 crypto sec_jr0 sec_jr1 sec_jr2 buck3_reg i2c4 flexspi sdma1 ethphy0 aips4 csi csi_in disp_blk_ctrl mipi_csi imx8mm_mipi_csi_out usbotg1 usbmisc1 usbotg2 usbmisc2 pcie_phy dma_apbh gpmi eth1 gpu_3d gpu_2d vpu_blk_ctrl gic ddrc ddrc_opp_table pcie0_refclk reg_3p3v reg_usb_otg1_vbus reg_usb_otg2_vbus gpio-hog output-low line-name rts-gpios cts-gpios 