Ðþí á   8 ä   (            ý ¬                             D    gumstix,omap3-overo-palo43 gumstix,omap3-overo ti,omap3630 ti,omap3                                  +         /   7OMAP36xx/AM37xx/DM37xx Gumstix Overo on Palo43     chosen        aliases          =/ocp@68000000/i2c@48070000           B/ocp@68000000/i2c@48072000           G/ocp@68000000/i2c@48060000           L/ocp@68000000/mmc@4809c000           Q/ocp@68000000/mmc@480b4000           V/ocp@68000000/mmc@480ad000           [/ocp@68000000/serial@4806a000            c/ocp@68000000/serial@4806c000            k/ocp@68000000/serial@49020000            s/ocp@68000000/serial@49042000         	   {/display          cpus                         +       cpu@0             arm,cortex-a8            „cpu          �             ”            ›cpu          § “à         µ            É            Ô            ã           pmu@54000000              arm,cortex-a8-pmu            �T    €           ë            ödebugss       soc           ti,omap-infra      mpu           ti,omap3-mpu             ömpu       iva       
    ti,iva2.2            öiva    dsp           ti,omap3-c64                ocp@68000000              ti,omap3-l3-smx simple-bus           �h               ë   	   
                     +                      öl3_main    l4@48000000           ti,omap3-l4-core simple-bus                      +                H         scm@2000              ti,omap3-scm simple-bus          �                             +                           pinmux@30              ti,omap3-padconf pinctrl-single          �   0  8                     +                                   '        <           Z  ÿ        wdefault         …            ã   è   uart2-pins           �  <    >     @     B           ã   ç      i2c1-pins           �  Š     Œ            ã   ê      mmc1-pins         0  �                                 ã   ù      mmc2-pins         0  �  (    *    ,    .    0    2           ã   û      w3cbw003c-pins          �   „     l            ã        hsusb2-pins       @  �  ¤    ¦    ¨    ª    ¬    ®    Ž     �            ã         twl4030-pins            �  °  A         ã   ë      i2c3-pins           �  ’     ”            ã   ñ      uart3-pins          �  n     p             ã   é      dss-dpi-pins          à  �   ¤       ¦       ¨       ª       ¬       ®       °       ²       ´       ¶       ¸       º       ¼       ¾       À       Â       Ä       Æ       È       Ê       Ì       Î       Ð       Ò       Ô       Ö       Ø       Ú             ã  
      lte430-pins         �  D            ã        backlight-pins          �  F            ã  !      mcspi1-pins          �  ˜     š     œ     ž            ã   ô      ads7846-pins            �             ã   õ         scm_conf@270              syscon simple-bus            �  p  0                     +                  p  0         ã      pbias_regulator@2b0           ti,pbias-omap3 ti,pbias-omap             �  °           £      pbias_mmc_omap2430          ªpbias_mmc_omap2430          ¹ w@        Ñ -ÆÀ         ã   ø         clocks                       +       clock@68          
    ti,clksel            �   h        é                        +       clock-mcbsp5-mux-fck@4           �           é              ti,composite-mux-clock          ömcbsp5_mux_fck           ”               ã         clock-mcbsp3-mux-fck@0           �            é              ti,composite-mux-clock          ömcbsp3_mux_fck           ”   	            ã         clock-mcbsp4-mux-fck@2           �           é              ti,composite-mux-clock          ömcbsp4_mux_fck           ”   	            ã            mcbsp5_fck          é              ti,composite-clock           ”   
            ã        clock@4       
    ti,clksel            �           é                        +       clock-mcbsp1-mux-fck@2           �           é              ti,composite-mux-clock          ömcbsp1_mux_fck           ”               ã         clock-mcbsp2-mux-fck@6           �           é              ti,composite-mux-clock          ömcbsp2_mux_fck           ”   	            ã            mcbsp1_fck          é              ti,composite-clock           ”               ã   þ      mcbsp2_fck          é              ti,composite-clock           ”               ã         mcbsp3_fck          é              ti,composite-clock           ”               ã        mcbsp4_fck          é              ti,composite-clock           ”               ã              clockdomains          pinmux@a00             ti,omap3-padconf pinctrl-single          �  
    \                     +                                   '        <           Z  ÿ   twl4030-vpins-pins           �                                    ã   ì               target-module@480a6000            ti,sysc-omap2 ti,sysc            �H
`D   H
`H   H
`L           	rev sysc syss                                         .            ”            ›ick                      +                H
`        aes1@0            ti,omap3-aes             �       P         ë            ;      	      
        @tx rx            target-module@480c5000            ti,sysc-omap2 ti,sysc            �HPD   HPH   HPL           	rev sysc syss                                         .            ”            ›ick                      +                HP        aes2@0            ti,omap3-aes             �       P         ë            ;      A      B        @tx rx            prm@48306000              ti,omap3-prm             �H0`   @          ë      clocks                       +       virt_16_8m_ck           é              fixed-clock         J Y          ã         osc_sys_ck@d40          é              ti,mux-clock             ”                           �  @         ã         sys_ck@1270         é              ti,divider-clock             ”           Z           g            �  p         r         ã   "      sys_clkout1@d70         é              ti,gate-clock            ”            �  p        Z         dpll3_x2_ck         é              fixed-factor-clock           ”           ‰           ”         dpll3_m2x2_ck           é              fixed-factor-clock           ”           ‰           ”            ã   !      dpll4_x2_ck         é              fixed-factor-clock           ”            ‰           ”         corex2_fck          é              fixed-factor-clock           ”   !        ‰           ”            ã   #      wkup_l4_ick         é              fixed-factor-clock           ”   "        ‰           ”            ã   b      corex2_d3_fck           é              fixed-factor-clock           ”   #        ‰           ”            ã   Š      corex2_d5_fck           é              fixed-factor-clock           ”   #        ‰           ”            ã   ‹         clockdomains             cm@48004000           ti,omap3-cm          �H @   @    clocks                       +       dummy_apb_pclk          é              fixed-clock         J          omap_32k_fck            é              fixed-clock         J  €          ã   H      virt_12m_ck         é              fixed-clock         J ·          ã         virt_13m_ck         é              fixed-clock         J Æ]@         ã         virt_19200000_ck            é              fixed-clock         J$ø          ã         virt_26000000_ck            é              fixed-clock         JŒº€         ã         virt_38_4m_ck           é              fixed-clock         JIð          ã         dpll4_ck@d00            é              ti,omap3-dpll-per-j-type-clock           ”   "   "         �        D  0         ã          dpll4_m2_ck@d48         é              ti,divider-clock             ”            g   ?         �  H         r         ã   $      dpll4_m2x2_mul_ck           é              fixed-factor-clock           ”   $        ‰           ”            ã   %      dpll4_m2x2_ck@d00           é              ti,hsdiv-gate-clock          ”   %        Z            �            ž         ã   &      omap_96m_alwon_fck          é              fixed-factor-clock           ”   &        ‰           ”            ã   2      dpll3_ck@d00            é              ti,omap3-dpll-core-clock             ”   "   "         �        @  0         ã         clock@1140        
    ti,clksel            �  @        é                        +       clock-dpll3-m3@16            �           é              ti,divider-clock            ödpll3_m3_ck          ”           g            r         ã   ,      clock-dpll4-m6@24            �           é              ti,divider-clock            ödpll4_m6_ck          ”            g   ?         r         ã   >      clock-emu-src-mux@0          �            é              ti,mux-clock            öemu_src_mux_ck           ”   "   '   (   )         ã   v      clock-pclk-fck@8             �           é              ti,divider-clock          	  öpclk_fck             ”   *        g            r      clock-pclkx2-fck@6           �           é              ti,divider-clock            öpclkx2_fck           ”   *        g            r      clock-atclk-fck@4            �           é              ti,divider-clock          
  öatclk_fck            ”   *        g            r      clock-traceclk-src-fck@2             �           é              ti,mux-clock            ötraceclk_src_fck             ”   "   '   (   )         ã   +      clock-traceclk-fck@11            �           é              ti,divider-clock            ötraceclk_fck             ”   +        g            r         dpll3_m3x2_mul_ck           é              fixed-factor-clock           ”   ,        ‰           ”            ã   -      dpll3_m3x2_ck@d00           é              ti,hsdiv-gate-clock          ”   -        Z            �            ž         ã   .      emu_core_alwon_ck           é              fixed-factor-clock           ”   .        ‰           ”            ã   '      sys_altclk          é              fixed-clock         J             ã   5      mcbsp_clks          é              fixed-clock         J             ã         core_ck         é              fixed-factor-clock           ”           ‰           ”            ã   /      dpll1_fck@940           é              ti,divider-clock             ”   /        Z           g            �  	@         r         ã   0      dpll1_ck@904            é              ti,omap3-dpll-clock          ”   "   0         �  	  	$  	@  	4         ã         dpll1_x2_ck         é              fixed-factor-clock           ”           ‰           ”            ã   1      dpll1_x2m2_ck@944           é              ti,divider-clock             ”   1        g            �  	D         r         ã   E      cm_96m_fck          é              fixed-factor-clock           ”   2        ‰           ”            ã   3      clock@d40         
    ti,clksel            �  @        é                        +       clock-dpll3-m2@27            �           é              ti,divider-clock            ödpll3_m2_ck          ”           g            r         ã         clock-omap-96m-fck@6             �           é              ti,mux-clock            öomap_96m_fck             ”   3   "         ã   Y      clock-omap-54m-fck@5             �           é              ti,mux-clock            öomap_54m_fck             ”   4   5         ã   A      clock-omap-48m-fck@3             �           é              ti,mux-clock            öomap_48m_fck             ”   6   5         ã   9         clock@e40         
    ti,clksel            �  @        é                        +       clock-dpll4-m3@8             �           é              ti,divider-clock            ödpll4_m3_ck          ”            g             r         ã   7      clock-dpll4-m4@0             �            é              ti,divider-clock            ödpll4_m4_ck          ”            g            r         ã   :         dpll4_m3x2_mul_ck           é              fixed-factor-clock           ”   7        ‰           ”            ã   8      dpll4_m3x2_ck@d00           é              ti,hsdiv-gate-clock          ”   8        Z            �            ž         ã   4      cm_96m_d2_fck           é              fixed-factor-clock           ”   3        ‰           ”            ã   6      omap_12m_fck            é              fixed-factor-clock           ”   9        ‰           ”            ã   Z      dpll4_m4x2_mul_ck           é              ti,fixed-factor-clock            ”   :        ´           Â            Ï         ã   ;      dpll4_m4x2_ck@d00           é              ti,gate-clock            ”   ;        Z            �            ž         Ï         ã   ^      dpll4_m5_ck@f40         é              ti,divider-clock             ”            g   ?         �  @         r         ã   <      dpll4_m5x2_mul_ck           é              ti,fixed-factor-clock            ”   <        ´           Â            Ï         ã   =      dpll4_m5x2_ck@d00           é              ti,hsdiv-gate-clock          ”   =        Z            �            ž         Ï         ã   z      dpll4_m6x2_mul_ck           é              fixed-factor-clock           ”   >        ‰           ”            ã   ?      dpll4_m6x2_ck@d00           é              ti,hsdiv-gate-clock          ”   ?        Z            �            ž         ã   @      emu_per_alwon_ck            é              fixed-factor-clock           ”   @        ‰           ”            ã   (      clock@d70         
    ti,clksel            �  p        é                        +       clock-clkout2-src-gate@7             �           é               ti,composite-no-wait-gate-clock         öclkout2_src_gate_ck          ”   /         ã   C      clock-clkout2-src-mux@0          �            é              ti,composite-mux-clock          öclkout2_src_mux_ck           ”   /   "   3   A         ã   D      clock-sys-clkout2@3          �           é              ti,divider-clock            ösys_clkout2          ”   B        g   @         â         clkout2_src_ck          é              ti,composite-clock           ”   C   D         ã   B      mpu_ck          é              fixed-factor-clock           ”   E        ‰           ”            ã   F      arm_fck@924         é              ti,divider-clock             ”   F         �  	$        g         emu_mpu_alwon_ck            é              fixed-factor-clock           ”   F        ‰           ”            ã   )      clock@a40         
    ti,clksel            �  
@        é                        +       clock-l3-ick@0           �            é              ti,divider-clock            öl3_ick           ”   /        g            r         ã   G      clock-l4-ick@2           �           é              ti,divider-clock            öl4_ick           ”   G        g            r         ã   I      clock-gpt10-mux-fck@6            �           é              ti,composite-mux-clock          ögpt10_mux_fck            ”   H   "         ã   V      clock-gpt11-mux-fck@7            �           é              ti,composite-mux-clock          ögpt11_mux_fck            ”   H   "         ã   X      clock-ssi-ssr-div-fck-3430es2@8          �           é              ti,composite-divider-clock          össi_ssr_div_fck_3430es2          ”   #      $  ø                                       ã            clock@c40         
    ti,clksel            �  @        é                        +       clock-rm-ick@1           �           é              ti,divider-clock            örm_ick           ”   I        g            r      clock-gpt1-mux-fck@0             �            é              ti,composite-mux-clock          ögpt1_mux_fck             ”   H   "         ã   a      clock-usim-mux-fck@3             �           é              ti,composite-mux-clock          öusim_mux_fck          (   ”   "   J   K   L   M   N   O   P   Q   R         r         ã   ƒ         clock@a00         
    ti,clksel            �  
         é                        +       clock-gpt10-gate-fck@11          �           é              ti,composite-gate-clock         ögpt10_gate_fck           ”   "         ã   U      clock-gpt11-gate-fck@12          �           é              ti,composite-gate-clock         ögpt11_gate_fck           ”   "         ã   W      clock-mmchs2-fck@25          �           é              ti,wait-gate-clock          ömmchs2_fck           ”            ã   ¹      clock-mmchs1-fck@24          �           é              ti,wait-gate-clock          ömmchs1_fck           ”            ã   º      clock-i2c3-fck@17            �           é              ti,wait-gate-clock        	  öi2c3_fck             ”            ã   »      clock-i2c2-fck@16            �           é              ti,wait-gate-clock        	  öi2c2_fck             ”            ã   ¼      clock-i2c1-fck@15            �           é              ti,wait-gate-clock        	  öi2c1_fck             ”            ã   ½      clock-mcbsp5-gate-fck@10             �   
        é              ti,composite-gate-clock         ömcbsp5_gate_fck          ”            ã   
      clock-mcbsp1-gate-fck@9          �   	        é              ti,composite-gate-clock         ömcbsp1_gate_fck          ”            ã         clock-mcspi4-fck@21          �           é              ti,wait-gate-clock          ömcspi4_fck           ”   S         ã   ¾      clock-mcspi3-fck@20          �           é              ti,wait-gate-clock          ömcspi3_fck           ”   S         ã   ¿      clock-mcspi2-fck@19          �           é              ti,wait-gate-clock          ömcspi2_fck           ”   S         ã   À      clock-mcspi1-fck@18          �           é              ti,wait-gate-clock          ömcspi1_fck           ”   S         ã   Á      clock-uart2-fck@14           �           é              ti,wait-gate-clock        
  öuart2_fck            ”   S         ã   Â      clock-uart1-fck@13           �           é              ti,wait-gate-clock        
  öuart1_fck            ”   S         ã   Ã      clock-hdq-fck@22             �           é              ti,wait-gate-clock          öhdq_fck          ”   T         ã   Ä      clock-modem-fck@31           �           é              ti,omap3-interface-clock          
  ömodem_fck            ”   "         ã   à      clock-mspro-fck@23           �           é              ti,wait-gate-clock        
  ömspro_fck            ”         clock-ssi-ssr-gate-fck-3430es2@0             �            é               ti,composite-no-wait-gate-clock         össi_ssr_gate_fck_3430es2             ”   #         ã   ~      clock-mmchs3-fck@30          �           é              ti,wait-gate-clock          ömmchs3_fck           ”            ã   Ü         gpt10_fck           é              ti,composite-clock           ”   U   V      gpt11_fck           é              ti,composite-clock           ”   W   X      core_96m_fck            é              fixed-factor-clock           ”   Y        ‰           ”            ã         core_48m_fck            é              fixed-factor-clock           ”   9        ‰           ”            ã   S      core_12m_fck            é              fixed-factor-clock           ”   Z        ‰           ”            ã   T      core_l3_ick         é              fixed-factor-clock           ”   G        ‰           ”            ã   [      clock@a10         
    ti,clksel            �  
        é                        +       clock-sdrc-ick@1             �           é              ti,wait-gate-clock        	  ösdrc_ick             ”   [         ã   Ž      clock-mmchs2-ick@25          �           é              ti,omap3-interface-clock            ömmchs2_ick           ”   \         ã   Å      clock-mmchs1-ick@24          �           é              ti,omap3-interface-clock            ömmchs1_ick           ”   \         ã   Æ      clock-hdq-ick@22             �           é              ti,omap3-interface-clock            öhdq_ick          ”   \         ã   Ç      clock-mcspi4-ick@21          �           é              ti,omap3-interface-clock            ömcspi4_ick           ”   \         ã   È      clock-mcspi3-ick@20          �           é              ti,omap3-interface-clock            ömcspi3_ick           ”   \         ã   É      clock-mcspi2-ick@19          �           é              ti,omap3-interface-clock            ömcspi2_ick           ”   \         ã   Ê      clock-mcspi1-ick@18          �           é              ti,omap3-interface-clock            ömcspi1_ick           ”   \         ã   Ë      clock-i2c3-ick@17            �           é              ti,omap3-interface-clock          	  öi2c3_ick             ”   \         ã   Ì      clock-i2c2-ick@16            �           é              ti,omap3-interface-clock          	  öi2c2_ick             ”   \         ã   Í      clock-i2c1-ick@15            �           é              ti,omap3-interface-clock          	  öi2c1_ick             ”   \         ã   Î      clock-uart2-ick@14           �           é              ti,omap3-interface-clock          
  öuart2_ick            ”   \         ã   Ï      clock-uart1-ick@13           �           é              ti,omap3-interface-clock          
  öuart1_ick            ”   \         ã   Ð      clock-gpt11-ick@12           �           é              ti,omap3-interface-clock          
  ögpt11_ick            ”   \         ã   Ñ      clock-gpt10-ick@11           �           é              ti,omap3-interface-clock          
  ögpt10_ick            ”   \         ã   Ò      clock-mcbsp5-ick@10          �   
        é              ti,omap3-interface-clock            ömcbsp5_ick           ”   \         ã   Ó      clock-mcbsp1-ick@9           �   	        é              ti,omap3-interface-clock            ömcbsp1_ick           ”   \         ã   Ô      clock-omapctrl-ick@6             �           é              ti,omap3-interface-clock            öomapctrl_ick             ”   \         ã   Õ      clock-aes2-ick@28            �           é              ti,omap3-interface-clock          	  öaes2_ick             ”   \         ã         clock-sha12-ick@27           �           é              ti,omap3-interface-clock          
  ösha12_ick            ”   \         ã   Ö      clock-icr-ick@29             �           é              ti,omap3-interface-clock            öicr_ick          ”   \      clock-des2-ick@26            �           é              ti,omap3-interface-clock          	  ödes2_ick             ”   \      clock-mspro-ick@23           �           é              ti,omap3-interface-clock          
  ömspro_ick            ”   \      clock-mailboxes-ick@7            �           é              ti,omap3-interface-clock            ömailboxes_ick            ”   \      clock-sad2d-ick@3            �           é              ti,omap3-interface-clock          
  ösad2d_ick            ”   G         ã   á      clock-hsotgusb-ick-3430es2@4             �           é          "    ti,omap3-hsotgusb-interface-clock           öhsotgusb_ick_3430es2             ”   [         ã   �      clock-ssi-ick-3430es2@0          �            é              ti,omap3-ssi-interface-clock            össi_ick_3430es2          ”   ]         ã        clock-mmchs3-ick@30          �           é              ti,omap3-interface-clock            ömmchs3_ick           ”   \         ã   Û         gpmc_fck            é              fixed-factor-clock           ”   [        ‰           ”         core_l4_ick         é              fixed-factor-clock           ”   I        ‰           ”            ã   \      clock@e00         
    ti,clksel            �           é                        +       clock-dss-tv-fck            é              ti,gate-clock           ödss_tv_fck           ”   A        Z            ã   ´      clock-dss-96m-fck           é              ti,gate-clock           ödss_96m_fck          ”   Y        Z            ã   µ      clock-dss2-alwon-fck            é              ti,gate-clock           ödss2_alwon_fck           ”   "        Z            ã   ¶      clock-dss1-alwon-fck-3430es2@0           �            é              ti,dss-gate-clock           ödss1_alwon_fck_3430es2           ”   ^         Ï         ã   ·         dummy_ck            é              fixed-clock         J          clock@c00         
    ti,clksel            �           é                        +       clock-gpt1-gate-fck@0            �            é              ti,composite-gate-clock         ögpt1_gate_fck            ”   "         ã   `      clock-gpio1-dbck@3           �           é              ti,gate-clock           ögpio1_dbck           ”   _         ã   «      clock-wdt2-fck@5             �           é              ti,wait-gate-clock        	  öwdt2_fck             ”   _         ã   ¬      clock-sr1-fck@6          �           é              ti,wait-gate-clock          ösr1_fck          ”   "         ã        clock-sr2-fck@7          �           é              ti,wait-gate-clock          ösr2_fck          ”   "         ã        clock-usim-gate-fck@9            �   	        é              ti,composite-gate-clock         öusim_gate_fck            ”   Y         ã   ‚         gpt1_fck            é              ti,composite-clock           ”   `   a         ã        wkup_32k_fck            é              fixed-factor-clock           ”   H        ‰           ”            ã   _      clock@c10         
    ti,clksel            �          é                        +       clock-wdt2-ick@5             �           é              ti,omap3-interface-clock          	  öwdt2_ick             ”   b         ã   ­      clock-wdt1-ick@4             �           é              ti,omap3-interface-clock          	  öwdt1_ick             ”   b         ã   ®      clock-gpio1-ick@3            �           é              ti,omap3-interface-clock          
  ögpio1_ick            ”   b         ã   ¯      clock-omap-32ksync-ick@2             �           é              ti,omap3-interface-clock            öomap_32ksync_ick             ”   b         ã   °      clock-gpt12-ick@1            �           é              ti,omap3-interface-clock          
  ögpt12_ick            ”   b         ã   ±      clock-gpt1-ick@0             �            é              ti,omap3-interface-clock          	  ögpt1_ick             ”   b         ã   ²      clock-usim-ick@9             �   	        é              ti,omap3-interface-clock          	  öusim_ick             ”   b         ã   ³         per_96m_fck         é              fixed-factor-clock           ”   2        ‰           ”            ã   	      per_48m_fck         é              fixed-factor-clock           ”   9        ‰           ”            ã   c      clock@1000        
    ti,clksel            �           é                        +       clock-uart3-fck@11           �           é              ti,wait-gate-clock        
  öuart3_fck            ”   c         ã   �      clock-gpt2-gate-fck@3            �           é              ti,composite-gate-clock         ögpt2_gate_fck            ”   "         ã   e      clock-gpt3-gate-fck@4            �           é              ti,composite-gate-clock         ögpt3_gate_fck            ”   "         ã   g      clock-gpt4-gate-fck@5            �           é              ti,composite-gate-clock         ögpt4_gate_fck            ”   "         ã   i      clock-gpt5-gate-fck@6            �           é              ti,composite-gate-clock         ögpt5_gate_fck            ”   "         ã   k      clock-gpt6-gate-fck@7            �           é              ti,composite-gate-clock         ögpt6_gate_fck            ”   "         ã   m      clock-gpt7-gate-fck@8            �           é              ti,composite-gate-clock         ögpt7_gate_fck            ”   "         ã   o      clock-gpt8-gate-fck@9            �   	        é              ti,composite-gate-clock         ögpt8_gate_fck            ”   "         ã   q      clock-gpt9-gate-fck@10           �   
        é              ti,composite-gate-clock         ögpt9_gate_fck            ”   "         ã   s      clock-gpio6-dbck@17          �           é              ti,gate-clock           ögpio6_dbck           ”   d         ã   ‘      clock-gpio5-dbck@16          �           é              ti,gate-clock           ögpio5_dbck           ”   d         ã   ’      clock-gpio4-dbck@15          �           é              ti,gate-clock           ögpio4_dbck           ”   d         ã   “      clock-gpio3-dbck@14          �           é              ti,gate-clock           ögpio3_dbck           ”   d         ã   ”      clock-gpio2-dbck@13          �           é              ti,gate-clock           ögpio2_dbck           ”   d         ã   •      clock-wdt3-fck@12            �           é              ti,wait-gate-clock        	  öwdt3_fck             ”   d         ã   –      clock-mcbsp2-gate-fck@0          �            é              ti,composite-gate-clock         ömcbsp2_gate_fck          ”            ã         clock-mcbsp3-gate-fck@1          �           é              ti,composite-gate-clock         ömcbsp3_gate_fck          ”            ã         clock-mcbsp4-gate-fck@2          �           é              ti,composite-gate-clock         ömcbsp4_gate_fck          ”            ã         clock-uart4-fck@18           �           é              ti,wait-gate-clock        
  öuart4_fck            ”   c         ã   ª         clock@1040        
    ti,clksel            �  @        é                        +       clock-gpt2-mux-fck@0             �            é              ti,composite-mux-clock          ögpt2_mux_fck             ”   H   "         ã   f      clock-gpt3-mux-fck@1             �           é              ti,composite-mux-clock          ögpt3_mux_fck             ”   H   "         ã   h      clock-gpt4-mux-fck@2             �           é              ti,composite-mux-clock          ögpt4_mux_fck             ”   H   "         ã   j      clock-gpt5-mux-fck@3             �           é              ti,composite-mux-clock          ögpt5_mux_fck             ”   H   "         ã   l      clock-gpt6-mux-fck@4             �           é              ti,composite-mux-clock          ögpt6_mux_fck             ”   H   "         ã   n      clock-gpt7-mux-fck@5             �           é              ti,composite-mux-clock          ögpt7_mux_fck             ”   H   "         ã   p      clock-gpt8-mux-fck@6             �           é              ti,composite-mux-clock          ögpt8_mux_fck             ”   H   "         ã   r      clock-gpt9-mux-fck@7             �           é              ti,composite-mux-clock          ögpt9_mux_fck             ”   H   "         ã   t         gpt2_fck            é              ti,composite-clock           ”   e   f         ã        gpt3_fck            é              ti,composite-clock           ”   g   h      gpt4_fck            é              ti,composite-clock           ”   i   j      gpt5_fck            é              ti,composite-clock           ”   k   l      gpt6_fck            é              ti,composite-clock           ”   m   n      gpt7_fck            é              ti,composite-clock           ”   o   p      gpt8_fck            é              ti,composite-clock           ”   q   r      gpt9_fck            é              ti,composite-clock           ”   s   t      per_32k_alwon_fck           é              fixed-factor-clock           ”   H        ‰           ”            ã   d      per_l4_ick          é              fixed-factor-clock           ”   I        ‰           ”            ã   u      clock@1010        
    ti,clksel            �          é                        +       clock-gpio6-ick@17           �           é              ti,omap3-interface-clock          
  ögpio6_ick            ”   u         ã   —      clock-gpio5-ick@16           �           é              ti,omap3-interface-clock          
  ögpio5_ick            ”   u         ã   ˜      clock-gpio4-ick@15           �           é              ti,omap3-interface-clock          
  ögpio4_ick            ”   u         ã   ™      clock-gpio3-ick@14           �           é              ti,omap3-interface-clock          
  ögpio3_ick            ”   u         ã   š      clock-gpio2-ick@13           �           é              ti,omap3-interface-clock          
  ögpio2_ick            ”   u         ã   ›      clock-wdt3-ick@12            �           é              ti,omap3-interface-clock          	  öwdt3_ick             ”   u         ã   œ      clock-uart3-ick@11           �           é              ti,omap3-interface-clock          
  öuart3_ick            ”   u         ã   �      clock-uart4-ick@18           �           é              ti,omap3-interface-clock          
  öuart4_ick            ”   u         ã   ž      clock-gpt9-ick@10            �   
        é              ti,omap3-interface-clock          	  ögpt9_ick             ”   u         ã   Ÿ      clock-gpt8-ick@9             �   	        é              ti,omap3-interface-clock          	  ögpt8_ick             ”   u         ã          clock-gpt7-ick@8             �           é              ti,omap3-interface-clock          	  ögpt7_ick             ”   u         ã   ¡      clock-gpt6-ick@7             �           é              ti,omap3-interface-clock          	  ögpt6_ick             ”   u         ã   ¢      clock-gpt5-ick@6             �           é              ti,omap3-interface-clock          	  ögpt5_ick             ”   u         ã   £      clock-gpt4-ick@5             �           é              ti,omap3-interface-clock          	  ögpt4_ick             ”   u         ã   ¤      clock-gpt3-ick@4             �           é              ti,omap3-interface-clock          	  ögpt3_ick             ”   u         ã   ¥      clock-gpt2-ick@3             �           é              ti,omap3-interface-clock          	  ögpt2_ick             ”   u         ã   ¦      clock-mcbsp2-ick@0           �            é              ti,omap3-interface-clock            ömcbsp2_ick           ”   u         ã   §      clock-mcbsp3-ick@1           �           é              ti,omap3-interface-clock            ömcbsp3_ick           ”   u         ã   ¨      clock-mcbsp4-ick@2           �           é              ti,omap3-interface-clock            ömcbsp4_ick           ”   u         ã   ©         emu_src_ck          é              ti,clkdm-gate-clock          ”   v         ã   *      secure_32k_fck          é              fixed-clock         J  €          ã   w      gpt12_fck           é              fixed-factor-clock           ”   w        ‰           ”            ã        wdt1_fck            é              fixed-factor-clock           ”   w        ‰           ”         security_l4_ick2            é              fixed-factor-clock           ”   I        ‰           ”            ã   x      clock@a14         
    ti,clksel            �  
        é                        +       clock-aes1-ick@3             �           é              ti,omap3-interface-clock          	  öaes1_ick             ”   x         ã         clock-rng-ick@2          �           é              ti,omap3-interface-clock            örng_ick          ”   x         ã   ÿ      clock-sha11-ick@1            �           é              ti,omap3-interface-clock          
  ösha11_ick            ”   x      clock-des1-ick@0             �            é              ti,omap3-interface-clock          	  ödes1_ick             ”   x      clock-pka-ick@4          �           é              ti,omap3-interface-clock            öpka_ick          ”   y         clock@f00         
    ti,clksel            �           é                        +       clock-cam-mclk@0             �            é              ti,gate-clock         	  öcam_mclk             ”   z         Ï      clock-csi2-96m-fck@1             �           é              ti,gate-clock           öcsi2_96m_fck             ”            ã   Þ         cam_ick@f10         é          !    ti,omap3-no-wait-interface-clock             ”   I         �          Z             ã   Ý      security_l3_ick         é              fixed-factor-clock           ”   G        ‰           ”            ã   y      ssi_l4_ick          é              fixed-factor-clock           ”   I        ‰           ”            ã   ]      sr_l4_ick           é              fixed-factor-clock           ”   I        ‰           ”         dpll2_fck@40            é              ti,divider-clock             ”   /        Z           g            �   @         r         ã   {      dpll2_ck@4          é              ti,omap3-dpll-clock          ”   "   {         �      $   @   4                                    ã   |      dpll2_m2_ck@44          é              ti,divider-clock             ”   |        g            �   D         r         ã   }      iva2_ck@0           é              ti,wait-gate-clock           ”   }         �            Z             ã   ß      clock@a18         
    ti,clksel            �  
        é                       2             +       clock-mad2d-ick@3            �           é              ti,omap3-interface-clock          
  ömad2d_ick            ”   G         ã   â      clock-usbtll-ick@2           �           é              ti,omap3-interface-clock            öusbtll_ick           ”   \         ã   Ú         ssi_ssr_fck_3430es2         é              ti,composite-clock           ”   ~            ã   €      ssi_sst_fck_3430es2         é              fixed-factor-clock           ”   €        ‰           ”            ã        sys_d2_ck           é              fixed-factor-clock           ”   "        ‰           ”            ã   J      omap_96m_d2_fck         é              fixed-factor-clock           ”   Y        ‰           ”            ã   K      omap_96m_d4_fck         é              fixed-factor-clock           ”   Y        ‰           ”            ã   L      omap_96m_d8_fck         é              fixed-factor-clock           ”   Y        ‰           ”            ã   M      omap_96m_d10_fck            é              fixed-factor-clock           ”   Y        ‰           ”   
         ã   N      dpll5_m2_d4_ck          é              fixed-factor-clock           ”   �        ‰           ”            ã   O      dpll5_m2_d8_ck          é              fixed-factor-clock           ”   �        ‰           ”            ã   P      dpll5_m2_d16_ck         é              fixed-factor-clock           ”   �        ‰           ”            ã   Q      dpll5_m2_d20_ck         é              fixed-factor-clock           ”   �        ‰           ”            ã   R      usim_fck            é              ti,composite-clock           ”   ‚   ƒ      dpll5_ck@d04            é              ti,omap3-dpll-clock          ”   "   "         �    $  L  4                           ã   „      dpll5_m2_ck@d50         é              ti,divider-clock             ”   „        g            �  P         r         ã   �      sgx_gate_fck@b00            é              ti,composite-gate-clock          ”   /        Z            �            ã   Œ      core_d3_ck          é              fixed-factor-clock           ”   /        ‰           ”            ã   …      core_d4_ck          é              fixed-factor-clock           ”   /        ‰           ”            ã   †      core_d6_ck          é              fixed-factor-clock           ”   /        ‰           ”            ã   ‡      omap_192m_alwon_fck         é              fixed-factor-clock           ”   &        ‰           ”            ã   ˆ      core_d2_ck          é              fixed-factor-clock           ”   /        ‰           ”            ã   ‰      sgx_mux_fck@b40         é              ti,composite-mux-clock            ”   …   †   ‡   3   ˆ   ‰   Š   ‹         �  @         ã   �      sgx_fck         é              ti,composite-clock           ”   Œ   �         ã        sgx_ick@b10         é              ti,wait-gate-clock           ”   G         �          Z             ã   ã      cpefuse_fck@a08         é              ti,gate-clock            ”   "         �  
        Z             ã   ×      ts_fck@a08          é              ti,gate-clock            ”   H         �  
        Z            ã   Ø      usbtll_fck@a08          é              ti,wait-gate-clock           ”   �         �  
        Z            ã   Ù      dss_ick_3430es2@e10         é              ti,omap3-dss-interface-clock             ”   I         �          Z             ã   ¸      usbhost_120m_fck@1400           é              ti,gate-clock            ”   �         �           Z            ã   ä      usbhost_48m_fck@1400            é              ti,dss-gate-clock            ”   9         �           Z             ã   å      usbhost_ick@1410            é              ti,omap3-dss-interface-clock             ”   I         �          Z             ã   æ         clockdomains       core_l3_clkdm             ti,clockdomain           ”   Ž   �      dpll3_clkdm           ti,clockdomain           ”         dpll1_clkdm           ti,clockdomain           ”         per_clkdm             ti,clockdomain        l   ”   �   ‘   ’   “   ”   •   –   —   ˜   ™   š   ›   œ   �   ž   Ÿ       ¡   ¢   £   ¤   ¥   ¦   §   ¨   ©   ª      emu_clkdm             ti,clockdomain           ”   *      dpll4_clkdm           ti,clockdomain           ”          wkup_clkdm            ti,clockdomain        $   ”   «   ¬   ­   ®   ¯   °   ±   ²   ³      dss_clkdm             ti,clockdomain           ”   ´   µ   ¶   ·   ¸      core_l4_clkdm             ti,clockdomain        ”   ”   ¹   º   »   ¼   ½   ¾   ¿   À   Á   Â   Ã   Ä   Å   Æ   Ç   È   É   Ê   Ë   Ì   Í   Î   Ï   Ð   Ñ   Ò   Ó   Ô   Õ      Ö   ×   Ø   Ù   Ú   Û   Ü      cam_clkdm             ti,clockdomain           ”   Ý   Þ      iva2_clkdm            ti,clockdomain           ”   ß      dpll2_clkdm           ti,clockdomain           ”   |      d2d_clkdm             ti,clockdomain           ”   à   á   â      dpll5_clkdm           ti,clockdomain           ”   „      sgx_clkdm             ti,clockdomain           ”   ã      usbhost_clkdm             ti,clockdomain           ”   ä   å   æ            target-module@48320000            ti,sysc-omap2 ti,sysc            �H2     H2          	  	rev sysc                             ”   _   °         ›fck ick                      +                H2        counter@0             ti,omap-counter32k           �                 interrupt-controller@48200000             ti,omap3-intc            '                    �H               ã         target-module@48056000            ti,sysc-omap2 ti,sysc            �H`    H`,   H`(           	rev sysc syss             #        ?                                     .            ”   [         ›ick                      +                H`       dma-controller@0              ti,omap3630-sdma ti,omap-sdma            �                ë                    M           X            e   `         ã            gpio@48310000             ti,omap3-gpio            �H1              ë            ögpio1            r         „        ”            '                    ã        gpio@49050000             ti,omap3-gpio            �I              ë            ögpio2            „        ”            '                    ã        gpio@49052000             ti,omap3-gpio            �I              ë            ögpio3            „        ”            '                 gpio@49054000             ti,omap3-gpio            �I@             ë             ögpio4            „        ”            '                    ã   ÷      gpio@49056000             ti,omap3-gpio            �I`             ë   !         ögpio5            „        ”            '                    ã        gpio@49058000             ti,omap3-gpio            �I€             ë   "         ögpio6            „        ”            '                    ã        serial@4806a000           ti,omap3-uart            �H                     H        ;      1      2        @tx rx            öuart1           JÜl       serial@4806c000           ti,omap3-uart            �HÀ                   I        ;      3      4        @tx rx            öuart2           JÜl         wdefault         …   ç      serial@49020000           ti,omap3-uart            �I                    J   è  n        ;      5      6        @tx rx            öuart3           JÜl         wdefault         …   é      i2c@48070000              ti,omap3-i2c             �H     €         ë   8                     +             öi2c1            wdefault         …   ê        J '¬@   twl@48           �   H         ë                         ti,twl4030           '                   wdefault         …   ë   ì   audio             ti,twl4030-audio       codec            rtc           ti,twl4030-rtc           ë         bci           ti,twl4030-bci           ë   	           ´   í        Â   î           Îvac       watchdog              ti,twl4030-wdt        regulator-vaux1           ti,twl4030-vaux1          regulator-vaux2           ti,twl4030-vaux2          regulator-vaux3           ti,twl4030-vaux3          regulator-vaux4           ti,twl4030-vaux4          regulator-vdd1            ti,twl4030-vdd1         ¹ 	'À        Ñ        regulator-vdac            ti,twl4030-vdac         ¹ w@        Ñ w@      regulator-vio             ti,twl4030-vio        regulator-vintana1            ti,twl4030-vintana1       regulator-vintana2            ti,twl4030-vintana2       regulator-vintdig             ti,twl4030-vintdig        regulator-vmmc1           ti,twl4030-vmmc1            ¹ :�        Ñ 0°         ã   ú      regulator-vmmc2           ti,twl4030-vmmc2            ¹ :�        Ñ 0°      regulator-vusb1v5             ti,twl4030-vusb1v5           ã   ï      regulator-vusb1v8             ti,twl4030-vusb1v8           ã   ð      regulator-vusb3v1             ti,twl4030-vusb3v1           ã   í      regulator-vpll1           ti,twl4030-vpll1          regulator-vpll2           ti,twl4030-vpll2            ¹ w@        Ñ w@         ß      regulator-vsim            ti,twl4030-vsim         ¹ w@        Ñ -ÆÀ      gpio              ti,twl4030-gpio          „        ”            '                    ó      twl4030-usb           ti,twl4030-usb           ë   
           ÿ   ï           ð           í        )           2             ã  	      pwm           ti,twl4030-pwm          =         pwmled            ti,twl4030-pwmled           =            ã        pwrbutton             ti,twl4030-pwrbutton             ë         keypad            ti,twl4030-keypad            ë           H           X         madc              ti,twl4030-madc          ë           k            ã   î            i2c@48072000              ti,omap3-i2c             �H     €         ë   9                     +             öi2c2          	  }disabled          i2c@48060000              ti,omap3-i2c             �H     €         ë   =                     +             öi2c3            wdefault         …   ñ        J †    eeprom@51             atmel,24c01          �   Q        „         lis33de@1d            st,lis33de st,lis3lv02d          �           �   ò        ˜   ó         ¦         ¸         Ê        Ü   
        î   
            
                            .         =         L         [         j         y        ˆ   x        —   x        ¦   Œ        µ  &        Ä  &        Ó  î         mailbox@48094000              ti,omap3-mailbox             ömailbox          �H	@             ë           â           î                  mbox-dsp                                                    spi@48098000              ti,omap2-mcspi           �H	€             ë   A                     +             ömcspi1          (         @  ;      #      $      %      &      '      (      )      *         @tx0 rx0 tx1 rx1 tx2 rx2 tx3 rx3         wdefault         …   ô   ads7846@0           wdefault         …   õ          ti,ads7846          6   ö         �            A ã`            ÷         ë               S   ÷              `            iÿ          r            {ÿ          „ ´          ” ÿ           ¤         spi@4809a000              ti,omap2-mcspi           �H	              ë   B                     +             ömcspi2          (            ;      +      ,      -      .        @tx0 rx0 tx1 rx1       spi@480b8000              ti,omap2-mcspi           �H€             ë   [                     +             ömcspi3          (            ;                                @tx0 rx0 tx1 rx1       spi@480ba000              ti,omap2-mcspi           �H              ë   0                     +             ömcspi4          (           ;      F      G        @tx0 rx0       1w@480b2000           ti,omap3-1w          �H              ë   :         öhdq1w         mmc@4809c000              ti,omap3-hsmmc           �H	À             ë   S         ömmc1             ²        ;      =      >        @tx rx           ¿   ø        wdefault         …   ù        Ì   ú        Ø         mmc@480b4000              ti,omap3-hsmmc           �H@             ë   V         ömmc2            ;      /      0        @tx rx           wdefault         …   û        Ì   ü        â   ý        Ø            ï         ü      mmc@480ad000              ti,omap3-hsmmc           �H
Ð             ë   ^         ömmc3            ;      M      N        @tx rx         	  }disabled          mmu@480bd400            
              ti,omap2-iommu           �HÔ    €         ë            ömmu_isp                     ã        mmu@5d000000            
              ti,omap2-iommu           �]      €         ë            ömmu_iva       	  }disabled          wdt@48314000              ti,omap3-wdt             �H1@    €      
   öwd_timer2         mcbsp@48074000            ti,omap3-mcbsp           �H@    ÿ        	mpu          ë      ;   <        'common tx rx            7   €         ömcbsp1          ;                     @tx rx            ”   þ         ›fck       	  }disabled          target-module@480a0000            ti,sysc-omap2 ti,sysc            �H
 <   H
 @   H
 D           	rev sysc syss                                      .            ”   ÿ         ›ick                      +                H
         rng@0             ti,omap2-rng             �                 ë   4         mcbsp@49022000            ti,omap3-mcbsp           �I     ÿI€    ÿ        	mpu sidetone             ë      >   ?           'common tx rx sidetone           7            ömcbsp2 mcbsp2_sidetone          ;      !      "        @tx rx            ”      §         ›fck ick         }okay             ã        mcbsp@49024000            ti,omap3-mcbsp           �I@    ÿI     ÿ        	mpu sidetone             ë      Y   Z           'common tx rx sidetone           7   €         ömcbsp3 mcbsp3_sidetone          ;                    @tx rx            ”     ¨         ›fck ick       	  }disabled          mcbsp@49026000            ti,omap3-mcbsp           �I`    ÿ        	mpu          ë      6   7        'common tx rx            7   €         ömcbsp4          ;                    @tx rx            ”           ›fck         F          	  }disabled          mcbsp@48096000            ti,omap3-mcbsp           �H	`    ÿ        	mpu          ë      Q   R        'common tx rx            7   €         ömcbsp5          ;                    @tx rx            ”           ›fck       	  }disabled          sham@480c3000             ti,omap3-sham            ösham             �H0    d         ë   1        ;      E        @rx        target-module@48318000            ti,sysc-omap2-timer ti,sysc          �H1€    H1€   H1€           	rev sysc syss             '                           .            ”     ²         ›fck ick                      +                H1€             W         k   timer@0           ti,omap3430-timer            �       €         ”           ›fck          ë   %         v        …          •   H         target-module@49032000            ti,sysc-omap2-timer ti,sysc          �I     I    I            	rev sysc syss             '                           .            ”     ¦         ›fck ick                      +                I        timer@0           ti,omap3430-timer            �                ë   &         timer@49034000            ti,omap3430-timer            �I@             ë   '         ötimer3        timer@49036000            ti,omap3430-timer            �I`             ë   (         ötimer4        timer@49038000            ti,omap3430-timer            �I€             ë   )         ötimer5           ¬      timer@4903a000            ti,omap3430-timer            �I              ë   *         ötimer6           ¬      timer@4903c000            ti,omap3430-timer            �IÀ             ë   +         ötimer7           ¬      timer@4903e000            ti,omap3430-timer            �Ià             ë   ,         ötimer8           ¹         ¬      timer@49040000            ti,omap3430-timer            �I              ë   -         ötimer9           ¹      timer@48086000            ti,omap3430-timer            �H`             ë   .         ötimer10          ¹      timer@48088000            ti,omap3430-timer            �H€             ë   /         ötimer11          ¹      target-module@48304000            ti,sysc-omap2-timer ti,sysc          �H0@    H0@   H0@           	rev sysc syss             '                           .            ”     ±         ›fck ick                      +                H0@       timer@0           ti,omap3430-timer            �                ë   _         v         Æ         usbhstll@48062000             ti,usbhs-tll             �H              ë   N         öusb_tll_hs        usbhshost@48064000            ti,usbhs-host            �H@             öusb_host_hs                      +                   	  Öehci-phy       ohci@48064400             ti,ohci-omap3            �HD             ë   L         á      ehci@48064800             ti,ehci-omap             �HH             ë   M        ù               gpmc@6e000000             ti,omap3430-gpmc             ögpmc             �n     Ð         ë           ;              @rxtx            þ           
                        +            '                    „        ”         0           0             +             ,               ã     nand@0,0              ti,omap2-nand           micron,mt29c4g96maz          �                               ë                       +           :           Lbch8            \            m            {   ,        �   ,        Ÿ           ®   "        Á   ,        Ô   (        ã   6        ò   @        	   R        	   R        	#   (        	5                         +      partition@0         	MSPL          �             partition@80000         	MU-Boot           �            partition@1c0000            	MEnvironment          � $           partition@280000            	MKernel           � (   €        partition@780000            	MFilesystem           � ¨                  target-module@480ab000            ti,sysc-omap2 ti,sysc            �H
´    H
´   H
´           	rev sysc syss                      ?                                     .            ›fck                      +                H
°             ”   �   usb@0             ti,omap3-musb            �                ë   \   ]        'mc dma          	S           	^           	f           	o            	~  	        ù  	      	  	†usb2-phy            -           	�   2         dss@48050000              ti,omap3-dss             �H             }okay          	   ödss_core             ”   ·         ›fck                      +                     wdefault         …  
   dispc@48050400            ti,omap3-dispc           �H             ë         
   ödss_dispc            ”   ·         ›fck       encoder@4804fc00              ti,omap3-dsi             �Hü    Hþ    @Hÿ             	proto phy pll            ë         	  }disabled          	   ödss_dsi1             ”   ·   ¶         ›fck sys_clk                      +          encoder@48050800              ti,omap3-rfbi            �H          	  }disabled          	   ödss_rfbi             ”   ·   ¸         ›fck ick       encoder@48050c00              ti,omap3-venc            �H          	  }disabled          	   ödss_venc             ”   ´   µ         ›fck tv_dac_clk        port       endpoint            	–          	¦            ã               ssi-controller@48058000           ti,omap3-ssi             össi         }okay             �H€    H�            	sys gdd          ë   G        'gdd_mpu                      +                      ”   €              ›ssi_ssr_fck ssi_sst_fck ssi_ick    ssi-port@4805a000             ti,omap3-ssi-port            �H     H¨            	tx rx            ë   C   D      ssi-port@4805b000             ti,omap3-ssi-port            �H°    H¸            	tx rx            ë   E   F         serial@49042000           ti,omap3-uart            �I              ë   P        ;      Q      R        @tx rx            öuart4           JÜl       regulator-abb-mpu         
    ti,abb-v1           ªabb_mpu_iva                       +             �H0rð   H0h           	base-address int-address            	±            ”   "        	Ê           	Û         `  	ë s                     O€                     7È                     û                            ã         pinmux@480025a0            ti,omap3-padconf pinctrl-single          �H %    \                     +                                   '        <           Z  ÿ        wdefault         …     hsusb2-2-pins         0  �   P      R      T     V     X     Z           ã        w3cbw003c-2-pins            �   @            ã        led-pins            �   J      L            ã  "      button-pins         �   N     <           ã  #         isp@480bc000              ti,omap3-isp             �HÀ   üHØ             ë           	÷          £     ð        	þ           é      ports                        +             bandgap@48002524             �H %$             ti,omap36xx-bandgap         

             ã        target-module@480cb000            ti,sysc-omap3630-sr ti,sysc          ösmartreflex_core             �H°8           	sysc                                           ”           ›fck                      +                H°       smartreflex@0             ti,omap3-smartreflex-core            �                ë            target-module@480c9000            ti,sysc-omap3630-sr ti,sysc          ösmartreflex_mpu_iva          �H�8           	sysc                                           ”           ›fck                      +                H�       smartreflex@480c9000              ti,omap3-smartreflex-mpu-iva             �                ë            target-module@50000000            ti,sysc-omap4 ti,sysc            �P þ    P þ         	  	rev sysc            ?                                      ”     ã         ›fck ick                      +                P         gpu@0         #    ti,omap3630-gpu img,powervr-sgx530           �                ë               opp-table             operating-points-v2-ti-cpu          £            ã      opp-50-300000000            
     á£         
' s s s s s s        
5ÿÿÿÿ            
F      opp-100-600000000           
     #ÃF         
' O€ O€ O€ O€ O€ O€        
5ÿÿÿÿ         opp-130-800000000           
     /¯         
' 7È 7È 7È 7È 7È 7È        
5ÿÿÿÿ         opp-1000000000          
     ;šÊ         
' û û û û û û        
5ÿÿÿÿ            
R         opp-supply            ti,omap-opp-supply          
] û      thermal-zones      cpu-thermal         
x   ú        
Ž  è        
œ      N         
©     trips      cpu_alert           
¹ 8€        
Å  Ð         ‹passive          ã        cpu_crit            
¹ _�        
Å  Ð      	   ‹critical             cooling-maps       map0            
Ð          
Õ  ÿÿÿÿÿÿÿÿ               memory@0             „memory           �              led-controller        	    pwm-leds       led-1           	Movero:blue:COM          
ä      w5”        
é           
ømmc0             sound             ti,omap-twl4030         overo                   hsusb2_power_reg              regulator-fixed         ªhsusb2_vbus         ¹ LK@        Ñ LK@        [                   p         1         ã        hsusb2-phy-pins           usb-nop-xceiv           D                6          2             ã        regulator-w3cbw003c-npoweron              regulator-fixed         ªregulator-w3cbw003c-npoweron            ¹ 2Z         Ñ 2Z         [                  1         ã   ü      regulator-w3cbw003c-wifi-nreset         wdefault         …              regulator-fixed          ªregulator-w3cbw003c-wifi-nreset         ¹ 2Z         Ñ 2Z         [                    '         ã   ý      lis33-3v3-reg             regulator-fixed         ªlis33-3v3-reg           ¹ 2Z         Ñ 2Z          ã   ó      lis33-1v8-reg             regulator-fixed         ªlis33-1v8-reg           ¹ w@        Ñ w@         ã   ò      display           samsung,lte430wq-f0c panel-dpi          	Mlcd43           wdefault         …          P            port       endpoint            	–            ã           panel-timing            J Œa€        ]  à        e          m           z           †   )        �           œ           ©   
        ³            À            Í           ×            ads7846-reg           regulator-fixed         ªads7846-reg         ¹ 2Z         Ñ 2Z          ã   ö      backlight             gpio-backlight          wdefault         …  !        J                  ç      leds          
    gpio-leds           wdefault         …  "   led-heartbeat           	Movero:red:gpio21            J              
  
øheartbeat         led-gpio22          	Movero:blue:gpio22           J                 gpio_keys         
    gpio-keys           wdefault         …  #                     +       button0         	Mbutton0         ò           J                 ¤      button1         	Mbutton1         ò          J                 ¤            	compatible interrupt-parent #address-cells #size-cells model i2c0 i2c1 i2c2 mmc0 mmc1 mmc2 serial0 serial1 serial2 serial3 display0 device_type reg clocks clock-names clock-latency operating-points-v2 vbb-supply #cooling-cells phandle interrupts ti,hwmods ranges #pinctrl-cells #interrupt-cells interrupt-controller pinctrl-single,register-width pinctrl-single,function-mask pinctrl-names pinctrl-0 pinctrl-single,pins syscon regulator-name regulator-min-microvolt regulator-max-microvolt #clock-cells clock-output-names reg-names ti,sysc-mask ti,sysc-sidle ti,syss-mask dmas dma-names clock-frequency ti,bit-shift ti,max-div ti,index-starts-at-one clock-mult clock-div ti,set-bit-to-disable ti,clock-mult ti,clock-div ti,set-rate-parent ti,index-power-of-two ti,dividers ti,low-power-stop ti,lock ti,low-power-bypass #ssize-cells ti,sysc-midle #dma-cells dma-channels dma-requests ti,gpio-always-on gpio-controller #gpio-cells interrupts-extended bci3v1-supply io-channels io-channel-names regulator-always-on ti,use-leds usb1v5-supply usb1v8-supply usb3v1-supply usb_mode #phy-cells #pwm-cells keypad,num-rows keypad,num-columns #io-channel-cells status pagesize Vdd-supply Vdd_IO-supply st,click-single-x st,click-single-y st,click-single-z st,click-thresh-x st,click-thresh-y st,click-thresh-z st,irq1-click st,irq2-click st,wakeup-x-lo st,wakeup-x-hi st,wakeup-y-lo st,wakeup-y-hi st,wakeup-z-lo st,wakeup-z-hi st,min-limit-x st,min-limit-y st,min-limit-z st,max-limit-x st,max-limit-y st,max-limit-z #mbox-cells ti,mbox-num-users ti,mbox-num-fifos ti,mbox-tx ti,mbox-rx ti,spi-num-cs vcc-supply spi-max-frequency pendown-gpio ti,x-min ti,x-max ti,y-min ti,y-max ti,x-plate-ohms ti,pressure-max wakeup-source ti,dual-volt pbias-supply vmmc-supply bus-width vqmmc-supply cap-sdio-irq non-removable #iommu-cells ti,#tlb-entries interrupt-names ti,buffer-size #sound-dai-cells ti,no-reset-on-init ti,no-idle ti,timer-alwon assigned-clocks assigned-clock-parents ti,timer-dsp ti,timer-pwm ti,timer-secure port2-mode remote-wakeup-connected phys gpmc,num-cs gpmc,num-waitpins linux,mtd-name nand-bus-width gpmc,device-width ti,nand-ecc-opt gpmc,sync-clk-ps gpmc,cs-on-ns gpmc,cs-rd-off-ns gpmc,cs-wr-off-ns gpmc,adv-on-ns gpmc,adv-rd-off-ns gpmc,adv-wr-off-ns gpmc,we-off-ns gpmc,oe-off-ns gpmc,access-ns gpmc,rd-cycle-ns gpmc,wr-cycle-ns gpmc,wr-access-ns gpmc,wr-data-mux-bus-ns label multipoint num-eps ram-bits interface-type usb-phy phy-names power remote-endpoint data-lines ti,tranxdone-status-mask ti,settling-time ti,clock-cycles ti,abb_info iommus ti,phy-type #thermal-sensor-cells opp-hz opp-microvolt opp-supported-hw opp-suspend turbo-mode ti,absolute-max-voltage-uv polling-delay-passive polling-delay coefficients thermal-sensors temperature hysteresis trip cooling-device pwms max-brightness linux,default-trigger ti,model ti,mcbsp startup-delay-us enable-active-high reset-gpios enable-gpios hactive vactive hfront-porch hback-porch hsync-len vback-porch vfront-porch vsync-len hsync-active vsync-active de-active pixelclk-active default-on linux,code 