Ðþí Â   8    (            ¾ Ì                             '    ti,omap3-evm-37xx ti,omap3630 ti,omap3                                   +            7TI OMAP37XX EVM (TMDSEVM3730)      chosen        aliases          =/ocp@68000000/i2c@48070000           B/ocp@68000000/i2c@48072000           G/ocp@68000000/i2c@48060000           L/ocp@68000000/mmc@4809c000           Q/ocp@68000000/mmc@480b4000           V/ocp@68000000/mmc@480ad000           [/ocp@68000000/serial@4806a000            c/ocp@68000000/serial@4806c000            k/ocp@68000000/serial@49020000            s/ocp@68000000/serial@49042000         	   {/display          cpus                         +       cpu@0             arm,cortex-a8            „cpu          �             ”            ›cpu          § “à         µ            É            Ô            ã            ï           pmu@54000000              arm,cortex-a8-pmu            �T    €           ÷           debugss       soc           ti,omap-infra      mpu           ti,omap3-mpu            mpu       iva       
    ti,iva2.2           iva    dsp           ti,omap3-c64                ocp@68000000              ti,omap3-l3-smx simple-bus           �h               ÷   	   
                     +                    l3_main    l4@48000000           ti,omap3-l4-core simple-bus                      +               H         scm@2000              ti,omap3-scm simple-bus          �                             +                          pinmux@30              ti,omap3-padconf pinctrl-single          �   0  8                     +                       "            3        H           f  ÿ        ƒdefault         ‘               ï   é   twl4030-pins            ›  °  A         ï   ë      dss-dpi2-pins         °  ›   ¤       ¦       ¨       ª       ¸       º       ¼       ¾       À       Â       Ä       Æ       È       Ê       Ì       Î       Ð      Ò      Ô      Ö      Ø      Ú            ï  
      mmc1-pins         P  ›                                "    $    &           ï   ö      mmc2-pins         P  ›  (    *    ,    .    0    2    4     6     8     :           ï   ø      uart3-pins          ›  n  A   p             ï   ê      ehci-port-select-pins           ›   ˜            ï         hsusb2-pins       0  ›  ¤    ¦    ¨    ª    ¬    ®           ï         wl12xx-gpio-pins            ›  P    N           ï        smsc911x-pins           ›  ¢           ï           scm_conf@270              syscon simple-bus            �  p  0                     +                 p  0         ï      pbias_regulator@2b0           ti,pbias-omap3 ti,pbias-omap             �  °           ¯      pbias_mmc_omap2430          ¶pbias_mmc_omap2430          Å w@        Ý -ÆÀ         ï   ó         clocks                       +       clock@68          
    ti,clksel            �   h        õ                        +       clock-mcbsp5-mux-fck@4           �           õ              ti,composite-mux-clock          mcbsp5_mux_fck           ”   	   
         ï         clock-mcbsp3-mux-fck@0           �            õ              ti,composite-mux-clock          mcbsp3_mux_fck           ”      
         ï         clock-mcbsp4-mux-fck@2           �           õ              ti,composite-mux-clock          mcbsp4_mux_fck           ”      
         ï            mcbsp5_fck          õ              ti,composite-clock           ”               ï   ÿ      clock@4       
    ti,clksel            �           õ                        +       clock-mcbsp1-mux-fck@2           �           õ              ti,composite-mux-clock          mcbsp1_mux_fck           ”   	   
         ï         clock-mcbsp2-mux-fck@6           �           õ              ti,composite-mux-clock          mcbsp2_mux_fck           ”      
         ï            mcbsp1_fck          õ              ti,composite-clock           ”               ï   ú      mcbsp2_fck          õ              ti,composite-clock           ”               ï   ü      mcbsp3_fck          õ              ti,composite-clock           ”               ï   ý      mcbsp4_fck          õ              ti,composite-clock           ”               ï   þ            clockdomains          pinmux@a00             ti,omap3-padconf pinctrl-single          �  
    \                     +                       "            3        H           f  ÿ   twl4030-vpins-pins           ›                                    ï   ì      dss-dpi1-pins         0  ›   
                                          ï                 target-module@480a6000            ti,sysc-omap2 ti,sysc            �H
`D   H
`H   H
`L           rev sysc syss                      ,                  :            ”            ›ick                      +               H
`        aes1@0            ti,omap3-aes             �       P         ÷            G      	      
        Ltx rx            target-module@480c5000            ti,sysc-omap2 ti,sysc            �HPD   HPH   HPL           rev sysc syss                      ,                  :            ”            ›ick                      +               HP        aes2@0            ti,omap3-aes             �       P         ÷            G      A      B        Ltx rx            prm@48306000              ti,omap3-prm             �H0`   @          ÷      clocks                       +       virt_16_8m_ck           õ              fixed-clock         V Y          ï         osc_sys_ck@d40          õ              ti,mux-clock             ”                           �  @         ï         sys_ck@1270         õ              ti,divider-clock             ”           f           s            �  p         ~         ï   $      sys_clkout1@d70         õ              ti,gate-clock            ”            �  p        f         dpll3_x2_ck         õ              fixed-factor-clock           ”            •                     dpll3_m2x2_ck           õ              fixed-factor-clock           ”   !        •                        ï   #      dpll4_x2_ck         õ              fixed-factor-clock           ”   "        •                     corex2_fck          õ              fixed-factor-clock           ”   #        •                        ï   %      wkup_l4_ick         õ              fixed-factor-clock           ”   $        •                        ï   d      corex2_d3_fck           õ              fixed-factor-clock           ”   %        •                        ï   Œ      corex2_d5_fck           õ              fixed-factor-clock           ”   %        •                        ï   �         clockdomains             cm@48004000           ti,omap3-cm          �H @   @    clocks                       +       dummy_apb_pclk          õ              fixed-clock         V          omap_32k_fck            õ              fixed-clock         V  €          ï   J      virt_12m_ck         õ              fixed-clock         V ·          ï         virt_13m_ck         õ              fixed-clock         V Æ]@         ï         virt_19200000_ck            õ              fixed-clock         V$ø          ï         virt_26000000_ck            õ              fixed-clock         VŒº€         ï         virt_38_4m_ck           õ              fixed-clock         VIð          ï         dpll4_ck@d00            õ              ti,omap3-dpll-per-j-type-clock           ”   $   $         �        D  0         ï   "      dpll4_m2_ck@d48         õ              ti,divider-clock             ”   "        s   ?         �  H         ~         ï   &      dpll4_m2x2_mul_ck           õ              fixed-factor-clock           ”   &        •                        ï   '      dpll4_m2x2_ck@d00           õ              ti,hsdiv-gate-clock          ”   '        f            �            ª         ï   (      omap_96m_alwon_fck          õ              fixed-factor-clock           ”   (        •                        ï   4      dpll3_ck@d00            õ              ti,omap3-dpll-core-clock             ”   $   $         �        @  0         ï          clock@1140        
    ti,clksel            �  @        õ                        +       clock-dpll3-m3@16            �           õ              ti,divider-clock            dpll3_m3_ck          ”            s            ~         ï   .      clock-dpll4-m6@24            �           õ              ti,divider-clock            dpll4_m6_ck          ”   "        s   ?         ~         ï   @      clock-emu-src-mux@0          �            õ              ti,mux-clock            emu_src_mux_ck           ”   $   )   *   +         ï   x      clock-pclk-fck@8             �           õ              ti,divider-clock          	  pclk_fck             ”   ,        s            ~      clock-pclkx2-fck@6           �           õ              ti,divider-clock            pclkx2_fck           ”   ,        s            ~      clock-atclk-fck@4            �           õ              ti,divider-clock          
  atclk_fck            ”   ,        s            ~      clock-traceclk-src-fck@2             �           õ              ti,mux-clock            traceclk_src_fck             ”   $   )   *   +         ï   -      clock-traceclk-fck@11            �           õ              ti,divider-clock            traceclk_fck             ”   -        s            ~         dpll3_m3x2_mul_ck           õ              fixed-factor-clock           ”   .        •                        ï   /      dpll3_m3x2_ck@d00           õ              ti,hsdiv-gate-clock          ”   /        f            �            ª         ï   0      emu_core_alwon_ck           õ              fixed-factor-clock           ”   0        •                        ï   )      sys_altclk          õ              fixed-clock         V             ï   7      mcbsp_clks          õ              fixed-clock         V             ï   
      core_ck         õ              fixed-factor-clock           ”   !        •                        ï   1      dpll1_fck@940           õ              ti,divider-clock             ”   1        f           s            �  	@         ~         ï   2      dpll1_ck@904            õ              ti,omap3-dpll-clock          ”   $   2         �  	  	$  	@  	4         ï         dpll1_x2_ck         õ              fixed-factor-clock           ”           •                        ï   3      dpll1_x2m2_ck@944           õ              ti,divider-clock             ”   3        s            �  	D         ~         ï   G      cm_96m_fck          õ              fixed-factor-clock           ”   4        •                        ï   5      clock@d40         
    ti,clksel            �  @        õ                        +       clock-dpll3-m2@27            �           õ              ti,divider-clock            dpll3_m2_ck          ”            s            ~         ï   !      clock-omap-96m-fck@6             �           õ              ti,mux-clock            omap_96m_fck             ”   5   $         ï   [      clock-omap-54m-fck@5             �           õ              ti,mux-clock            omap_54m_fck             ”   6   7         ï   C      clock-omap-48m-fck@3             �           õ              ti,mux-clock            omap_48m_fck             ”   8   7         ï   ;         clock@e40         
    ti,clksel            �  @        õ                        +       clock-dpll4-m3@8             �           õ              ti,divider-clock            dpll4_m3_ck          ”   "        s             ~         ï   9      clock-dpll4-m4@0             �            õ              ti,divider-clock            dpll4_m4_ck          ”   "        s            ~         ï   <         dpll4_m3x2_mul_ck           õ              fixed-factor-clock           ”   9        •                        ï   :      dpll4_m3x2_ck@d00           õ              ti,hsdiv-gate-clock          ”   :        f            �            ª         ï   6      cm_96m_d2_fck           õ              fixed-factor-clock           ”   5        •                        ï   8      omap_12m_fck            õ              fixed-factor-clock           ”   ;        •                        ï   \      dpll4_m4x2_mul_ck           õ              ti,fixed-factor-clock            ”   <        À           Î            Û         ï   =      dpll4_m4x2_ck@d00           õ              ti,gate-clock            ”   =        f            �            ª         Û         ï   `      dpll4_m5_ck@f40         õ              ti,divider-clock             ”   "        s   ?         �  @         ~         ï   >      dpll4_m5x2_mul_ck           õ              ti,fixed-factor-clock            ”   >        À           Î            Û         ï   ?      dpll4_m5x2_ck@d00           õ              ti,hsdiv-gate-clock          ”   ?        f            �            ª         Û         ï   |      dpll4_m6x2_mul_ck           õ              fixed-factor-clock           ”   @        •                        ï   A      dpll4_m6x2_ck@d00           õ              ti,hsdiv-gate-clock          ”   A        f            �            ª         ï   B      emu_per_alwon_ck            õ              fixed-factor-clock           ”   B        •                        ï   *      clock@d70         
    ti,clksel            �  p        õ                        +       clock-clkout2-src-gate@7             �           õ               ti,composite-no-wait-gate-clock         clkout2_src_gate_ck          ”   1         ï   E      clock-clkout2-src-mux@0          �            õ              ti,composite-mux-clock          clkout2_src_mux_ck           ”   1   $   5   C         ï   F      clock-sys-clkout2@3          �           õ              ti,divider-clock            sys_clkout2          ”   D        s   @         î         clkout2_src_ck          õ              ti,composite-clock           ”   E   F         ï   D      mpu_ck          õ              fixed-factor-clock           ”   G        •                        ï   H      arm_fck@924         õ              ti,divider-clock             ”   H         �  	$        s         emu_mpu_alwon_ck            õ              fixed-factor-clock           ”   H        •                        ï   +      clock@a40         
    ti,clksel            �  
@        õ                        +       clock-l3-ick@0           �            õ              ti,divider-clock            l3_ick           ”   1        s            ~         ï   I      clock-l4-ick@2           �           õ              ti,divider-clock            l4_ick           ”   I        s            ~         ï   K      clock-gpt10-mux-fck@6            �           õ              ti,composite-mux-clock          gpt10_mux_fck            ”   J   $         ï   X      clock-gpt11-mux-fck@7            �           õ              ti,composite-mux-clock          gpt11_mux_fck            ”   J   $         ï   Z      clock-ssi-ssr-div-fck-3430es2@8          �           õ              ti,composite-divider-clock          ssi_ssr_div_fck_3430es2          ”   %      $                                         ï   �         clock@c40         
    ti,clksel            �  @        õ                        +       clock-rm-ick@1           �           õ              ti,divider-clock            rm_ick           ”   K        s            ~      clock-gpt1-mux-fck@0             �            õ              ti,composite-mux-clock          gpt1_mux_fck             ”   J   $         ï   c      clock-usim-mux-fck@3             �           õ              ti,composite-mux-clock          usim_mux_fck          (   ”   $   L   M   N   O   P   Q   R   S   T         ~         ï   …         clock@a00         
    ti,clksel            �  
         õ                        +       clock-gpt10-gate-fck@11          �           õ              ti,composite-gate-clock         gpt10_gate_fck           ”   $         ï   W      clock-gpt11-gate-fck@12          �           õ              ti,composite-gate-clock         gpt11_gate_fck           ”   $         ï   Y      clock-mmchs2-fck@25          �           õ              ti,wait-gate-clock          mmchs2_fck           ”   	         ï   »      clock-mmchs1-fck@24          �           õ              ti,wait-gate-clock          mmchs1_fck           ”   	         ï   ¼      clock-i2c3-fck@17            �           õ              ti,wait-gate-clock        	  i2c3_fck             ”   	         ï   ½      clock-i2c2-fck@16            �           õ              ti,wait-gate-clock        	  i2c2_fck             ”   	         ï   ¾      clock-i2c1-fck@15            �           õ              ti,wait-gate-clock        	  i2c1_fck             ”   	         ï   ¿      clock-mcbsp5-gate-fck@10             �   
        õ              ti,composite-gate-clock         mcbsp5_gate_fck          ”   
         ï         clock-mcbsp1-gate-fck@9          �   	        õ              ti,composite-gate-clock         mcbsp1_gate_fck          ”   
         ï         clock-mcspi4-fck@21          �           õ              ti,wait-gate-clock          mcspi4_fck           ”   U         ï   À      clock-mcspi3-fck@20          �           õ              ti,wait-gate-clock          mcspi3_fck           ”   U         ï   Á      clock-mcspi2-fck@19          �           õ              ti,wait-gate-clock          mcspi2_fck           ”   U         ï   Â      clock-mcspi1-fck@18          �           õ              ti,wait-gate-clock          mcspi1_fck           ”   U         ï   Ã      clock-uart2-fck@14           �           õ              ti,wait-gate-clock        
  uart2_fck            ”   U         ï   Ä      clock-uart1-fck@13           �           õ              ti,wait-gate-clock        
  uart1_fck            ”   U         ï   Å      clock-hdq-fck@22             �           õ              ti,wait-gate-clock          hdq_fck          ”   V         ï   Æ      clock-modem-fck@31           �           õ              ti,omap3-interface-clock          
  modem_fck            ”   $         ï   â      clock-mspro-fck@23           �           õ              ti,wait-gate-clock        
  mspro_fck            ”   	      clock-ssi-ssr-gate-fck-3430es2@0             �            õ               ti,composite-no-wait-gate-clock         ssi_ssr_gate_fck_3430es2             ”   %         ï   €      clock-mmchs3-fck@30          �           õ              ti,wait-gate-clock          mmchs3_fck           ”   	         ï   Þ         gpt10_fck           õ              ti,composite-clock           ”   W   X      gpt11_fck           õ              ti,composite-clock           ”   Y   Z      core_96m_fck            õ              fixed-factor-clock           ”   [        •                        ï   	      core_48m_fck            õ              fixed-factor-clock           ”   ;        •                        ï   U      core_12m_fck            õ              fixed-factor-clock           ”   \        •                        ï   V      core_l3_ick         õ              fixed-factor-clock           ”   I        •                        ï   ]      clock@a10         
    ti,clksel            �  
        õ                        +       clock-sdrc-ick@1             �           õ              ti,wait-gate-clock        	  sdrc_ick             ”   ]         ï   �      clock-mmchs2-ick@25          �           õ              ti,omap3-interface-clock            mmchs2_ick           ”   ^         ï   Ç      clock-mmchs1-ick@24          �           õ              ti,omap3-interface-clock            mmchs1_ick           ”   ^         ï   È      clock-hdq-ick@22             �           õ              ti,omap3-interface-clock            hdq_ick          ”   ^         ï   É      clock-mcspi4-ick@21          �           õ              ti,omap3-interface-clock            mcspi4_ick           ”   ^         ï   Ê      clock-mcspi3-ick@20          �           õ              ti,omap3-interface-clock            mcspi3_ick           ”   ^         ï   Ë      clock-mcspi2-ick@19          �           õ              ti,omap3-interface-clock            mcspi2_ick           ”   ^         ï   Ì      clock-mcspi1-ick@18          �           õ              ti,omap3-interface-clock            mcspi1_ick           ”   ^         ï   Í      clock-i2c3-ick@17            �           õ              ti,omap3-interface-clock          	  i2c3_ick             ”   ^         ï   Î      clock-i2c2-ick@16            �           õ              ti,omap3-interface-clock          	  i2c2_ick             ”   ^         ï   Ï      clock-i2c1-ick@15            �           õ              ti,omap3-interface-clock          	  i2c1_ick             ”   ^         ï   Ð      clock-uart2-ick@14           �           õ              ti,omap3-interface-clock          
  uart2_ick            ”   ^         ï   Ñ      clock-uart1-ick@13           �           õ              ti,omap3-interface-clock          
  uart1_ick            ”   ^         ï   Ò      clock-gpt11-ick@12           �           õ              ti,omap3-interface-clock          
  gpt11_ick            ”   ^         ï   Ó      clock-gpt10-ick@11           �           õ              ti,omap3-interface-clock          
  gpt10_ick            ”   ^         ï   Ô      clock-mcbsp5-ick@10          �   
        õ              ti,omap3-interface-clock            mcbsp5_ick           ”   ^         ï   Õ      clock-mcbsp1-ick@9           �   	        õ              ti,omap3-interface-clock            mcbsp1_ick           ”   ^         ï   Ö      clock-omapctrl-ick@6             �           õ              ti,omap3-interface-clock            omapctrl_ick             ”   ^         ï   ×      clock-aes2-ick@28            �           õ              ti,omap3-interface-clock          	  aes2_ick             ”   ^         ï         clock-sha12-ick@27           �           õ              ti,omap3-interface-clock          
  sha12_ick            ”   ^         ï   Ø      clock-icr-ick@29             �           õ              ti,omap3-interface-clock            icr_ick          ”   ^      clock-des2-ick@26            �           õ              ti,omap3-interface-clock          	  des2_ick             ”   ^      clock-mspro-ick@23           �           õ              ti,omap3-interface-clock          
  mspro_ick            ”   ^      clock-mailboxes-ick@7            �           õ              ti,omap3-interface-clock            mailboxes_ick            ”   ^      clock-sad2d-ick@3            �           õ              ti,omap3-interface-clock          
  sad2d_ick            ”   I         ï   ã      clock-hsotgusb-ick-3430es2@4             �           õ          "    ti,omap3-hsotgusb-interface-clock           hsotgusb_ick_3430es2             ”   ]         ï   ‘      clock-ssi-ick-3430es2@0          �            õ              ti,omap3-ssi-interface-clock            ssi_ick_3430es2          ”   _         ï        clock-mmchs3-ick@30          �           õ              ti,omap3-interface-clock            mmchs3_ick           ”   ^         ï   Ý         gpmc_fck            õ              fixed-factor-clock           ”   ]        •                     core_l4_ick         õ              fixed-factor-clock           ”   K        •                        ï   ^      clock@e00         
    ti,clksel            �           õ                        +       clock-dss-tv-fck            õ              ti,gate-clock           dss_tv_fck           ”   C        f            ï   ¶      clock-dss-96m-fck           õ              ti,gate-clock           dss_96m_fck          ”   [        f            ï   ·      clock-dss2-alwon-fck            õ              ti,gate-clock           dss2_alwon_fck           ”   $        f            ï   ¸      clock-dss1-alwon-fck-3430es2@0           �            õ              ti,dss-gate-clock           dss1_alwon_fck_3430es2           ”   `         Û         ï   ¹         dummy_ck            õ              fixed-clock         V          clock@c00         
    ti,clksel            �           õ                        +       clock-gpt1-gate-fck@0            �            õ              ti,composite-gate-clock         gpt1_gate_fck            ”   $         ï   b      clock-gpio1-dbck@3           �           õ              ti,gate-clock           gpio1_dbck           ”   a         ï   ­      clock-wdt2-fck@5             �           õ              ti,wait-gate-clock        	  wdt2_fck             ”   a         ï   ®      clock-sr1-fck@6          �           õ              ti,wait-gate-clock          sr1_fck          ”   $         ï        clock-sr2-fck@7          �           õ              ti,wait-gate-clock          sr2_fck          ”   $         ï        clock-usim-gate-fck@9            �   	        õ              ti,composite-gate-clock         usim_gate_fck            ”   [         ï   „         gpt1_fck            õ              ti,composite-clock           ”   b   c         ï         wkup_32k_fck            õ              fixed-factor-clock           ”   J        •                        ï   a      clock@c10         
    ti,clksel            �          õ                        +       clock-wdt2-ick@5             �           õ              ti,omap3-interface-clock          	  wdt2_ick             ”   d         ï   ¯      clock-wdt1-ick@4             �           õ              ti,omap3-interface-clock          	  wdt1_ick             ”   d         ï   °      clock-gpio1-ick@3            �           õ              ti,omap3-interface-clock          
  gpio1_ick            ”   d         ï   ±      clock-omap-32ksync-ick@2             �           õ              ti,omap3-interface-clock            omap_32ksync_ick             ”   d         ï   ²      clock-gpt12-ick@1            �           õ              ti,omap3-interface-clock          
  gpt12_ick            ”   d         ï   ³      clock-gpt1-ick@0             �            õ              ti,omap3-interface-clock          	  gpt1_ick             ”   d         ï   ´      clock-usim-ick@9             �   	        õ              ti,omap3-interface-clock          	  usim_ick             ”   d         ï   µ         per_96m_fck         õ              fixed-factor-clock           ”   4        •                        ï         per_48m_fck         õ              fixed-factor-clock           ”   ;        •                        ï   e      clock@1000        
    ti,clksel            �           õ                        +       clock-uart3-fck@11           �           õ              ti,wait-gate-clock        
  uart3_fck            ”   e         ï   ’      clock-gpt2-gate-fck@3            �           õ              ti,composite-gate-clock         gpt2_gate_fck            ”   $         ï   g      clock-gpt3-gate-fck@4            �           õ              ti,composite-gate-clock         gpt3_gate_fck            ”   $         ï   i      clock-gpt4-gate-fck@5            �           õ              ti,composite-gate-clock         gpt4_gate_fck            ”   $         ï   k      clock-gpt5-gate-fck@6            �           õ              ti,composite-gate-clock         gpt5_gate_fck            ”   $         ï   m      clock-gpt6-gate-fck@7            �           õ              ti,composite-gate-clock         gpt6_gate_fck            ”   $         ï   o      clock-gpt7-gate-fck@8            �           õ              ti,composite-gate-clock         gpt7_gate_fck            ”   $         ï   q      clock-gpt8-gate-fck@9            �   	        õ              ti,composite-gate-clock         gpt8_gate_fck            ”   $         ï   s      clock-gpt9-gate-fck@10           �   
        õ              ti,composite-gate-clock         gpt9_gate_fck            ”   $         ï   u      clock-gpio6-dbck@17          �           õ              ti,gate-clock           gpio6_dbck           ”   f         ï   “      clock-gpio5-dbck@16          �           õ              ti,gate-clock           gpio5_dbck           ”   f         ï   ”      clock-gpio4-dbck@15          �           õ              ti,gate-clock           gpio4_dbck           ”   f         ï   •      clock-gpio3-dbck@14          �           õ              ti,gate-clock           gpio3_dbck           ”   f         ï   –      clock-gpio2-dbck@13          �           õ              ti,gate-clock           gpio2_dbck           ”   f         ï   —      clock-wdt3-fck@12            �           õ              ti,wait-gate-clock        	  wdt3_fck             ”   f         ï   ˜      clock-mcbsp2-gate-fck@0          �            õ              ti,composite-gate-clock         mcbsp2_gate_fck          ”   
         ï         clock-mcbsp3-gate-fck@1          �           õ              ti,composite-gate-clock         mcbsp3_gate_fck          ”   
         ï         clock-mcbsp4-gate-fck@2          �           õ              ti,composite-gate-clock         mcbsp4_gate_fck          ”   
         ï         clock-uart4-fck@18           �           õ              ti,wait-gate-clock        
  uart4_fck            ”   e         ï   ¬         clock@1040        
    ti,clksel            �  @        õ                        +       clock-gpt2-mux-fck@0             �            õ              ti,composite-mux-clock          gpt2_mux_fck             ”   J   $         ï   h      clock-gpt3-mux-fck@1             �           õ              ti,composite-mux-clock          gpt3_mux_fck             ”   J   $         ï   j      clock-gpt4-mux-fck@2             �           õ              ti,composite-mux-clock          gpt4_mux_fck             ”   J   $         ï   l      clock-gpt5-mux-fck@3             �           õ              ti,composite-mux-clock          gpt5_mux_fck             ”   J   $         ï   n      clock-gpt6-mux-fck@4             �           õ              ti,composite-mux-clock          gpt6_mux_fck             ”   J   $         ï   p      clock-gpt7-mux-fck@5             �           õ              ti,composite-mux-clock          gpt7_mux_fck             ”   J   $         ï   r      clock-gpt8-mux-fck@6             �           õ              ti,composite-mux-clock          gpt8_mux_fck             ”   J   $         ï   t      clock-gpt9-mux-fck@7             �           õ              ti,composite-mux-clock          gpt9_mux_fck             ”   J   $         ï   v         gpt2_fck            õ              ti,composite-clock           ”   g   h         ï        gpt3_fck            õ              ti,composite-clock           ”   i   j      gpt4_fck            õ              ti,composite-clock           ”   k   l      gpt5_fck            õ              ti,composite-clock           ”   m   n      gpt6_fck            õ              ti,composite-clock           ”   o   p      gpt7_fck            õ              ti,composite-clock           ”   q   r      gpt8_fck            õ              ti,composite-clock           ”   s   t      gpt9_fck            õ              ti,composite-clock           ”   u   v      per_32k_alwon_fck           õ              fixed-factor-clock           ”   J        •                        ï   f      per_l4_ick          õ              fixed-factor-clock           ”   K        •                        ï   w      clock@1010        
    ti,clksel            �          õ                        +       clock-gpio6-ick@17           �           õ              ti,omap3-interface-clock          
  gpio6_ick            ”   w         ï   ™      clock-gpio5-ick@16           �           õ              ti,omap3-interface-clock          
  gpio5_ick            ”   w         ï   š      clock-gpio4-ick@15           �           õ              ti,omap3-interface-clock          
  gpio4_ick            ”   w         ï   ›      clock-gpio3-ick@14           �           õ              ti,omap3-interface-clock          
  gpio3_ick            ”   w         ï   œ      clock-gpio2-ick@13           �           õ              ti,omap3-interface-clock          
  gpio2_ick            ”   w         ï   �      clock-wdt3-ick@12            �           õ              ti,omap3-interface-clock          	  wdt3_ick             ”   w         ï   ž      clock-uart3-ick@11           �           õ              ti,omap3-interface-clock          
  uart3_ick            ”   w         ï   Ÿ      clock-uart4-ick@18           �           õ              ti,omap3-interface-clock          
  uart4_ick            ”   w         ï          clock-gpt9-ick@10            �   
        õ              ti,omap3-interface-clock          	  gpt9_ick             ”   w         ï   ¡      clock-gpt8-ick@9             �   	        õ              ti,omap3-interface-clock          	  gpt8_ick             ”   w         ï   ¢      clock-gpt7-ick@8             �           õ              ti,omap3-interface-clock          	  gpt7_ick             ”   w         ï   £      clock-gpt6-ick@7             �           õ              ti,omap3-interface-clock          	  gpt6_ick             ”   w         ï   ¤      clock-gpt5-ick@6             �           õ              ti,omap3-interface-clock          	  gpt5_ick             ”   w         ï   ¥      clock-gpt4-ick@5             �           õ              ti,omap3-interface-clock          	  gpt4_ick             ”   w         ï   ¦      clock-gpt3-ick@4             �           õ              ti,omap3-interface-clock          	  gpt3_ick             ”   w         ï   §      clock-gpt2-ick@3             �           õ              ti,omap3-interface-clock          	  gpt2_ick             ”   w         ï   ¨      clock-mcbsp2-ick@0           �            õ              ti,omap3-interface-clock            mcbsp2_ick           ”   w         ï   ©      clock-mcbsp3-ick@1           �           õ              ti,omap3-interface-clock            mcbsp3_ick           ”   w         ï   ª      clock-mcbsp4-ick@2           �           õ              ti,omap3-interface-clock            mcbsp4_ick           ”   w         ï   «         emu_src_ck          õ              ti,clkdm-gate-clock          ”   x         ï   ,      secure_32k_fck          õ              fixed-clock         V  €          ï   y      gpt12_fck           õ              fixed-factor-clock           ”   y        •                        ï        wdt1_fck            õ              fixed-factor-clock           ”   y        •                     security_l4_ick2            õ              fixed-factor-clock           ”   K        •                        ï   z      clock@a14         
    ti,clksel            �  
        õ                        +       clock-aes1-ick@3             �           õ              ti,omap3-interface-clock          	  aes1_ick             ”   z         ï         clock-rng-ick@2          �           õ              ti,omap3-interface-clock            rng_ick          ”   z         ï   û      clock-sha11-ick@1            �           õ              ti,omap3-interface-clock          
  sha11_ick            ”   z      clock-des1-ick@0             �            õ              ti,omap3-interface-clock          	  des1_ick             ”   z      clock-pka-ick@4          �           õ              ti,omap3-interface-clock            pka_ick          ”   {         clock@f00         
    ti,clksel            �           õ                        +       clock-cam-mclk@0             �            õ              ti,gate-clock         	  cam_mclk             ”   |         Û      clock-csi2-96m-fck@1             �           õ              ti,gate-clock           csi2_96m_fck             ”   	         ï   à         cam_ick@f10         õ          !    ti,omap3-no-wait-interface-clock             ”   K         �          f             ï   ß      security_l3_ick         õ              fixed-factor-clock           ”   I        •                        ï   {      ssi_l4_ick          õ              fixed-factor-clock           ”   K        •                        ï   _      sr_l4_ick           õ              fixed-factor-clock           ”   K        •                     dpll2_fck@40            õ              ti,divider-clock             ”   1        f           s            �   @         ~         ï   }      dpll2_ck@4          õ              ti,omap3-dpll-clock          ”   $   }         �      $   @   4                  "         *         ï   ~      dpll2_m2_ck@44          õ              ti,divider-clock             ”   ~        s            �   D         ~         ï         iva2_ck@0           õ              ti,wait-gate-clock           ”            �            f             ï   á      clock@a18         
    ti,clksel            �  
        õ                       >             +       clock-mad2d-ick@3            �           õ              ti,omap3-interface-clock          
  mad2d_ick            ”   I         ï   ä      clock-usbtll-ick@2           �           õ              ti,omap3-interface-clock            usbtll_ick           ”   ^         ï   Ü         ssi_ssr_fck_3430es2         õ              ti,composite-clock           ”   €   �         ï   ‚      ssi_sst_fck_3430es2         õ              fixed-factor-clock           ”   ‚        •                        ï        sys_d2_ck           õ              fixed-factor-clock           ”   $        •                        ï   L      omap_96m_d2_fck         õ              fixed-factor-clock           ”   [        •                        ï   M      omap_96m_d4_fck         õ              fixed-factor-clock           ”   [        •                        ï   N      omap_96m_d8_fck         õ              fixed-factor-clock           ”   [        •                        ï   O      omap_96m_d10_fck            õ              fixed-factor-clock           ”   [        •               
         ï   P      dpll5_m2_d4_ck          õ              fixed-factor-clock           ”   ƒ        •                        ï   Q      dpll5_m2_d8_ck          õ              fixed-factor-clock           ”   ƒ        •                        ï   R      dpll5_m2_d16_ck         õ              fixed-factor-clock           ”   ƒ        •                        ï   S      dpll5_m2_d20_ck         õ              fixed-factor-clock           ”   ƒ        •                        ï   T      usim_fck            õ              ti,composite-clock           ”   „   …      dpll5_ck@d04            õ              ti,omap3-dpll-clock          ”   $   $         �    $  L  4                  "         ï   †      dpll5_m2_ck@d50         õ              ti,divider-clock             ”   †        s            �  P         ~         ï   ƒ      sgx_gate_fck@b00            õ              ti,composite-gate-clock          ”   1        f            �            ï   Ž      core_d3_ck          õ              fixed-factor-clock           ”   1        •                        ï   ‡      core_d4_ck          õ              fixed-factor-clock           ”   1        •                        ï   ˆ      core_d6_ck          õ              fixed-factor-clock           ”   1        •                        ï   ‰      omap_192m_alwon_fck         õ              fixed-factor-clock           ”   (        •                        ï   Š      core_d2_ck          õ              fixed-factor-clock           ”   1        •                        ï   ‹      sgx_mux_fck@b40         õ              ti,composite-mux-clock            ”   ‡   ˆ   ‰   5   Š   ‹   Œ   �         �  @         ï   �      sgx_fck         õ              ti,composite-clock           ”   Ž   �         ï        sgx_ick@b10         õ              ti,wait-gate-clock           ”   I         �          f             ï   å      cpefuse_fck@a08         õ              ti,gate-clock            ”   $         �  
        f             ï   Ù      ts_fck@a08          õ              ti,gate-clock            ”   J         �  
        f            ï   Ú      usbtll_fck@a08          õ              ti,wait-gate-clock           ”   ƒ         �  
        f            ï   Û      dss_ick_3430es2@e10         õ              ti,omap3-dss-interface-clock             ”   K         �          f             ï   º      usbhost_120m_fck@1400           õ              ti,gate-clock            ”   ƒ         �           f            ï   æ      usbhost_48m_fck@1400            õ              ti,dss-gate-clock            ”   ;         �           f             ï   ç      usbhost_ick@1410            õ              ti,omap3-dss-interface-clock             ”   K         �          f             ï   è         clockdomains       core_l3_clkdm             ti,clockdomain           ”   �   ‘      dpll3_clkdm           ti,clockdomain           ”          dpll1_clkdm           ti,clockdomain           ”         per_clkdm             ti,clockdomain        l   ”   ’   “   ”   •   –   —   ˜   ™   š   ›   œ   �   ž   Ÿ       ¡   ¢   £   ¤   ¥   ¦   §   ¨   ©   ª   «   ¬      emu_clkdm             ti,clockdomain           ”   ,      dpll4_clkdm           ti,clockdomain           ”   "      wkup_clkdm            ti,clockdomain        $   ”   ­   ®   ¯   °   ±   ²   ³   ´   µ      dss_clkdm             ti,clockdomain           ”   ¶   ·   ¸   ¹   º      core_l4_clkdm             ti,clockdomain        ”   ”   »   ¼   ½   ¾   ¿   À   Á   Â   Ã   Ä   Å   Æ   Ç   È   É   Ê   Ë   Ì   Í   Î   Ï   Ð   Ñ   Ò   Ó   Ô   Õ   Ö   ×      Ø   Ù   Ú   Û   Ü   Ý   Þ      cam_clkdm             ti,clockdomain           ”   ß   à      iva2_clkdm            ti,clockdomain           ”   á      dpll2_clkdm           ti,clockdomain           ”   ~      d2d_clkdm             ti,clockdomain           ”   â   ã   ä      dpll5_clkdm           ti,clockdomain           ”   †      sgx_clkdm             ti,clockdomain           ”   å      usbhost_clkdm             ti,clockdomain           ”   æ   ç   è            target-module@48320000            ti,sysc-omap2 ti,sysc            �H2     H2          	  rev sysc            ,                ”   a   ²         ›fck ick                      +               H2        counter@0             ti,omap-counter32k           �                 interrupt-controller@48200000             ti,omap3-intc            3        "            �H               ï         target-module@48056000            ti,sysc-omap2 ti,sysc            �H`    H`,   H`(           rev sysc syss             #        K                  ,                  :            ”   ]         ›ick                      +               H`       dma-controller@0              ti,omap3630-sdma ti,omap-sdma            �                ÷                    Y           d            q   `         ï            gpio@48310000             ti,omap3-gpio            �H1              ÷           gpio1            ~         �                     3        "            ï        gpio@49050000             ti,omap3-gpio            �I              ÷           gpio2            �                     3        "      en-usb2-port-hog             ¬        µ                »        Æenable usb2 port             gpio@49052000             ti,omap3-gpio            �I              ÷           gpio3            �                     3        "         gpio@49054000             ti,omap3-gpio            �I@             ÷            gpio4            �                     3        "         gpio@49056000             ti,omap3-gpio            �I`             ÷   !        gpio5            �                     3        "            ï   ù      gpio@49058000             ti,omap3-gpio            �I€             ÷   "        gpio6            �                     3        "            ï   ò      serial@4806a000           ti,omap3-uart            �H              Ð      H   é  R        G      1      2        Ltx rx           uart1           VÜl       serial@4806c000           ti,omap3-uart            �HÀ            Ð      I   é  J        G      3      4        Ltx rx           uart2           VÜl       serial@49020000           ti,omap3-uart            �I             Ð      J   é  n        G      5      6        Ltx rx           uart3           VÜl         ƒdefault         ‘   ê      i2c@48070000              ti,omap3-i2c             �H     €         ÷   8                     +            i2c1            V '¬@   twl@48           �   H         ÷                         ti,twl4030           3        "           ƒdefault         ‘   ë   ì   rtc           ti,twl4030-rtc           ÷         bci           ti,twl4030-bci           ÷   	           ä   í        ò   î           þvac       watchdog              ti,twl4030-wdt        regulator-vaux1           ti,twl4030-vaux1          regulator-vaux2           ti,twl4030-vaux2            ¶usb_1v8         Å w@        Ý w@               regulator-vaux3           ti,twl4030-vaux3          regulator-vaux4           ti,twl4030-vaux4          regulator-vdd1            ti,twl4030-vdd1         Å 	'À        Ý           ï         regulator-vdac            ti,twl4030-vdac         Å w@        Ý w@      regulator-vio             ti,twl4030-vio        regulator-vintana1            ti,twl4030-vintana1       regulator-vintana2            ti,twl4030-vintana2       regulator-vintdig             ti,twl4030-vintdig        regulator-vmmc1           ti,twl4030-vmmc1            Å :�        Ý 0°         ï   ô      regulator-vmmc2           ti,twl4030-vmmc2            Å :�        Ý 0°         ï        regulator-vusb1v5             ti,twl4030-vusb1v5           ï   ï      regulator-vusb1v8             ti,twl4030-vusb1v8           ï   ð      regulator-vusb3v1             ti,twl4030-vusb3v1           ï   í      regulator-vpll1           ti,twl4030-vpll1          regulator-vpll2           ti,twl4030-vpll2            Å w@        Ý w@                  ï  	      regulator-vsim            ti,twl4030-vsim         Å w@        Ý -ÆÀ         ï   õ      gpio              ti,twl4030-gpio          �                     3        "            #         ï     en_on_board_gpio_61          ¬        µ                »        Æen_hsusb2_clk            twl4030-usb           ti,twl4030-usb           ÷   
           /   ï        =   ð        K   í        Y           b             ï        pwm           ti,twl4030-pwm          m         pwmled            ti,twl4030-pwmled           m         pwrbutton             ti,twl4030-pwrbutton             ÷         keypad            ti,twl4030-keypad            ÷           x           ˆ         8  ›           	  
 7    S         madc              ti,twl4030-madc          ÷           ¨            ï   î      power         1    ti,twl4030-power-omap3-evm ti,twl4030-power-idle             º            i2c@48072000              ti,omap3-i2c             �H     €         ÷   9                     +            i2c2            V €      i2c@48060000              ti,omap3-i2c             �H     €         ÷   =                     +            i2c3            V €   tvp5146@5c            ti,tvp5146m2             �   \         mailbox@48094000              ti,omap3-mailbox            mailbox          �H	@             ÷           Ê           Ö           è      mbox-dsp            ú                                        spi@48098000              ti,omap2-mcspi           �H	€             ÷   A                     +            mcspi1                   @  G      #      $      %      &      '      (      )      *         Ltx0 rx0 tx1 rx1 tx2 rx2 tx3 rx3    tsc2046@0            �              ti,tsc2046           B@        0   ñ        ;            D@          M            VÀ          _ (          o ÿ                    Š            ò         ÷               ˜   ò                spi@4809a000              ti,omap2-mcspi           �H	              ÷   B                     +            mcspi2                      G      +      ,      -      .        Ltx0 rx0 tx1 rx1       spi@480b8000              ti,omap2-mcspi           �H€             ÷   [                     +            mcspi3                      G                                Ltx0 rx0 tx1 rx1       spi@480ba000              ti,omap2-mcspi           �H              ÷   0                     +            mcspi4                     G      F      G        Ltx0 rx0       1w@480b2000           ti,omap3-1w          �H              ÷   :        hdq1w         mmc@4809c000              ti,omap3-hsmmc           �H	À             ÷   S        mmc1             ¥        G      =      >        Ltx rx           ²   ó        Ð      S   é          ¿   ô        Ë   õ        Ø           ƒdefault         ‘   ö      mmc@480b4000              ti,omap3-hsmmc           �H@             ÷   V        mmc2            G      /      0        Ltx rx           Ð      V   é  .        ¿   ÷         â        Ø            ð                     +            ƒdefault         ‘   ø   wlcore@2          
    ti,wl1271            �           Ð   ù         é  N        irq wakeup          Ið          mmc@480ad000              ti,omap3-hsmmc           �H
Ð             ÷   ^        mmc3            G      M      N        Ltx rx         	  'disabled          mmu@480bd400            .              ti,omap2-iommu           �HÔ    €         ÷           mmu_isp         ;            ï        mmu@5d000000            .              ti,omap2-iommu           �]      €         ÷           mmu_iva       	  'disabled          wdt@48314000              ti,omap3-wdt             �H1@    €      
  wd_timer2         mcbsp@48074000            ti,omap3-mcbsp           �H@    ÿ        mpu          ÷      ;   <        common tx rx            K   €        mcbsp1          G                     Ltx rx            ”   ú         ›fck       	  'disabled          target-module@480a0000            ti,sysc-omap2 ti,sysc            �H
 <   H
 @   H
 D           rev sysc syss                      ,               :            ”   û         ›ick                      +               H
         rng@0             ti,omap2-rng             �                 ÷   4         mcbsp@49022000            ti,omap3-mcbsp           �I     ÿI€    ÿ        mpu sidetone             ÷      >   ?           common tx rx sidetone           K           mcbsp2 mcbsp2_sidetone          G      !      "        Ltx rx            ”   ü   ©         ›fck ick       	  'disabled          mcbsp@49024000            ti,omap3-mcbsp           �I@    ÿI     ÿ        mpu sidetone             ÷      Y   Z           common tx rx sidetone           K   €        mcbsp3 mcbsp3_sidetone          G                    Ltx rx            ”   ý   ª         ›fck ick       	  'disabled          mcbsp@49026000            ti,omap3-mcbsp           �I`    ÿ        mpu          ÷      6   7        common tx rx            K   €        mcbsp4          G                    Ltx rx            ”   þ         ›fck         Z          	  'disabled          mcbsp@48096000            ti,omap3-mcbsp           �H	`    ÿ        mpu          ÷      Q   R        common tx rx            K   €        mcbsp5          G                    Ltx rx            ”   ÿ         ›fck       	  'disabled          sham@480c3000             ti,omap3-sham           sham             �H0    d         ÷   1        G      E        Lrx        target-module@48318000            ti,sysc-omap2-timer ti,sysc          �H1€    H1€   H1€           rev sysc syss             '        ,                  :            ”      ´         ›fck ick                      +               H1€             k            timer@0           ti,omap3430-timer            �       €         ”            ›fck          ÷   %         Š        ™           ©   J         target-module@49032000            ti,sysc-omap2-timer ti,sysc          �I     I    I            rev sysc syss             '        ,                  :            ”     ¨         ›fck ick                      +               I        timer@0           ti,omap3430-timer            �                ÷   &         timer@49034000            ti,omap3430-timer            �I@             ÷   '        timer3        timer@49036000            ti,omap3430-timer            �I`             ÷   (        timer4        timer@49038000            ti,omap3430-timer            �I€             ÷   )        timer5           À      timer@4903a000            ti,omap3430-timer            �I              ÷   *        timer6           À      timer@4903c000            ti,omap3430-timer            �IÀ             ÷   +        timer7           À      timer@4903e000            ti,omap3430-timer            �Ià             ÷   ,        timer8           Í         À      timer@49040000            ti,omap3430-timer            �I              ÷   -        timer9           Í      timer@48086000            ti,omap3430-timer            �H`             ÷   .        timer10          Í      timer@48088000            ti,omap3430-timer            �H€             ÷   /        timer11          Í      target-module@48304000            ti,sysc-omap2-timer ti,sysc          �H0@    H0@   H0@           rev sysc syss             '        ,                  :            ”     ³         ›fck ick                      +               H0@       timer@0           ti,omap3430-timer            �                ÷   _         Š         Ú         usbhstll@48062000             ti,usbhs-tll             �H              ÷   N        usb_tll_hs        usbhshost@48064000            ti,usbhs-host            �H@            usb_host_hs                      +                  	  êehci-phy       ohci@48064400             ti,ohci-omap3            �HD             ÷   L         õ      ehci@48064800             ti,ehci-omap             �HH             ÷   M                       gpmc@6e000000             ti,omap3430-gpmc            gpmc             �n     Ð         ÷           G              Lrxtx                                               +            3        "            �                             0             ,               ï     ethernet@gpmc             smsc,lan9221 smsc,lan9115           0           ;            M         g        �           �   –        ¡   –        ³            Â           Õ   (        è   -        ö   Œ           -           Œ        "   ›        3   ›        D   x        S           m   K        „   K        ž            ¶            Í            å            ÷          	          	            	"            ò         ÷               �          ÿ        ƒdefault         ‘        nand@0,0              ti,omap2-nand            �                               ÷                       	8hynix,h8kds0un0mer-4em          	G           ;           	Vbch8            	f            �            �   ,        ¡   ,        ³           Â   "        Õ   ,           (        ö   6        D   @        "   R        3   R        å   (        Í                         +      partition@0       	  	wX-Loader             �             partition@80000         	wU-Boot           �            partition@1c0000            	wEnvironment          � $           partition@280000            	wKernel           � (   P        partition@780000            	wFilesystem           � x  ˆ              target-module@480ab000            ti,sysc-omap2 ti,sysc            �H
´    H
´   H
´           rev sysc syss                      K                  ,                  :            ›fck                      +               H
°             ”   ‘   usb@0             ti,omap3-musb            �                ÷   \   ]        mc dma          	}           	ˆ           	�           	™            	¨                  	  	°usb2-phy            ]           	º   2         dss@48050000              ti,omap3-dss             �H             'okay          	  dss_core             ”   ¹         ›fck                      +                    	À  	        	Ð   ñ        ƒdefault         ‘  
     dispc@48050400            ti,omap3-dispc           �H             ÷         
  dss_dispc            ”   ¹         ›fck       encoder@4804fc00              ti,omap3-dsi             �Hü    Hþ    @Hÿ             proto phy pll            ÷         	  'disabled          	  dss_dsi1             ”   ¹   ¸         ›fck sys_clk                      +          encoder@48050800              ti,omap3-rfbi            �H          	  'disabled          	  dss_rfbi             ”   ¹   º         ›fck ick       encoder@48050c00              ti,omap3-venc            �H          	  'disabled          	  dss_venc             ”   ¶   ·         ›fck tv_dac_clk        port       endpoint            	â          	ò            ï              ssi-controller@48058000           ti,omap3-ssi            ssi         'okay             �H€    H�            sys gdd          ÷   G        gdd_mpu                      +                     ”   ‚              ›ssi_ssr_fck ssi_sst_fck ssi_ick    ssi-port@4805a000             ti,omap3-ssi-port            �H     H¨            tx rx            ÷   C   D      ssi-port@4805b000             ti,omap3-ssi-port            �H°    H¸            tx rx            ÷   E   F         serial@49042000           ti,omap3-uart            �I              ÷   P        G      Q      R        Ltx rx           uart4           VÜl       regulator-abb-mpu         
    ti,abb-v1           ¶abb_mpu_iva                       +             �H0rð   H0h           base-address int-address            	ý            ”   $        
           
'         `  
7 s                     O€                     7È                     û                            ï         pinmux@480025a0            ti,omap3-padconf pinctrl-single          �H %    \                     +                       "            3        H           f  ÿ        ƒdefault         ‘     ehci-phy-pins           ›   J      L            ï        hsusb2-2-pins         0  ›   P      R      T     V     X     Z           ï           isp@480bc000              ti,omap3-isp             �HÀ   üHØ             ÷           
C          ¯     ð        
J           õ      ports                        +             bandgap@48002524             �H %$             ti,omap36xx-bandgap         
V             ï        target-module@480cb000            ti,sysc-omap3630-sr ti,sysc         smartreflex_core             �H°8           sysc                       ,                   ”           ›fck                      +               H°       smartreflex@0             ti,omap3-smartreflex-core            �                ÷            target-module@480c9000            ti,sysc-omap3630-sr ti,sysc         smartreflex_mpu_iva          �H�8           sysc                       ,                   ”           ›fck                      +               H�       smartreflex@480c9000              ti,omap3-smartreflex-mpu-iva             �                ÷            target-module@50000000            ti,sysc-omap4 ti,sysc            �P þ    P þ         	  rev sysc            K                  ,                   ”     å         ›fck ick                      +               P         gpu@0         #    ti,omap3630-gpu img,powervr-sgx530           �                ÷               opp-table             operating-points-v2-ti-cpu          ¯            ï      opp-50-300000000            
l    á£         
s s s s s s s        
�ÿÿÿÿ            
’      opp-100-600000000           
l    #ÃF         
s O€ O€ O€ O€ O€ O€        
�ÿÿÿÿ         opp-130-800000000           
l    /¯         
s 7È 7È 7È 7È 7È 7È        
�ÿÿÿÿ         opp-1000000000          
l    ;šÊ         
s û û û û û û        
�ÿÿÿÿ            
ž         opp-supply            ti,omap-opp-supply          
© û      thermal-zones      cpu-thermal         
Ä   ú        
Ú  è        
è      N         
õ     trips      cpu_alert            8€          Ð         ‹passive          ï        cpu_crit             _�          Ð      	   ‹critical             cooling-maps       map0                      !  ÿÿÿÿÿÿÿÿ               regulator-vddvario            regulator-fixed       	  ¶vddvario                      ï        regulator-vdd33a              regulator-fixed         ¶vdd33a                    ï        hsusb2_power_reg              regulator-fixed         ¶hsusb2_vbus         Å 2Z         Ý 2Z                           0 p         A         ï        hsusb2-phy-pins           usb-nop-xceiv           T                0          b            ƒdefault         ‘           ï        leds          
    gpio-leds      ledb            	womap3evm::ledb          µ                 `default-on           wl12xx_vmmc           regulator-fixed         ¶vwl1271         Å w@        Ý w@            ù               0 p         A        v          ƒdefault         ‘           ï   ÷      backlight             gpio-backlight           �        µ              regulator-lcd-3v3             regulator-fixed         ¶lcd_3v3         Å 2Z         Ý 2Z         0 p            ù               ï   ñ      display           sharp,ls037v7dw01           	wlcd         Œ   ñ        ™   ñ        ¦   ù               T   ù             $  ³   ù                            port       endpoint            	â           ï              memory@80000000          „memory           �€               	compatible interrupt-parent #address-cells #size-cells model i2c0 i2c1 i2c2 mmc0 mmc1 mmc2 serial0 serial1 serial2 serial3 display0 device_type reg clocks clock-names clock-latency operating-points-v2 vbb-supply #cooling-cells cpu0-supply phandle interrupts ti,hwmods ranges #pinctrl-cells #interrupt-cells interrupt-controller pinctrl-single,register-width pinctrl-single,function-mask pinctrl-names pinctrl-0 pinctrl-single,pins syscon regulator-name regulator-min-microvolt regulator-max-microvolt #clock-cells clock-output-names reg-names ti,sysc-mask ti,sysc-sidle ti,syss-mask dmas dma-names clock-frequency ti,bit-shift ti,max-div ti,index-starts-at-one clock-mult clock-div ti,set-bit-to-disable ti,clock-mult ti,clock-div ti,set-rate-parent ti,index-power-of-two ti,dividers ti,low-power-stop ti,lock ti,low-power-bypass #ssize-cells ti,sysc-midle #dma-cells dma-channels dma-requests ti,gpio-always-on gpio-controller #gpio-cells gpio-hog gpios output-low line-name interrupts-extended bci3v1-supply io-channels io-channel-names regulator-always-on ti,use-leds usb1v5-supply usb1v8-supply usb3v1-supply usb_mode #phy-cells #pwm-cells keypad,num-rows keypad,num-columns linux,keymap #io-channel-cells ti,use_poweroff #mbox-cells ti,mbox-num-users ti,mbox-num-fifos ti,mbox-tx ti,mbox-rx ti,spi-num-cs spi-max-frequency vcc-supply ti,x-min ti,x-max ti,y-min ti,y-max ti,x-plate-ohms ti,pressure-max ti,swap-xy wakeup-source pendown-gpio ti,dual-volt pbias-supply vmmc-supply vqmmc-supply bus-width non-removable cap-power-off-card interrupt-names ref-clock-frequency status #iommu-cells ti,#tlb-entries ti,buffer-size #sound-dai-cells ti,no-reset-on-init ti,no-idle ti,timer-alwon assigned-clocks assigned-clock-parents ti,timer-dsp ti,timer-pwm ti,timer-secure port2-mode remote-wakeup-connected phys gpmc,num-cs gpmc,num-waitpins bank-width gpmc,device-width gpmc,cycle2cycle-samecsen gpmc,cycle2cycle-diffcsen gpmc,cs-on-ns gpmc,cs-rd-off-ns gpmc,cs-wr-off-ns gpmc,adv-on-ns gpmc,adv-rd-off-ns gpmc,adv-wr-off-ns gpmc,oe-on-ns gpmc,oe-off-ns gpmc,we-on-ns gpmc,we-off-ns gpmc,rd-cycle-ns gpmc,wr-cycle-ns gpmc,access-ns gpmc,page-burst-access-ns gpmc,bus-turnaround-ns gpmc,cycle2cycle-delay-ns gpmc,wait-monitoring-ns gpmc,clk-activation-ns gpmc,wr-data-mux-bus-ns gpmc,wr-access-ns vddvario-supply vdd33a-supply reg-io-width smsc,save-mac-address linux,mtd-name nand-bus-width ti,nand-ecc-opt gpmc,sync-clk-ps label multipoint num-eps ram-bits interface-type usb-phy phy-names power vdds_dsi-supply vdda_video-supply remote-endpoint data-lines ti,tranxdone-status-mask ti,settling-time ti,clock-cycles ti,abb_info iommus ti,phy-type #thermal-sensor-cells opp-hz opp-microvolt opp-supported-hw opp-suspend turbo-mode ti,absolute-max-voltage-uv polling-delay-passive polling-delay coefficients thermal-sensors temperature hysteresis trip cooling-device startup-delay-us enable-active-high reset-gpios linux,default-trigger vin-supply default-on power-supply envdd-supply enable-gpios mode-gpios 