Ðþí æ   8 X   (            	Ž                               S    technexion,omap3-thunder technexion,omap3-tao3530 ti,omap3430 ti,omap34xx ti,omap3                                   +         ,   7TI OMAP3 Thunder baseboard with TAO3530 SOM    chosen        aliases          =/ocp@68000000/i2c@48070000           B/ocp@68000000/i2c@48072000           G/ocp@68000000/i2c@48060000           L/ocp@68000000/mmc@4809c000           Q/ocp@68000000/mmc@480b4000           V/ocp@68000000/mmc@480ad000           [/ocp@68000000/serial@4806a000            c/ocp@68000000/serial@4806c000            k/ocp@68000000/serial@49020000         	   s/display          cpus                         +       cpu@0             arm,cortex-a8            |cpu          ˆ             Œ            “cpu          Ÿ “à         ­            Á            Ð            Ü           pmu@54000000              arm,cortex-a8-pmu            ˆT    €           ä            ïdebugss       soc           ti,omap-infra      mpu           ti,omap3-mpu             ïmpu       iva       
    ti,iva2.2            ïiva    dsp           ti,omap3-c64                ocp@68000000              ti,omap3-l3-smx simple-bus           ˆh               ä   	   
                     +             ù         ïl3_main    l4@48000000           ti,omap3-l4-core simple-bus                      +            ù    H         scm@2000              ti,omap3-scm simple-bus          ˆ                             +            ù               pinmux@30              ti,omap3-padconf pinctrl-single          ˆ   0  8                     +                                             5           S  ÿ   hsusbb2-pins          `  p  À     Â     Ä    Æ    È    Ê    ¤    ¦    ¨    ª    ¬    ®        mmc1-pins         P  p                               "    $    &           Ü   ð      mmc2-pins         0  p  (    *    ,    .    0    2           Ü   ô      wlan-gpio-pins          p  ^         uart3-pins          p  n  A   p             Ü   å      i2c3-pins           p  ’    ”           Ü   ì      mcspi1-pins          p  ˜     š      œ    ž             Ü   í      mcspi3-pins          p  ¬     ®    °     ²           Ü   î      mcbsp3-pins          p  <      >     @     B            Ü   ú      twl4030-pins            p  °  A         Ü   æ      dss-dpi-pins          à  p   ¤       ¦       ¨       ª       ¬       ®       °       ²       ´       ¶       ¸       º       ¼       ¾       À       Â       Ä       Æ       È       Ê       Ì       Î       Ð       Ò       Ô       Ö       Ø       Ú             Ü        lte430-pins         p  8            Ü        backlight-pins          p  :            Ü           scm_conf@270              syscon simple-bus            ˆ  p  0                     +            ù      p  0         Ü      pbias_regulator@2b0           ti,pbias-omap3 ti,pbias-omap             ˆ  °           „      pbias_mmc_omap2430          ‹pbias_mmc_omap2430          š w@        ² -ÆÀ         Ü   ï         clocks                       +       clock@68          
    ti,clksel            ˆ   h        Ê                        +       clock-mcbsp5-mux-fck@4           ˆ           Ê              ti,composite-mux-clock          ×mcbsp5_mux_fck           Œ               Ü   
      clock-mcbsp3-mux-fck@0           ˆ            Ê              ti,composite-mux-clock          ×mcbsp3_mux_fck           Œ               Ü         clock-mcbsp4-mux-fck@2           ˆ           Ê              ti,composite-mux-clock          ×mcbsp4_mux_fck           Œ               Ü            mcbsp5_fck          Ê              ti,composite-clock           Œ   	   
         Ü   ü      clock@4       
    ti,clksel            ˆ           Ê                        +       clock-mcbsp1-mux-fck@2           ˆ           Ê              ti,composite-mux-clock          ×mcbsp1_mux_fck           Œ               Ü         clock-mcbsp2-mux-fck@6           ˆ           Ê              ti,composite-mux-clock          ×mcbsp2_mux_fck           Œ               Ü            mcbsp1_fck          Ê              ti,composite-clock           Œ               Ü   ö      mcbsp2_fck          Ê              ti,composite-clock           Œ               Ü   ø      mcbsp3_fck          Ê              ti,composite-clock           Œ               Ü   ù      mcbsp4_fck          Ê              ti,composite-clock           Œ               Ü   û            clockdomains          pinmux@a00             ti,omap3-padconf pinctrl-single          ˆ  
    \                     +                                             5           S  ÿ   twl4030-vpins-pins           p                                    Ü   ç               target-module@480a6000            ti,sysc-omap2 ti,sysc            ˆH
`D   H
`H   H
`L           êrev sysc syss           ô                                         Œ            “ick                      +            ù    H
`           	  disabled       aes1@0            ti,omap3-aes             ˆ       P         ä            #      	      
        (tx rx            target-module@480c5000            ti,sysc-omap2 ti,sysc            ˆHPD   HPH   HPL           êrev sysc syss           ô                                         Œ            “ick                      +            ù    HP           	  disabled       aes2@0            ti,omap3-aes             ˆ       P         ä            #      A      B        (tx rx            prm@48306000              ti,omap3-prm             ˆH0`   @          ä      clocks                       +       virt_16_8m_ck           Ê              fixed-clock         2 Y          Ü         osc_sys_ck@d40          Ê              ti,mux-clock             Œ                           ˆ  @         Ü         sys_ck@1270         Ê              ti,divider-clock             Œ           B           O            ˆ  p         Z         Ü   !      sys_clkout1@d70         Ê              ti,gate-clock            Œ            ˆ  p        B         dpll3_x2_ck         Ê              fixed-factor-clock           Œ           q           |         dpll3_m2x2_ck           Ê              fixed-factor-clock           Œ           q           |            Ü          dpll4_x2_ck         Ê              fixed-factor-clock           Œ           q           |         corex2_fck          Ê              fixed-factor-clock           Œ            q           |            Ü   "      wkup_l4_ick         Ê              fixed-factor-clock           Œ   !        q           |            Ü   a      corex2_d3_fck           Ê              fixed-factor-clock           Œ   "        q           |            Ü   ‰      corex2_d5_fck           Ê              fixed-factor-clock           Œ   "        q           |            Ü   Š         clockdomains             cm@48004000           ti,omap3-cm          ˆH @   @    clocks                       +       dummy_apb_pclk          Ê              fixed-clock         2          omap_32k_fck            Ê              fixed-clock         2  €          Ü   G      virt_12m_ck         Ê              fixed-clock         2 ·          Ü         virt_13m_ck         Ê              fixed-clock         2 Æ]@         Ü         virt_19200000_ck            Ê              fixed-clock         2$ø          Ü         virt_26000000_ck            Ê              fixed-clock         2Œº€         Ü         virt_38_4m_ck           Ê              fixed-clock         2Ið          Ü         dpll4_ck@d00            Ê              ti,omap3-dpll-per-clock          Œ   !   !         ˆ        D  0         Ü         dpll4_m2_ck@d48         Ê              ti,divider-clock             Œ           O   ?         ˆ  H         Z         Ü   #      dpll4_m2x2_mul_ck           Ê              fixed-factor-clock           Œ   #        q           |            Ü   $      dpll4_m2x2_ck@d00           Ê              ti,gate-clock            Œ   $        B            ˆ            †         Ü   %      omap_96m_alwon_fck          Ê              fixed-factor-clock           Œ   %        q           |            Ü   1      dpll3_ck@d00            Ê              ti,omap3-dpll-core-clock             Œ   !   !         ˆ        @  0         Ü         clock@1140        
    ti,clksel            ˆ  @        Ê                        +       clock-dpll3-m3@16            ˆ           Ê              ti,divider-clock            ×dpll3_m3_ck          Œ           O            Z         Ü   +      clock-dpll4-m6@24            ˆ           Ê              ti,divider-clock            ×dpll4_m6_ck          Œ           O   ?         Z         Ü   =      clock-emu-src-mux@0          ˆ            Ê              ti,mux-clock            ×emu_src_mux_ck           Œ   !   &   '   (         Ü   u      clock-pclk-fck@8             ˆ           Ê              ti,divider-clock          	  ×pclk_fck             Œ   )        O            Z      clock-pclkx2-fck@6           ˆ           Ê              ti,divider-clock            ×pclkx2_fck           Œ   )        O            Z      clock-atclk-fck@4            ˆ           Ê              ti,divider-clock          
  ×atclk_fck            Œ   )        O            Z      clock-traceclk-src-fck@2             ˆ           Ê              ti,mux-clock            ×traceclk_src_fck             Œ   !   &   '   (         Ü   *      clock-traceclk-fck@11            ˆ           Ê              ti,divider-clock            ×traceclk_fck             Œ   *        O            Z         dpll3_m3x2_mul_ck           Ê              fixed-factor-clock           Œ   +        q           |            Ü   ,      dpll3_m3x2_ck@d00           Ê              ti,gate-clock            Œ   ,        B            ˆ            †         Ü   -      emu_core_alwon_ck           Ê              fixed-factor-clock           Œ   -        q           |            Ü   &      sys_altclk          Ê              fixed-clock         2             Ü   4      mcbsp_clks          Ê              fixed-clock         2             Ü         core_ck         Ê              fixed-factor-clock           Œ           q           |            Ü   .      dpll1_fck@940           Ê              ti,divider-clock             Œ   .        B           O            ˆ  	@         Z         Ü   /      dpll1_ck@904            Ê              ti,omap3-dpll-clock          Œ   !   /         ˆ  	  	$  	@  	4         Ü         dpll1_x2_ck         Ê              fixed-factor-clock           Œ           q           |            Ü   0      dpll1_x2m2_ck@944           Ê              ti,divider-clock             Œ   0        O            ˆ  	D         Z         Ü   D      cm_96m_fck          Ê              fixed-factor-clock           Œ   1        q           |            Ü   2      clock@d40         
    ti,clksel            ˆ  @        Ê                        +       clock-dpll3-m2@27            ˆ           Ê              ti,divider-clock            ×dpll3_m2_ck          Œ           O            Z         Ü         clock-omap-96m-fck@6             ˆ           Ê              ti,mux-clock            ×omap_96m_fck             Œ   2   !         Ü   X      clock-omap-54m-fck@5             ˆ           Ê              ti,mux-clock            ×omap_54m_fck             Œ   3   4         Ü   @      clock-omap-48m-fck@3             ˆ           Ê              ti,mux-clock            ×omap_48m_fck             Œ   5   4         Ü   8         clock@e40         
    ti,clksel            ˆ  @        Ê                        +       clock-dpll4-m3@8             ˆ           Ê              ti,divider-clock            ×dpll4_m3_ck          Œ           O             Z         Ü   6      clock-dpll4-m4@0             ˆ            Ê              ti,divider-clock            ×dpll4_m4_ck          Œ           O            Z         Ü   9         dpll4_m3x2_mul_ck           Ê              fixed-factor-clock           Œ   6        q           |            Ü   7      dpll4_m3x2_ck@d00           Ê              ti,gate-clock            Œ   7        B            ˆ            †         Ü   3      cm_96m_d2_fck           Ê              fixed-factor-clock           Œ   2        q           |            Ü   5      omap_12m_fck            Ê              fixed-factor-clock           Œ   8        q           |            Ü   Y      dpll4_m4x2_mul_ck           Ê              ti,fixed-factor-clock            Œ   9        œ           ª            ·         Ü   :      dpll4_m4x2_ck@d00           Ê              ti,gate-clock            Œ   :        B            ˆ            †         ·         Ü   ]      dpll4_m5_ck@f40         Ê              ti,divider-clock             Œ           O   ?         ˆ  @         Z         Ü   ;      dpll4_m5x2_mul_ck           Ê              ti,fixed-factor-clock            Œ   ;        œ           ª            ·         Ü   <      dpll4_m5x2_ck@d00           Ê              ti,gate-clock            Œ   <        B            ˆ            †         ·         Ü   y      dpll4_m6x2_mul_ck           Ê              fixed-factor-clock           Œ   =        q           |            Ü   >      dpll4_m6x2_ck@d00           Ê              ti,gate-clock            Œ   >        B            ˆ            †         Ü   ?      emu_per_alwon_ck            Ê              fixed-factor-clock           Œ   ?        q           |            Ü   '      clock@d70         
    ti,clksel            ˆ  p        Ê                        +       clock-clkout2-src-gate@7             ˆ           Ê               ti,composite-no-wait-gate-clock         ×clkout2_src_gate_ck          Œ   .         Ü   B      clock-clkout2-src-mux@0          ˆ            Ê              ti,composite-mux-clock          ×clkout2_src_mux_ck           Œ   .   !   2   @         Ü   C      clock-sys-clkout2@3          ˆ           Ê              ti,divider-clock            ×sys_clkout2          Œ   A        O   @         Ê         clkout2_src_ck          Ê              ti,composite-clock           Œ   B   C         Ü   A      mpu_ck          Ê              fixed-factor-clock           Œ   D        q           |            Ü   E      arm_fck@924         Ê              ti,divider-clock             Œ   E         ˆ  	$        O         emu_mpu_alwon_ck            Ê              fixed-factor-clock           Œ   E        q           |            Ü   (      clock@a40         
    ti,clksel            ˆ  
@        Ê                        +       clock-l3-ick@0           ˆ            Ê              ti,divider-clock            ×l3_ick           Œ   .        O            Z         Ü   F      clock-l4-ick@2           ˆ           Ê              ti,divider-clock            ×l4_ick           Œ   F        O            Z         Ü   H      clock-gpt10-mux-fck@6            ˆ           Ê              ti,composite-mux-clock          ×gpt10_mux_fck            Œ   G   !         Ü   U      clock-gpt11-mux-fck@7            ˆ           Ê              ti,composite-mux-clock          ×gpt11_mux_fck            Œ   G   !         Ü   W      clock-ssi-ssr-div-fck-3430es2@8          ˆ           Ê              ti,composite-divider-clock          ×ssi_ssr_div_fck_3430es2          Œ   "      $  à                                       Ü   ~         clock@c40         
    ti,clksel            ˆ  @        Ê                        +       clock-rm-ick@1           ˆ           Ê              ti,divider-clock            ×rm_ick           Œ   H        O            Z      clock-gpt1-mux-fck@0             ˆ            Ê              ti,composite-mux-clock          ×gpt1_mux_fck             Œ   G   !         Ü   `      clock-usim-mux-fck@3             ˆ           Ê              ti,composite-mux-clock          ×usim_mux_fck          (   Œ   !   I   J   K   L   M   N   O   P   Q         Z         Ü   ‚         clock@a00         
    ti,clksel            ˆ  
         Ê                        +       clock-gpt10-gate-fck@11          ˆ           Ê              ti,composite-gate-clock         ×gpt10_gate_fck           Œ   !         Ü   T      clock-gpt11-gate-fck@12          ˆ           Ê              ti,composite-gate-clock         ×gpt11_gate_fck           Œ   !         Ü   V      clock-mmchs2-fck@25          ˆ           Ê              ti,wait-gate-clock          ×mmchs2_fck           Œ            Ü   ·      clock-mmchs1-fck@24          ˆ           Ê              ti,wait-gate-clock          ×mmchs1_fck           Œ            Ü   ¸      clock-i2c3-fck@17            ˆ           Ê              ti,wait-gate-clock        	  ×i2c3_fck             Œ            Ü   ¹      clock-i2c2-fck@16            ˆ           Ê              ti,wait-gate-clock        	  ×i2c2_fck             Œ            Ü   º      clock-i2c1-fck@15            ˆ           Ê              ti,wait-gate-clock        	  ×i2c1_fck             Œ            Ü   »      clock-mcbsp5-gate-fck@10             ˆ   
        Ê              ti,composite-gate-clock         ×mcbsp5_gate_fck          Œ            Ü   	      clock-mcbsp1-gate-fck@9          ˆ   	        Ê              ti,composite-gate-clock         ×mcbsp1_gate_fck          Œ            Ü         clock-mcspi4-fck@21          ˆ           Ê              ti,wait-gate-clock          ×mcspi4_fck           Œ   R         Ü   ¼      clock-mcspi3-fck@20          ˆ           Ê              ti,wait-gate-clock          ×mcspi3_fck           Œ   R         Ü   ½      clock-mcspi2-fck@19          ˆ           Ê              ti,wait-gate-clock          ×mcspi2_fck           Œ   R         Ü   ¾      clock-mcspi1-fck@18          ˆ           Ê              ti,wait-gate-clock          ×mcspi1_fck           Œ   R         Ü   ¿      clock-uart2-fck@14           ˆ           Ê              ti,wait-gate-clock        
  ×uart2_fck            Œ   R         Ü   À      clock-uart1-fck@13           ˆ           Ê              ti,wait-gate-clock        
  ×uart1_fck            Œ   R         Ü   Á      clock-hdq-fck@22             ˆ           Ê              ti,wait-gate-clock          ×hdq_fck          Œ   S         Ü   Â      clock-modem-fck@31           ˆ           Ê              ti,omap3-interface-clock          
  ×modem_fck            Œ   !         Ü   Þ      clock-mspro-fck@23           ˆ           Ê              ti,wait-gate-clock        
  ×mspro_fck            Œ         clock-ssi-ssr-gate-fck-3430es2@0             ˆ            Ê               ti,composite-no-wait-gate-clock         ×ssi_ssr_gate_fck_3430es2             Œ   "         Ü   }      clock-mmchs3-fck@30          ˆ           Ê              ti,wait-gate-clock          ×mmchs3_fck           Œ            Ü   Ú         gpt10_fck           Ê              ti,composite-clock           Œ   T   U      gpt11_fck           Ê              ti,composite-clock           Œ   V   W      core_96m_fck            Ê              fixed-factor-clock           Œ   X        q           |            Ü         core_48m_fck            Ê              fixed-factor-clock           Œ   8        q           |            Ü   R      core_12m_fck            Ê              fixed-factor-clock           Œ   Y        q           |            Ü   S      core_l3_ick         Ê              fixed-factor-clock           Œ   F        q           |            Ü   Z      clock@a10         
    ti,clksel            ˆ  
        Ê                        +       clock-sdrc-ick@1             ˆ           Ê              ti,wait-gate-clock        	  ×sdrc_ick             Œ   Z         Ü   �      clock-mmchs2-ick@25          ˆ           Ê              ti,omap3-interface-clock            ×mmchs2_ick           Œ   [         Ü   Ã      clock-mmchs1-ick@24          ˆ           Ê              ti,omap3-interface-clock            ×mmchs1_ick           Œ   [         Ü   Ä      clock-hdq-ick@22             ˆ           Ê              ti,omap3-interface-clock            ×hdq_ick          Œ   [         Ü   Å      clock-mcspi4-ick@21          ˆ           Ê              ti,omap3-interface-clock            ×mcspi4_ick           Œ   [         Ü   Æ      clock-mcspi3-ick@20          ˆ           Ê              ti,omap3-interface-clock            ×mcspi3_ick           Œ   [         Ü   Ç      clock-mcspi2-ick@19          ˆ           Ê              ti,omap3-interface-clock            ×mcspi2_ick           Œ   [         Ü   È      clock-mcspi1-ick@18          ˆ           Ê              ti,omap3-interface-clock            ×mcspi1_ick           Œ   [         Ü   É      clock-i2c3-ick@17            ˆ           Ê              ti,omap3-interface-clock          	  ×i2c3_ick             Œ   [         Ü   Ê      clock-i2c2-ick@16            ˆ           Ê              ti,omap3-interface-clock          	  ×i2c2_ick             Œ   [         Ü   Ë      clock-i2c1-ick@15            ˆ           Ê              ti,omap3-interface-clock          	  ×i2c1_ick             Œ   [         Ü   Ì      clock-uart2-ick@14           ˆ           Ê              ti,omap3-interface-clock          
  ×uart2_ick            Œ   [         Ü   Í      clock-uart1-ick@13           ˆ           Ê              ti,omap3-interface-clock          
  ×uart1_ick            Œ   [         Ü   Î      clock-gpt11-ick@12           ˆ           Ê              ti,omap3-interface-clock          
  ×gpt11_ick            Œ   [         Ü   Ï      clock-gpt10-ick@11           ˆ           Ê              ti,omap3-interface-clock          
  ×gpt10_ick            Œ   [         Ü   Ð      clock-mcbsp5-ick@10          ˆ   
        Ê              ti,omap3-interface-clock            ×mcbsp5_ick           Œ   [         Ü   Ñ      clock-mcbsp1-ick@9           ˆ   	        Ê              ti,omap3-interface-clock            ×mcbsp1_ick           Œ   [         Ü   Ò      clock-omapctrl-ick@6             ˆ           Ê              ti,omap3-interface-clock            ×omapctrl_ick             Œ   [         Ü   Ó      clock-aes2-ick@28            ˆ           Ê              ti,omap3-interface-clock          	  ×aes2_ick             Œ   [         Ü         clock-sha12-ick@27           ˆ           Ê              ti,omap3-interface-clock          
  ×sha12_ick            Œ   [         Ü   Ô      clock-icr-ick@29             ˆ           Ê              ti,omap3-interface-clock            ×icr_ick          Œ   [      clock-des2-ick@26            ˆ           Ê              ti,omap3-interface-clock          	  ×des2_ick             Œ   [      clock-mspro-ick@23           ˆ           Ê              ti,omap3-interface-clock          
  ×mspro_ick            Œ   [      clock-mailboxes-ick@7            ˆ           Ê              ti,omap3-interface-clock            ×mailboxes_ick            Œ   [      clock-sad2d-ick@3            ˆ           Ê              ti,omap3-interface-clock          
  ×sad2d_ick            Œ   F         Ü   ß      clock-hsotgusb-ick-3430es2@4             ˆ           Ê          "    ti,omap3-hsotgusb-interface-clock           ×hsotgusb_ick_3430es2             Œ   Z         Ü   Ž      clock-ssi-ick-3430es2@0          ˆ            Ê              ti,omap3-ssi-interface-clock            ×ssi_ick_3430es2          Œ   \         Ü        clock-mmchs3-ick@30          ˆ           Ê              ti,omap3-interface-clock            ×mmchs3_ick           Œ   [         Ü   Ù         gpmc_fck            Ê              fixed-factor-clock           Œ   Z        q           |         core_l4_ick         Ê              fixed-factor-clock           Œ   H        q           |            Ü   [      clock@e00         
    ti,clksel            ˆ           Ê                        +       clock-dss-tv-fck            Ê              ti,gate-clock           ×dss_tv_fck           Œ   @        B            Ü   ²      clock-dss-96m-fck           Ê              ti,gate-clock           ×dss_96m_fck          Œ   X        B            Ü   ³      clock-dss2-alwon-fck            Ê              ti,gate-clock           ×dss2_alwon_fck           Œ   !        B            Ü   ´      clock-dss1-alwon-fck-3430es2@0           ˆ            Ê              ti,dss-gate-clock           ×dss1_alwon_fck_3430es2           Œ   ]         ·         Ü   µ         dummy_ck            Ê              fixed-clock         2          clock@c00         
    ti,clksel            ˆ           Ê                        +       clock-gpt1-gate-fck@0            ˆ            Ê              ti,composite-gate-clock         ×gpt1_gate_fck            Œ   !         Ü   _      clock-gpio1-dbck@3           ˆ           Ê              ti,gate-clock           ×gpio1_dbck           Œ   ^         Ü   ©      clock-wdt2-fck@5             ˆ           Ê              ti,wait-gate-clock        	  ×wdt2_fck             Œ   ^         Ü   ª      clock-sr1-fck@6          ˆ           Ê              ti,wait-gate-clock          ×sr1_fck          Œ   !         Ü  	      clock-sr2-fck@7          ˆ           Ê              ti,wait-gate-clock          ×sr2_fck          Œ   !         Ü        clock-usim-gate-fck@9            ˆ   	        Ê              ti,composite-gate-clock         ×usim_gate_fck            Œ   X         Ü   �         gpt1_fck            Ê              ti,composite-clock           Œ   _   `         Ü   ý      wkup_32k_fck            Ê              fixed-factor-clock           Œ   G        q           |            Ü   ^      clock@c10         
    ti,clksel            ˆ          Ê                        +       clock-wdt2-ick@5             ˆ           Ê              ti,omap3-interface-clock          	  ×wdt2_ick             Œ   a         Ü   «      clock-wdt1-ick@4             ˆ           Ê              ti,omap3-interface-clock          	  ×wdt1_ick             Œ   a         Ü   ¬      clock-gpio1-ick@3            ˆ           Ê              ti,omap3-interface-clock          
  ×gpio1_ick            Œ   a         Ü   ­      clock-omap-32ksync-ick@2             ˆ           Ê              ti,omap3-interface-clock            ×omap_32ksync_ick             Œ   a         Ü   ®      clock-gpt12-ick@1            ˆ           Ê              ti,omap3-interface-clock          
  ×gpt12_ick            Œ   a         Ü   ¯      clock-gpt1-ick@0             ˆ            Ê              ti,omap3-interface-clock          	  ×gpt1_ick             Œ   a         Ü   °      clock-usim-ick@9             ˆ   	        Ê              ti,omap3-interface-clock          	  ×usim_ick             Œ   a         Ü   ±         per_96m_fck         Ê              fixed-factor-clock           Œ   1        q           |            Ü         per_48m_fck         Ê              fixed-factor-clock           Œ   8        q           |            Ü   b      clock@1000        
    ti,clksel            ˆ           Ê                        +       clock-uart3-fck@11           ˆ           Ê              ti,wait-gate-clock        
  ×uart3_fck            Œ   b         Ü   �      clock-gpt2-gate-fck@3            ˆ           Ê              ti,composite-gate-clock         ×gpt2_gate_fck            Œ   !         Ü   d      clock-gpt3-gate-fck@4            ˆ           Ê              ti,composite-gate-clock         ×gpt3_gate_fck            Œ   !         Ü   f      clock-gpt4-gate-fck@5            ˆ           Ê              ti,composite-gate-clock         ×gpt4_gate_fck            Œ   !         Ü   h      clock-gpt5-gate-fck@6            ˆ           Ê              ti,composite-gate-clock         ×gpt5_gate_fck            Œ   !         Ü   j      clock-gpt6-gate-fck@7            ˆ           Ê              ti,composite-gate-clock         ×gpt6_gate_fck            Œ   !         Ü   l      clock-gpt7-gate-fck@8            ˆ           Ê              ti,composite-gate-clock         ×gpt7_gate_fck            Œ   !         Ü   n      clock-gpt8-gate-fck@9            ˆ   	        Ê              ti,composite-gate-clock         ×gpt8_gate_fck            Œ   !         Ü   p      clock-gpt9-gate-fck@10           ˆ   
        Ê              ti,composite-gate-clock         ×gpt9_gate_fck            Œ   !         Ü   r      clock-gpio6-dbck@17          ˆ           Ê              ti,gate-clock           ×gpio6_dbck           Œ   c         Ü   �      clock-gpio5-dbck@16          ˆ           Ê              ti,gate-clock           ×gpio5_dbck           Œ   c         Ü   ‘      clock-gpio4-dbck@15          ˆ           Ê              ti,gate-clock           ×gpio4_dbck           Œ   c         Ü   ’      clock-gpio3-dbck@14          ˆ           Ê              ti,gate-clock           ×gpio3_dbck           Œ   c         Ü   “      clock-gpio2-dbck@13          ˆ           Ê              ti,gate-clock           ×gpio2_dbck           Œ   c         Ü   ”      clock-wdt3-fck@12            ˆ           Ê              ti,wait-gate-clock        	  ×wdt3_fck             Œ   c         Ü   •      clock-mcbsp2-gate-fck@0          ˆ            Ê              ti,composite-gate-clock         ×mcbsp2_gate_fck          Œ            Ü         clock-mcbsp3-gate-fck@1          ˆ           Ê              ti,composite-gate-clock         ×mcbsp3_gate_fck          Œ            Ü         clock-mcbsp4-gate-fck@2          ˆ           Ê              ti,composite-gate-clock         ×mcbsp4_gate_fck          Œ            Ü            clock@1040        
    ti,clksel            ˆ  @        Ê                        +       clock-gpt2-mux-fck@0             ˆ            Ê              ti,composite-mux-clock          ×gpt2_mux_fck             Œ   G   !         Ü   e      clock-gpt3-mux-fck@1             ˆ           Ê              ti,composite-mux-clock          ×gpt3_mux_fck             Œ   G   !         Ü   g      clock-gpt4-mux-fck@2             ˆ           Ê              ti,composite-mux-clock          ×gpt4_mux_fck             Œ   G   !         Ü   i      clock-gpt5-mux-fck@3             ˆ           Ê              ti,composite-mux-clock          ×gpt5_mux_fck             Œ   G   !         Ü   k      clock-gpt6-mux-fck@4             ˆ           Ê              ti,composite-mux-clock          ×gpt6_mux_fck             Œ   G   !         Ü   m      clock-gpt7-mux-fck@5             ˆ           Ê              ti,composite-mux-clock          ×gpt7_mux_fck             Œ   G   !         Ü   o      clock-gpt8-mux-fck@6             ˆ           Ê              ti,composite-mux-clock          ×gpt8_mux_fck             Œ   G   !         Ü   q      clock-gpt9-mux-fck@7             ˆ           Ê              ti,composite-mux-clock          ×gpt9_mux_fck             Œ   G   !         Ü   s         gpt2_fck            Ê              ti,composite-clock           Œ   d   e         Ü   þ      gpt3_fck            Ê              ti,composite-clock           Œ   f   g      gpt4_fck            Ê              ti,composite-clock           Œ   h   i      gpt5_fck            Ê              ti,composite-clock           Œ   j   k      gpt6_fck            Ê              ti,composite-clock           Œ   l   m      gpt7_fck            Ê              ti,composite-clock           Œ   n   o      gpt8_fck            Ê              ti,composite-clock           Œ   p   q      gpt9_fck            Ê              ti,composite-clock           Œ   r   s      per_32k_alwon_fck           Ê              fixed-factor-clock           Œ   G        q           |            Ü   c      per_l4_ick          Ê              fixed-factor-clock           Œ   H        q           |            Ü   t      clock@1010        
    ti,clksel            ˆ          Ê                        +       clock-gpio6-ick@17           ˆ           Ê              ti,omap3-interface-clock          
  ×gpio6_ick            Œ   t         Ü   –      clock-gpio5-ick@16           ˆ           Ê              ti,omap3-interface-clock          
  ×gpio5_ick            Œ   t         Ü   —      clock-gpio4-ick@15           ˆ           Ê              ti,omap3-interface-clock          
  ×gpio4_ick            Œ   t         Ü   ˜      clock-gpio3-ick@14           ˆ           Ê              ti,omap3-interface-clock          
  ×gpio3_ick            Œ   t         Ü   ™      clock-gpio2-ick@13           ˆ           Ê              ti,omap3-interface-clock          
  ×gpio2_ick            Œ   t         Ü   š      clock-wdt3-ick@12            ˆ           Ê              ti,omap3-interface-clock          	  ×wdt3_ick             Œ   t         Ü   ›      clock-uart3-ick@11           ˆ           Ê              ti,omap3-interface-clock          
  ×uart3_ick            Œ   t         Ü   œ      clock-uart4-ick@18           ˆ           Ê              ti,omap3-interface-clock          
  ×uart4_ick            Œ   t         Ü   �      clock-gpt9-ick@10            ˆ   
        Ê              ti,omap3-interface-clock          	  ×gpt9_ick             Œ   t         Ü   ž      clock-gpt8-ick@9             ˆ   	        Ê              ti,omap3-interface-clock          	  ×gpt8_ick             Œ   t         Ü   Ÿ      clock-gpt7-ick@8             ˆ           Ê              ti,omap3-interface-clock          	  ×gpt7_ick             Œ   t         Ü          clock-gpt6-ick@7             ˆ           Ê              ti,omap3-interface-clock          	  ×gpt6_ick             Œ   t         Ü   ¡      clock-gpt5-ick@6             ˆ           Ê              ti,omap3-interface-clock          	  ×gpt5_ick             Œ   t         Ü   ¢      clock-gpt4-ick@5             ˆ           Ê              ti,omap3-interface-clock          	  ×gpt4_ick             Œ   t         Ü   £      clock-gpt3-ick@4             ˆ           Ê              ti,omap3-interface-clock          	  ×gpt3_ick             Œ   t         Ü   ¤      clock-gpt2-ick@3             ˆ           Ê              ti,omap3-interface-clock          	  ×gpt2_ick             Œ   t         Ü   ¥      clock-mcbsp2-ick@0           ˆ            Ê              ti,omap3-interface-clock            ×mcbsp2_ick           Œ   t         Ü   ¦      clock-mcbsp3-ick@1           ˆ           Ê              ti,omap3-interface-clock            ×mcbsp3_ick           Œ   t         Ü   §      clock-mcbsp4-ick@2           ˆ           Ê              ti,omap3-interface-clock            ×mcbsp4_ick           Œ   t         Ü   ¨         emu_src_ck          Ê              ti,clkdm-gate-clock          Œ   u         Ü   )      secure_32k_fck          Ê              fixed-clock         2  €          Ü   v      gpt12_fck           Ê              fixed-factor-clock           Œ   v        q           |            Ü   ÿ      wdt1_fck            Ê              fixed-factor-clock           Œ   v        q           |         security_l4_ick2            Ê              fixed-factor-clock           Œ   H        q           |            Ü   w      clock@a14         
    ti,clksel            ˆ  
        Ê                        +       clock-aes1-ick@3             ˆ           Ê              ti,omap3-interface-clock          	  ×aes1_ick             Œ   w         Ü         clock-rng-ick@2          ˆ           Ê              ti,omap3-interface-clock            ×rng_ick          Œ   w         Ü   ÷      clock-sha11-ick@1            ˆ           Ê              ti,omap3-interface-clock          
  ×sha11_ick            Œ   w      clock-des1-ick@0             ˆ            Ê              ti,omap3-interface-clock          	  ×des1_ick             Œ   w      clock-pka-ick@4          ˆ           Ê              ti,omap3-interface-clock            ×pka_ick          Œ   x         clock@f00         
    ti,clksel            ˆ           Ê                        +       clock-cam-mclk@0             ˆ            Ê              ti,gate-clock         	  ×cam_mclk             Œ   y         ·      clock-csi2-96m-fck@1             ˆ           Ê              ti,gate-clock           ×csi2_96m_fck             Œ            Ü   Ü         cam_ick@f10         Ê          !    ti,omap3-no-wait-interface-clock             Œ   H         ˆ          B             Ü   Û      security_l3_ick         Ê              fixed-factor-clock           Œ   F        q           |            Ü   x      ssi_l4_ick          Ê              fixed-factor-clock           Œ   H        q           |            Ü   \      sr_l4_ick           Ê              fixed-factor-clock           Œ   H        q           |         dpll2_fck@40            Ê              ti,divider-clock             Œ   .        B           O            ˆ   @         Z         Ü   z      dpll2_ck@4          Ê              ti,omap3-dpll-clock          Œ   !   z         ˆ      $   @   4         ì         þ                  Ü   {      dpll2_m2_ck@44          Ê              ti,divider-clock             Œ   {        O            ˆ   D         Z         Ü   |      iva2_ck@0           Ê              ti,wait-gate-clock           Œ   |         ˆ            B             Ü   Ý      clock@a18         
    ti,clksel            ˆ  
        Ê                                    +       clock-mad2d-ick@3            ˆ           Ê              ti,omap3-interface-clock          
  ×mad2d_ick            Œ   F         Ü   à      clock-usbtll-ick@2           ˆ           Ê              ti,omap3-interface-clock            ×usbtll_ick           Œ   [         Ü   Ø         ssi_ssr_fck_3430es2         Ê              ti,composite-clock           Œ   }   ~         Ü         ssi_sst_fck_3430es2         Ê              fixed-factor-clock           Œ           q           |            Ü        sys_d2_ck           Ê              fixed-factor-clock           Œ   !        q           |            Ü   I      omap_96m_d2_fck         Ê              fixed-factor-clock           Œ   X        q           |            Ü   J      omap_96m_d4_fck         Ê              fixed-factor-clock           Œ   X        q           |            Ü   K      omap_96m_d8_fck         Ê              fixed-factor-clock           Œ   X        q           |            Ü   L      omap_96m_d10_fck            Ê              fixed-factor-clock           Œ   X        q           |   
         Ü   M      dpll5_m2_d4_ck          Ê              fixed-factor-clock           Œ   €        q           |            Ü   N      dpll5_m2_d8_ck          Ê              fixed-factor-clock           Œ   €        q           |            Ü   O      dpll5_m2_d16_ck         Ê              fixed-factor-clock           Œ   €        q           |            Ü   P      dpll5_m2_d20_ck         Ê              fixed-factor-clock           Œ   €        q           |            Ü   Q      usim_fck            Ê              ti,composite-clock           Œ   �   ‚      dpll5_ck@d04            Ê              ti,omap3-dpll-clock          Œ   !   !         ˆ    $  L  4         ì         þ         Ü   ƒ      dpll5_m2_ck@d50         Ê              ti,divider-clock             Œ   ƒ        O            ˆ  P         Z         Ü   €      sgx_gate_fck@b00            Ê              ti,composite-gate-clock          Œ   .        B            ˆ            Ü   ‹      core_d3_ck          Ê              fixed-factor-clock           Œ   .        q           |            Ü   „      core_d4_ck          Ê              fixed-factor-clock           Œ   .        q           |            Ü   …      core_d6_ck          Ê              fixed-factor-clock           Œ   .        q           |            Ü   †      omap_192m_alwon_fck         Ê              fixed-factor-clock           Œ   %        q           |            Ü   ‡      core_d2_ck          Ê              fixed-factor-clock           Œ   .        q           |            Ü   ˆ      sgx_mux_fck@b40         Ê              ti,composite-mux-clock            Œ   „   …   †   2   ‡   ˆ   ‰   Š         ˆ  @         Ü   Œ      sgx_fck         Ê              ti,composite-clock           Œ   ‹   Œ         Ü  
      sgx_ick@b10         Ê              ti,wait-gate-clock           Œ   F         ˆ          B             Ü   á      cpefuse_fck@a08         Ê              ti,gate-clock            Œ   !         ˆ  
        B             Ü   Õ      ts_fck@a08          Ê              ti,gate-clock            Œ   G         ˆ  
        B            Ü   Ö      usbtll_fck@a08          Ê              ti,wait-gate-clock           Œ   €         ˆ  
        B            Ü   ×      dss_ick_3430es2@e10         Ê              ti,omap3-dss-interface-clock             Œ   H         ˆ          B             Ü   ¶      usbhost_120m_fck@1400           Ê              ti,gate-clock            Œ   €         ˆ           B            Ü   â      usbhost_48m_fck@1400            Ê              ti,dss-gate-clock            Œ   8         ˆ           B             Ü   ã      usbhost_ick@1410            Ê              ti,omap3-dss-interface-clock             Œ   H         ˆ          B             Ü   ä         clockdomains       core_l3_clkdm             ti,clockdomain           Œ   �   Ž      dpll3_clkdm           ti,clockdomain           Œ         dpll1_clkdm           ti,clockdomain           Œ         per_clkdm             ti,clockdomain        h   Œ   �   �   ‘   ’   “   ”   •   –   —   ˜   ™   š   ›   œ   �   ž   Ÿ       ¡   ¢   £   ¤   ¥   ¦   §   ¨      emu_clkdm             ti,clockdomain           Œ   )      dpll4_clkdm           ti,clockdomain           Œ         wkup_clkdm            ti,clockdomain        $   Œ   ©   ª   «   ¬   ­   ®   ¯   °   ±      dss_clkdm             ti,clockdomain           Œ   ²   ³   ´   µ   ¶      core_l4_clkdm             ti,clockdomain        ”   Œ   ·   ¸   ¹   º   »   ¼   ½   ¾   ¿   À   Á   Â   Ã   Ä   Å   Æ   Ç   È   É   Ê   Ë   Ì   Í   Î   Ï   Ð   Ñ   Ò   Ó      Ô   Õ   Ö   ×   Ø   Ù   Ú      cam_clkdm             ti,clockdomain           Œ   Û   Ü      iva2_clkdm            ti,clockdomain           Œ   Ý      dpll2_clkdm           ti,clockdomain           Œ   {      d2d_clkdm             ti,clockdomain           Œ   Þ   ß   à      dpll5_clkdm           ti,clockdomain           Œ   ƒ      sgx_clkdm             ti,clockdomain           Œ   á      usbhost_clkdm             ti,clockdomain           Œ   â   ã   ä            target-module@48320000            ti,sysc-omap2 ti,sysc            ˆH2     H2          	  êrev sysc                            Œ   ^   ®         “fck ick                      +            ù    H2        counter@0             ti,omap-counter32k           ˆ                 interrupt-controller@48200000             ti,omap3-intc                                 ˆH               Ü         target-module@48056000            ti,sysc-omap2 ti,sysc            ˆH`    H`,   H`(           êrev sysc syss           ô  #        '                                                Œ   Z         “ick                      +            ù    H`       dma-controller@0              ti,omap3430-sdma ti,omap-sdma            ˆ                ä                    5           @            M   `         Ü            gpio@48310000             ti,omap3-gpio            ˆH1              ä            ïgpio1            Z         l        |                              gpio@49050000             ti,omap3-gpio            ˆI              ä            ïgpio2            l        |                              gpio@49052000             ti,omap3-gpio            ˆI              ä            ïgpio3            l        |                              gpio@49054000             ti,omap3-gpio            ˆI@             ä             ïgpio4            l        |                              gpio@49056000             ti,omap3-gpio            ˆI`             ä   !         ïgpio5            l        |                                 Ü        gpio@49058000             ti,omap3-gpio            ˆI€             ä   "         ïgpio6            l        |                                 Ü        serial@4806a000           ti,omap3-uart            ˆH              ˆ      H        #      1      2        (tx rx            ïuart1           2Ül       serial@4806c000           ti,omap3-uart            ˆHÀ            ˆ      I        #      3      4        (tx rx            ïuart2           2Ül       serial@49020000           ti,omap3-uart            ˆI             ˆ      J        #      5      6        (tx rx            ïuart3           2Ül         œdefault         ª   å      i2c@48070000              ti,omap3-i2c             ˆH     €         ä   8                     +             ïi2c1            2 '¬@   twl@48           ˆ   H         ä                         ti,twl4030                               œdefault         ª   æ   ç   audio             ti,twl4030-audio       codec            rtc           ti,twl4030-rtc           ä         bci           ti,twl4030-bci           ä   	           ´   è        Â   é           Îvac       watchdog              ti,twl4030-wdt        regulator-vaux1           ti,twl4030-vaux1          regulator-vaux2           ti,twl4030-vaux2          	  ‹vdd_ehci            š w@        ² w@         ß      regulator-vaux3           ti,twl4030-vaux3          regulator-vaux4           ti,twl4030-vaux4          regulator-vdd1            ti,twl4030-vdd1         š 	'À        ²           Ü         regulator-vdac            ti,twl4030-vdac         š w@        ² w@      regulator-vio             ti,twl4030-vio        regulator-vintana1            ti,twl4030-vintana1       regulator-vintana2            ti,twl4030-vintana2       regulator-vintdig             ti,twl4030-vintdig        regulator-vmmc1           ti,twl4030-vmmc1            š :�        ² 0°         Ü   ñ      regulator-vmmc2           ti,twl4030-vmmc2            š :�        ² 0°      regulator-vusb1v5             ti,twl4030-vusb1v5           Ü   ê      regulator-vusb1v8             ti,twl4030-vusb1v8           Ü   ë      regulator-vusb3v1             ti,twl4030-vusb3v1           Ü   è      regulator-vpll1           ti,twl4030-vpll1          regulator-vpll2           ti,twl4030-vpll2            š w@        ² w@         ß      regulator-vsim            ti,twl4030-vsim         š w@        ² -ÆÀ         Ü   ò      gpio              ti,twl4030-gpio          l        |                                 ó        ÿ           
 ¡Ä         Ü   ó      twl4030-usb           ti,twl4030-usb           ä   
              ê        %   ë        3   è        A           J             Ü        pwm           ti,twl4030-pwm          U         pwmled            ti,twl4030-pwmled           U         pwrbutton             ti,twl4030-pwrbutton             ä         keypad            ti,twl4030-keypad            ä           `           p         madc              ti,twl4030-madc          ä           ƒ            Ü   é            i2c@48072000              ti,omap3-i2c             ˆH     €         ä   9                     +             ïi2c2          i2c@48060000              ti,omap3-i2c             ˆH     €         ä   =                     +             ïi2c3            2 †         œdefault         ª   ì      mailbox@48094000              ti,omap3-mailbox             ïmailbox          ˆH	@             ä           •           ¡           ³      mbox-dsp            Å                    Ð                    spi@48098000              ti,omap2-mcspi           ˆH	€             ä   A                     +             ïmcspi1          Û         @  #      #      $      %      &      '      (      )      *         (tx0 rx0 tx1 rx1 tx2 rx2 tx3 rx3         œdefault         ª   í      spi@4809a000              ti,omap2-mcspi           ˆH	              ä   B                     +             ïmcspi2          Û            #      +      ,      -      .        (tx0 rx0 tx1 rx1       spi@480b8000              ti,omap2-mcspi           ˆH€             ä   [                     +             ïmcspi3          Û            #                                (tx0 rx0 tx1 rx1         œdefault         ª   î      spi@480ba000              ti,omap2-mcspi           ˆH              ä   0                     +             ïmcspi4          Û           #      F      G        (tx0 rx0       1w@480b2000           ti,omap3-1w          ˆH              ä   :         ïhdq1w         mmc@4809c000              ti,omap3-hsmmc           ˆH	À             ä   S         ïmmc1             é        #      =      >        (tx rx           ö   ï        œdefault         ª   ð           ñ           ò           ó               %         mmc@480b4000              ti,omap3-hsmmc           ˆH@             ä   V         ïmmc2            #      /      0        (tx rx           œdefault         ª   ô           õ         /        %            =      mmc@480ad000              ti,omap3-hsmmc           ˆH
Ð             ä   ^         ïmmc3            #      M      N        (tx rx         	  disabled          mmu@480bd400            P              ti,omap2-iommu           ˆHÔ    €         ä            ïmmu_isp         ]            Ü        mmu@5d000000            P              ti,omap2-iommu           ˆ]      €         ä            ïmmu_iva       	  disabled          wdt@48314000              ti,omap3-wdt             ˆH1@    €      
   ïwd_timer2         mcbsp@48074000            ti,omap3-mcbsp           ˆH@    ÿ        êmpu          ä      ;   <        mcommon tx rx            }   €         ïmcbsp1          #                     (tx rx            Œ   ö         “fck       	  disabled          target-module@480a0000            ti,sysc-omap2 ti,sysc            ˆH
 <   H
 @   H
 D           êrev sysc syss           ô                                      Œ   ÷         “ick                      +            ù    H
         rng@0             ti,omap2-rng             ˆ                 ä   4         mcbsp@49022000            ti,omap3-mcbsp           ˆI     ÿI€    ÿ        êmpu sidetone             ä      >   ?           mcommon tx rx sidetone           }            ïmcbsp2 mcbsp2_sidetone          #      !      "        (tx rx            Œ   ø   ¦         “fck ick         okay             Ü        mcbsp@49024000            ti,omap3-mcbsp           ˆI@    ÿI     ÿ        êmpu sidetone             ä      Y   Z           mcommon tx rx sidetone           }   €         ïmcbsp3 mcbsp3_sidetone          #                    (tx rx            Œ   ù   §         “fck ick         okay            œdefault         ª   ú      mcbsp@49026000            ti,omap3-mcbsp           ˆI`    ÿ        êmpu          ä      6   7        mcommon tx rx            }   €         ïmcbsp4          #                    (tx rx            Œ   û         “fck         Œ          	  disabled          mcbsp@48096000            ti,omap3-mcbsp           ˆH	`    ÿ        êmpu          ä      Q   R        mcommon tx rx            }   €         ïmcbsp5          #                    (tx rx            Œ   ü         “fck       	  disabled          sham@480c3000             ti,omap3-sham            ïsham             ˆH0    d         ä   1        #      E        (rx        	  disabled          target-module@48318000            ti,sysc-omap2-timer ti,sysc          ˆH1€    H1€   H1€           êrev sysc syss           ô  '                                      Œ   ý   °         “fck ick                      +            ù    H1€             �         ±   timer@0           ti,omap3430-timer            ˆ       €         Œ   ý         “fck          ä   %         ¼        Ë   ý        Û   G         target-module@49032000            ti,sysc-omap2-timer ti,sysc          ˆI     I    I            êrev sysc syss           ô  '                                      Œ   þ   ¥         “fck ick                      +            ù    I        timer@0           ti,omap3430-timer            ˆ                ä   &         timer@49034000            ti,omap3430-timer            ˆI@             ä   '         ïtimer3        timer@49036000            ti,omap3430-timer            ˆI`             ä   (         ïtimer4        timer@49038000            ti,omap3430-timer            ˆI€             ä   )         ïtimer5           ò      timer@4903a000            ti,omap3430-timer            ˆI              ä   *         ïtimer6           ò      timer@4903c000            ti,omap3430-timer            ˆIÀ             ä   +         ïtimer7           ò      timer@4903e000            ti,omap3430-timer            ˆIà             ä   ,         ïtimer8           ÿ         ò      timer@49040000            ti,omap3430-timer            ˆI              ä   -         ïtimer9           ÿ      timer@48086000            ti,omap3430-timer            ˆH`             ä   .         ïtimer10          ÿ      timer@48088000            ti,omap3430-timer            ˆH€             ä   /         ïtimer11          ÿ      target-module@48304000            ti,sysc-omap2-timer ti,sysc          ˆH0@    H0@   H0@           êrev sysc syss           ô  '                                      Œ   ÿ   ¯         “fck ick                      +            ù    H0@       timer@0           ti,omap3430-timer            ˆ                ä   _         ¼                  usbhstll@48062000             ti,usbhs-tll             ˆH              ä   N         ïusb_tll_hs        usbhshost@48064000            ti,usbhs-host            ˆH@             ïusb_host_hs                      +             ù      	  ehci-phy       ohci@48064400             ti,ohci-omap3            ˆHD             ä   L         '      ehci@48064800             ti,ehci-omap             ˆHH             ä   M        ?                gpmc@6e000000             ti,omap3430-gpmc             ïgpmc             ˆn     Ð         ä           #              (rxtx            D           P                        +                                 l        |            ù        0               Ü     nand@0,0              ti,omap2-nand            ˆ                               ä                       b           q           ƒsw          “            ¡   $        ³   $        Å           Ô           ç   $        ú              0                   %           4   H        E   H        V   6        e                        +      x-loader@0        	  wX-Loader             ˆ             bootloaders@80000           wU-Boot           ˆ            bootloaders_env@260000          wU-Boot Env           ˆ &           kernel@280000           wKernel           ˆ (   @        filesystem@680000           wFile System          ˆ h  ˜              target-module@480ab000            ti,sysc-omap2 ti,sysc            ˆH
´    H
´   H
´           êrev sysc syss           ô           '                                                “fck                      +            ù    H
°             Œ   Ž   usb@0             ti,omap3-musb            ˆ                ä   \   ]        mmc dma          }           ˆ           �           ™            ¨          ?        	  °usb2-phy            E           º   2         dss@48050000              ti,omap3-dss             ˆH             okay          	   ïdss_core             Œ   µ         “fck                      +             ù        œdefault         ª     dispc@48050400            ti,omap3-dispc           ˆH             ä         
   ïdss_dispc            Œ   µ         “fck       encoder@4804fc00              ti,omap3-dsi             ˆHü    Hþ    @Hÿ             êproto phy pll            ä         	  disabled          	   ïdss_dsi1             Œ   µ   ´         “fck sys_clk                      +          encoder@48050800              ti,omap3-rfbi            ˆH          	  disabled          	   ïdss_rfbi             Œ   µ   ¶         “fck ick       encoder@48050c00              ti,omap3-venc            ˆH          	  disabled          	   ïdss_venc             Œ   ²         “fck       port       endpoint            À          Ð            Ü              ssi-controller@48058000           ti,omap3-ssi             ïssi         okay             ˆH€    H�            êsys gdd          ä   G        mgdd_mpu                      +             ù         Œ                 “ssi_ssr_fck ssi_sst_fck ssi_ick    ssi-port@4805a000             ti,omap3-ssi-port            ˆH     H¨            êtx rx            ä   C   D      ssi-port@4805b000             ti,omap3-ssi-port            ˆH°    H¸            êtx rx            ä   E   F         pinmux@480025d8            ti,omap3-padconf pinctrl-single          ˆH %Ø   $                     +                                             5           S  ÿ      isp@480bc000              ti,omap3-isp             ˆHÀ   üHØ   |         ä           Û          „      l        â            Ê      ports                        +             bandgap@48002524             ˆH %$             ti,omap34xx-bandgap         î             Ü        target-module@480cb000            ti,sysc-omap3430-sr ti,sysc          ïsmartreflex_core             ˆH°$           êsysc            ô            Œ           “fck                      +            ù    H°       smartreflex@0             ti,omap3-smartreflex-core            ˆ                ä            target-module@480c9000            ti,sysc-omap3430-sr ti,sysc          ïsmartreflex_mpu_iva          ˆH�$           êsysc            ô            Œ  	         “fck                      +            ù    H�       smartreflex@480c9000              ti,omap3-smartreflex-mpu-iva             ˆ                ä            target-module@50000000            ti,sysc-omap2 ti,sysc            ˆP             êrev          Œ  
   á         “fck ick                      +            ù    P         gpu@0         #    ti,omap3430-gpu img,powervr-sgx530           ˆ                ä               opp-table             operating-points-v2-ti-cpu          „            Ü      opp-125000000               sY@         à˜ à˜ à˜        ÿÿÿÿ         opp-250000000               æ²€         g8 g8 g8        ÿÿÿÿ            *      opp-500000000               Íe          O€ O€ O€        ÿÿÿÿ         opp-550000000                ÈU€         tx tx tx        ÿÿÿÿ         opp-600000000               #ÃF          ™p ™p ™p        ÿÿÿÿ         opp-720000000               *êT          ™p ™p ™p        ÿÿÿÿ            6         thermal-zones      cpu-thermal         A   ú        W  è        e      N         r     trips      cpu_alert           ‚ 8€        Ž  Ð         ƒpassive          Ü        cpu_crit            ‚ _�        Ž  Ð      	   ƒcritical             cooling-maps       map0            ™          ž  ÿÿÿÿÿÿÿÿ               memory@80000000          |memory           ˆ€            hsusb2_power_reg              regulator-fixed         ‹hsusb2_vbus         š 2Z         ² 2Z         ­   ó               ² p         Ü        hsusb2-phy-pins           usb-nop-xceiv           Ã                Ï          J             Ü         sound             ti,omap-twl4030         Úomap3beagle         ã        regulator-mmc2-sdio-poweron           regulator-fixed         ‹regulator-mmc2-sdio-poweron         š 0°        ² 0°        ­                ²  '         Ü   õ      display           samsung,lte430wq-f0c panel-dpi          wlcd         œdefault         ª          ì     
      port       endpoint            À           Ü           panel-timing            2 ‰T@        ù  à        	          		           	           	"   *        	,           	8           	E           	O            	\            	i           	s            backlight             gpio-backlight          œdefault         ª                            	ƒ         	compatible interrupt-parent #address-cells #size-cells model i2c0 i2c1 i2c2 mmc0 mmc1 mmc2 serial0 serial1 serial2 display0 device_type reg clocks clock-names clock-latency operating-points-v2 #cooling-cells cpu0-supply phandle interrupts ti,hwmods ranges #pinctrl-cells #interrupt-cells interrupt-controller pinctrl-single,register-width pinctrl-single,function-mask pinctrl-single,pins syscon regulator-name regulator-min-microvolt regulator-max-microvolt #clock-cells clock-output-names reg-names ti,sysc-mask ti,sysc-sidle ti,syss-mask status dmas dma-names clock-frequency ti,bit-shift ti,max-div ti,index-starts-at-one clock-mult clock-div ti,set-bit-to-disable ti,clock-mult ti,clock-div ti,set-rate-parent ti,index-power-of-two ti,dividers ti,low-power-stop ti,lock ti,low-power-bypass #ssize-cells ti,sysc-midle #dma-cells dma-channels dma-requests ti,gpio-always-on gpio-controller #gpio-cells interrupts-extended pinctrl-names pinctrl-0 bci3v1-supply io-channels io-channel-names regulator-always-on ti,use-leds ti,pullups ti,pulldowns usb1v5-supply usb1v8-supply usb3v1-supply usb_mode #phy-cells #pwm-cells keypad,num-rows keypad,num-columns #io-channel-cells #mbox-cells ti,mbox-num-users ti,mbox-num-fifos ti,mbox-tx ti,mbox-rx ti,spi-num-cs ti,dual-volt pbias-supply vmmc-supply vqmmc-supply cd-gpios bus-width non-removable cap-power-off-card #iommu-cells ti,#tlb-entries interrupt-names ti,buffer-size #sound-dai-cells ti,no-reset-on-init ti,no-idle ti,timer-alwon assigned-clocks assigned-clock-parents ti,timer-dsp ti,timer-pwm ti,timer-secure port2-mode remote-wakeup-connected phys gpmc,num-cs gpmc,num-waitpins nand-bus-width gpmc,device-width ti,nand-ecc-opt gpmc,cs-on-ns gpmc,cs-rd-off-ns gpmc,cs-wr-off-ns gpmc,adv-on-ns gpmc,adv-rd-off-ns gpmc,adv-wr-off-ns gpmc,oe-on-ns gpmc,oe-off-ns gpmc,we-on-ns gpmc,we-off-ns gpmc,rd-cycle-ns gpmc,wr-cycle-ns gpmc,access-ns gpmc,wr-access-ns label multipoint num-eps ram-bits interface-type usb-phy phy-names power remote-endpoint data-lines iommus ti,phy-type #thermal-sensor-cells opp-hz opp-microvolt opp-supported-hw opp-suspend turbo-mode polling-delay-passive polling-delay coefficients thermal-sensors temperature hysteresis trip cooling-device gpio startup-delay-us reset-gpios vcc-supply ti,model ti,mcbsp enable-gpios hactive vactive hfront-porch hback-porch hsync-len vback-porch vfront-porch vsync-len hsync-active vsync-active de-active pixelclk-active default-on 