Ðþí  ®ü   8  ¥ˆ   (            	t  ¥P                             :    engicam,px30-core-ctouch2 engicam,px30-core rockchip,px30                                    +            7Engicam PX30.Core C.TOUCH 2.0      aliases          =/i2c@ff180000            B/i2c@ff190000            G/i2c@ff1a0000            L/i2c@ff1b0000            Q/serial@ff030000             Y/serial@ff158000             a/serial@ff160000             i/serial@ff168000             q/serial@ff170000             y/serial@ff178000             �/spi@ff1d0000            †/spi@ff1d8000            ‹/ethernet@ff360000           •/mmc@ff370000            š/mmc@ff380000            Ÿ/mmc@ff390000         cpus                         +       cpu@0            ¤cpu           arm,cortex-a35           °                 ´psci             Â               É            Ø               è   Z                              !         cpu@1            ¤cpu           arm,cortex-a35           °                ´psci             Â               É            Ø               è   Z                              !         cpu@2            ¤cpu           arm,cortex-a35           °                ´psci             Â               É            Ø               è   Z                              !   	      cpu@3            ¤cpu           arm,cortex-a35           °                ´psci             Â               É            Ø               è   Z                              !   
      idle-states         )psci       cpu-sleep             arm,idle-state           6        G           ^   x        o   ú          „        !         cluster-sleep             arm,idle-state           6        G          ^  �        o  ô          Ð        !               opp-table-0           operating-points-v2          �        !      opp-600000000           ›    #ÃF         ¢ ~ð ~ð ™p        °  œ@         Á      opp-816000000           ›    0£,         ¢ � � ™p        °  œ@      opp-1008000000          ›    <Ü         ¢ íØ íØ ™p        °  œ@      opp-1200000000          ›    G†Œ         ¢ Ö  Ö  ™p        °  œ@      opp-1296000000          ›    M?d         ¢ ™p ™p ™p        °  œ@         arm-pmu           arm,cortex-a35-pmu        0  Í       d          e          f          g           Ø         	   
      display-subsystem             rockchip,display-subsystem          ë            	  ñdisabled          external-gmac-clock           fixed-clock         øúð€        gmac_clkin                    psci              arm,psci-1.0             »smc       timer             arm,armv8-timer       0  Í                              
        thermal-zones      soc-thermal         (           >  è        L  î        ^          trips      trip-point-0            n p        z  Ð         «passive       trip-point-1            n L        z  Ð         «passive         !         soc-crit            n Á8        z  Ð      	   «critical             cooling-maps       map0            …           Š   ÿÿÿÿÿÿÿÿ        ™               gpu-thermal         (   d        >  è        ^         trips      gpu-threshold           n p        z  Ð         «passive       gpu-target          n L        z  Ð         «passive         !         gpu-crit            n Á8        z  Ð      	   «critical             cooling-maps       map0            …           Š   ÿÿÿÿÿÿÿÿ               xin24m            fixed-clock                     øn6         xin24m          !   l      power-management@ff000000         $    rockchip,px30-pmu syscon simple-mfd          °    ÿ             power-controller              rockchip,px30-power-controller          ¦                        +            !   n   power-domain@5           °            Â                <        º              ¦          power-domain@7           °            Â      ÷      ;        º           ¦          power-domain@9           °   	          Â      ²     C      @      ?        º           ¦          power-domain@10          °   
      @   Â      þ            ÿ           9      7      8      :        º                    ¦          power-domain@11          °            Â      ¯      ô      K        º              ¦          power-domain@12          °         X   Â      ·      µ      ¶      –      —      ý      û      ü     D      5      6        º                    ¦          power-domain@13          °         (   Â      ³      ´      ù      ú      3        º          !   "   #        ¦          power-domain@14          °            Â      I        º   $        ¦                syscon@ff010000       '    rockchip,px30-pmugrf syscon simple-mfd           °    ÿ                              +           !   –   io-domains        $    rockchip,px30-pmu-io-voltage-domain         ñokay            Á   %        Ï   %      reboot-mode           syscon-reboot-mode          Ý           äRBÃ        ôRBÃ	        RBÃ        RBÃ         RBÃ         serial@ff030000       $    rockchip,px30-uart snps,dw-apb-uart          °    ÿ                 Í                   Â   &      &           (baudclk apb_pclk            4   '       '           9tx rx           C           M           Zdefault         h   (   )   *      	  ñdisabled          i2s@ff060000              rockchip,px30-i2s-tdm            °    ÿ                 Í                   Â                         (mclk_tx mclk_rx hclk            4   '      '           9tx rx           r   +              „      ¿      
  †tx-m rx-m           Zdefault       0  h   ,   -   .   /   0   1   2   3   4   5   6   7        ’          	  ñdisabled          i2s@ff070000          &    rockchip,px30-i2s rockchip,rk3066-i2s            °    ÿ                 Í                   Â                   (i2s_clk i2s_hclk            4   '      '           9tx rx           Zdefault         h   8   9   :   ;        ’          	  ñdisabled          i2s@ff080000          &    rockchip,px30-i2s rockchip,rk3066-i2s            °    ÿ                 Í                   Â                   (i2s_clk i2s_hclk            4   '      '           9tx rx           Zdefault         h   <   =   >   ?        ’          	  ñdisabled          interrupt-controller@ff131000             arm,gic-400         £                         ´      @   °    ÿ            ÿ              ÿ@             ÿ`                 Í      	          !         syscon@ff140000       $    rockchip,px30-grf syscon simple-mfd          °    ÿ                              +           !   +   io-domains             rockchip,px30-io-voltage-domain         ñokay            É   %        ×   %        å   %        ó   %           %           @      lvds              rockchip,px30-lvds             A        "dphy            r   +        ,lvds          	  ñdisabled       ports                        +       port@0           °                         +       endpoint@0           °            <   B        !   �      endpoint@1           °           <   C        !   “         port@1           °                  serial@ff158000       $    rockchip,px30-uart snps,dw-apb-uart          °    ÿ€                Í                   Â           I        (baudclk apb_pclk            4   '      '           9tx rx           C           M           Zdefault         h   D   E   F      	  ñdisabled          serial@ff160000       $    rockchip,px30-uart snps,dw-apb-uart          °    ÿ                 Í                   Â           J        (baudclk apb_pclk            4   '      '           9tx rx           C           M           Zdefault         h   G        ñokay          serial@ff168000       $    rockchip,px30-uart snps,dw-apb-uart          °    ÿ€                Í                   Â           K        (baudclk apb_pclk            4   '      '           9tx rx           C           M           Zdefault         h   H   I   J      	  ñdisabled          serial@ff170000       $    rockchip,px30-uart snps,dw-apb-uart          °    ÿ                 Í                   Â           L        (baudclk apb_pclk            4   '      '   	        9tx rx           C           M           Zdefault         h   K   L   M      	  ñdisabled          serial@ff178000       $    rockchip,px30-uart snps,dw-apb-uart          °    ÿ€                Í                   Â           M        (baudclk apb_pclk            4   '   
   '           9tx rx           C           M           Zdefault         h   N   O   P      	  ñdisabled          i2c@ff180000          &    rockchip,px30-i2c rockchip,rk3399-i2c            °    ÿ                  Â           N      	  (i2c pclk            Í                  Zdefault         h   Q                     +            ñokay       pmic@20           rockchip,rk809           °                R        Í              Zdefault         h   S         L         m                   rk808-clkout1 rk808-clkout2         {   T        ‡   T        “   T        Ÿ   T        «   U        ·   U        Ã   U        Ï   U        Û   T   regulators     DCDC_REG1           çvdd_log          ö         
         ~ð        4 ™p        L  q   regulator-state-mem          a        y ~ð         DCDC_REG2           çvdd_arm          ö         
         ~ð        4 ™p        L  q        !      regulator-state-mem          •        y ~ð         DCDC_REG3           çvcc_ddr          ö         
   regulator-state-mem          a         DCDC_REG4           çvcc_3v3          ö         
         2Z         4 2Z         !   %   regulator-state-mem          a        y 2Z          DCDC_REG5           çvcc3v3_sys           ö         
         2Z         4 2Z         !   U   regulator-state-mem          a        y 2Z          LDO_REG1            çvcc_1v0          ö         
         B@        4 B@   regulator-state-mem          a        y B@         LDO_REG2            çvcc_1v8          ö         
         w@        4 w@        !   @   regulator-state-mem          a        y w@         LDO_REG3            çvdd_1v0          ö         
         B@        4 B@   regulator-state-mem          a        y B@         LDO_REG4            çvcc3v0_pmu           ö         
         2Z         4 2Z    regulator-state-mem          a        y 2Z          LDO_REG5          	  çvccio_sd             ö         
         w@        4 2Z    regulator-state-mem          a        y 2Z          SWITCH_REG1          
        çvcc3v3_lcd        SWITCH_REG2         çvcc5v0_host          ö         
               i2c@ff190000          &    rockchip,px30-i2c rockchip,rk3399-i2c            °    ÿ                  Â           O      	  (i2c pclk            Í                  Zdefault         h   V                     +          	  ñdisabled          i2c@ff1a0000          &    rockchip,px30-i2c rockchip,rk3399-i2c            °    ÿ                  Â           P      	  (i2c pclk            Í       	           Zdefault         h   W                     +          	  ñdisabled          i2c@ff1b0000          &    rockchip,px30-i2c rockchip,rk3399-i2c            °    ÿ                  Â            Q      	  (i2c pclk            Í       
           Zdefault         h   X                     +          	  ñdisabled          spi@ff1d0000          &    rockchip,px30-spi rockchip,rk3066-spi            °    ÿ                 Í                   Â      $     U        (spiclk apb_pclk         4   '      '           9tx rx           ®           Zdefault         h   Y   Z   [   \                     +          	  ñdisabled          spi@ff1d8000          &    rockchip,px30-spi rockchip,rk3066-spi            °    ÿ€                Í                   Â      %     V        (spiclk apb_pclk         4   '      '           9tx rx           ®           Zdefault         h   ]   ^   _   `   a                     +          	  ñdisabled          watchdog@ff1e0000             rockchip,px30-wdt snps,dw-wdt            °    ÿ                  Â     [        Í       %         	  ñdisabled          pwm@ff200000          &    rockchip,px30-pwm rockchip,rk3328-pwm            °    ÿ                   Â      "     S      	  (pwm pclk            Zdefault         h   b        µ           ñokay          pwm@ff200010          &    rockchip,px30-pwm rockchip,rk3328-pwm            °    ÿ                  Â      "     S      	  (pwm pclk            Zdefault         h   c        µ         	  ñdisabled          pwm@ff200020          &    rockchip,px30-pwm rockchip,rk3328-pwm            °    ÿ                   Â      "     S      	  (pwm pclk            Zdefault         h   d        µ         	  ñdisabled          pwm@ff200030          &    rockchip,px30-pwm rockchip,rk3328-pwm            °    ÿ  0                Â      "     S      	  (pwm pclk            Zdefault         h   e        µ         	  ñdisabled          pwm@ff208000          &    rockchip,px30-pwm rockchip,rk3328-pwm            °    ÿ €                 Â      #     T      	  (pwm pclk            Zdefault         h   f        µ         	  ñdisabled          pwm@ff208010          &    rockchip,px30-pwm rockchip,rk3328-pwm            °    ÿ €                Â      #     T      	  (pwm pclk            Zdefault         h   g        µ         	  ñdisabled          pwm@ff208020          &    rockchip,px30-pwm rockchip,rk3328-pwm            °    ÿ €                 Â      #     T      	  (pwm pclk            Zdefault         h   h        µ         	  ñdisabled          pwm@ff208030          &    rockchip,px30-pwm rockchip,rk3328-pwm            °    ÿ €0                Â      #     T      	  (pwm pclk            Zdefault         h   i        µ         	  ñdisabled          timer@ff210000        *    rockchip,px30-timer rockchip,rk3288-timer            °    ÿ!                 Í                   Â     Y      &        (pclk timer        dma-controller@ff240000           arm,pl330 arm,primecell          °    ÿ$        @         Í                             À         Â      »      	  (apb_pclk            ×           !   '      tsadc@ff280000            rockchip,px30-tsadc          °    ÿ(                 Í       $           â      ,        ò  ÃP         Â      ,     X        (tsadc apb_pclk                ¨      
  †tsadc-apb           r   +         ÔÀ        Zinit default sleep          h   j           k        (   j        2           ñokay            H           _           !         saradc@ff288000       ,    rockchip,px30-saradc rockchip,rk3399-saradc          °    ÿ(€                Í       T           z            Â      -     W        (saradc apb_pclk               ¥        †saradc-apb        	  ñdisabled          nvmem@ff290000            rockchip,px30-otp            °    ÿ)        @          Â      /     Z     a        (otp apb_pclk phy                  ´        †phy                      +      id@7             °            cpu-leakage@17           °            performance@1e           °              Œ               clock-controller@ff2b0000             rockchip,px30-cru            °    ÿ+                  Â   l   &           (xin24m gpll         r   +                   ‘         8  â            «      °      ð      õ     @      I        òFÏq ëÂ ëÂ ðÑ€ðÑ€õá ëÂ         !         clock-controller@ff2bc000             rockchip,px30-pmucru             °    ÿ+À                 Â   l        (xin24m          r   +                   ‘           â   &      &      &           òG†Œ õá Œº€        !   &      syscon@ff2c0000       ,    rockchip,px30-usb2phy-grf syscon simple-mfd          °    ÿ,                              +      usb2phy@100           rockchip,px30-usb2phy            °                Â   &   
        (phyclk                      â              ž   m        usb480m_phy         ñokay            !   m   host-port           µ            Í       D         
  Àlinestate           ñokay            !   p      otg-port            µ          $  Í       B          A          @           Àotg-bvalid otg-id linestate         ñokay            !   o            phy@ff2e0000              rockchip,px30-dsi-dphy           °    ÿ.                  Â   &        E      	  (ref pclk                  >        †apb         µ            Ð   n         	  ñdisabled            !   A      phy@ff2f0000              rockchip,px30-csi-dphy           °    ÿ/        @          Â     F        (pclk            µ            Ð   n                 /        †apb         r   +      	  ñdisabled            !   •      usb@ff300000          0    rockchip,px30-usb rockchip,rk3066-usb snps,dwc2          °    ÿ0                 Í       >            Â             (otg         Þotg         æ           ø                €   €   @                  o      	  "usb2-phy            Ð   n           ñokay          usb@ff340000              generic-ehci             °    ÿ4                 Í       <            Â                p        "usb         Ð   n           ñokay          usb@ff350000              generic-ohci             °    ÿ5                 Í       =            Â                p        "usb         Ð   n           ñokay          ethernet@ff360000             rockchip,px30-gmac           °    ÿ6                 Í       +           Àmacirq        @   Â      >      ?      ?      @      A      ²     C      L      [  (stmmaceth mac_clk_rx mac_clk_tx clk_mac_ref clk_mac_refout aclk_mac pclk_mac clk_mac_speed          r   +        rmii            Zdefault         h   q   r        Ð   n   	              ^      
  †stmmaceth           ñokay            output          ,   %         7        M      ÃP  ÃP        b   s             mmc@ff370000          .    rockchip,px30-dw-mshc rockchip,rk3288-dw-mshc            °    ÿ7        @         Í       6             Â      ÷      ;      C      D        (biu ciu ciu-drive ciu-sample            r           |           ‡ðÑ€        Zdefault         h   t   u   v   w        Ð   n           ñokay             •        ¦           ¸   %        Ä   %      mmc@ff380000          .    rockchip,px30-dw-mshc rockchip,rk3288-dw-mshc            °    ÿ8        @         Í       7             Â      ÿ      8      E      F        (biu ciu ciu-drive ciu-sample            r           |           ‡ðÑ€        Zdefault         h   x   y   z        Ð   n   
        ñokay                         +            øúð€         Ñ         •         Þ        ô   {         ÿ            wifi@1            brcm,bcm4329-fmac            °            mmc@ff390000          .    rockchip,px30-dw-mshc rockchip,rk3288-dw-mshc            °    ÿ9        @         Í       5             Â            9      G      H        (biu ciu ciu-drive ciu-sample            r           |           ‡ðÑ€        Zdefault         h   |   }   ~        Ð   n   
        ñokay                      -         ÿ      spi@ff3a0000              rockchip,sfc             °    ÿ:        @         Í       8            Â      :             (clk_sfc hclk_sfc            h      €   �        Zdefault         Ð   n   
      	  ñdisabled          nand-controller@ff3b0000              rockchip,px30-nfc            °    ÿ;        @         Í       9            Â      þ      7        (ahb nfc         â      7        òðÑ€        Zdefault          h   ‚   ƒ   „   …   †   ‡   ˆ   ‰        Ð   n   
      	  ñdisabled          opp-table-1           operating-points-v2         !   Š   opp-200000000           ›    ëÂ         ¢ ~ð      opp-300000000           ›    á£         ¢ à˜      opp-400000000           ›    ×„         ¢ �      opp-480000000           ›    œ8         ¢ *ˆ         gpu@ff400000          $    rockchip,px30-mali arm,mali-bifrost          °    ÿ@        @       $  Í       /          .          -           Àjob mmu gpu          Â      I         É           Ð   n              Š      	  ñdisabled            !         video-codec@ff442000              rockchip,px30-vpu            °    ÿD                 Í       P          O         
  Àvepu vdpu            Â      ¯      ô      
  (aclk hclk           <   ‹        Ð   n         iommu@ff442800            rockchip,iommu           °    ÿD(                Í       Q            Â      ¯      ô        (aclk iface          C            Ð   n           !   ‹      dsi@ff450000          (    rockchip,px30-mipi-dsi snps,dw-mipi-dsi          °    ÿE                 Í       K            Â     D        (pclk               A        "dphy            Ð   n                 =        †apb         r   +                     +          	  ñdisabled       ports                        +       port@0           °                         +       endpoint@0           °            <   Œ        !   �      endpoint@1           °           <   �        !   ’         port@1           °               vop@ff460000              rockchip,px30-vop-big            °    ÿF        ü        Í       M            Â      µ      –      û        (aclk_vop dclk_vop hclk_vop                3      4      5        †axi ahb dclk            <   Ž        Ð   n         	  ñdisabled       port                         +            !      endpoint@0           °            <   �        !   Œ      endpoint@1           °           <   �        !   B            iommu@ff460f00            rockchip,iommu           °    ÿF                Í       M            Â      µ      û        (aclk iface          Ð   n           C          	  ñdisabled            !   Ž      vop@ff470000              rockchip,px30-vop-lit            °    ÿG        ü        Í       N            Â      ¶      —      ü        (aclk_vop dclk_vop hclk_vop                7      8      9        †axi ahb dclk            <   ‘        Ð   n         	  ñdisabled       port                         +            !      endpoint@0           °            <   ’        !   �      endpoint@1           °           <   “        !   C            iommu@ff470f00            rockchip,iommu           °    ÿG                Í       N            Â      ¶      ü        (aclk iface          Ð   n           C          	  ñdisabled            !   ‘      isp@ff4a0000              rockchip,px30-cif-isp            °    ÿJ        €       $  Í       F          I          J           Àisp mi mipi           Â      3      ´      ú     _        (isp aclk hclk pclk          <   ”           •        "dphy            Ð   n         	  ñdisabled       ports                        +       port@0           °                         +                iommu@ff4a8000            rockchip,iommu           °    ÿJ€                Í       F            Â      ´      ú        (aclk iface          Ð   n            P        C            !   ”      qos@ff518000              rockchip,px30-qos syscon             °    ÿQ€                 !         qos@ff520000              rockchip,px30-qos syscon             °    ÿR                  !   $      qos@ff52c000              rockchip,px30-qos syscon             °    ÿRÀ                 !         qos@ff538000              rockchip,px30-qos syscon             °    ÿS€                 !         qos@ff538080              rockchip,px30-qos syscon             °    ÿS€€                !         qos@ff538100              rockchip,px30-qos syscon             °    ÿS�                 !         qos@ff538180              rockchip,px30-qos syscon             °    ÿS�€                !         qos@ff540000              rockchip,px30-qos syscon             °    ÿT                  !         qos@ff540080              rockchip,px30-qos syscon             °    ÿT €                !         qos@ff548000              rockchip,px30-qos syscon             °    ÿT€                 !         qos@ff548080              rockchip,px30-qos syscon             °    ÿT€€                !          qos@ff548100              rockchip,px30-qos syscon             °    ÿT�                 !   !      qos@ff548180              rockchip,px30-qos syscon             °    ÿT�€                !   "      qos@ff548200              rockchip,px30-qos syscon             °    ÿT‚                 !   #      qos@ff550000              rockchip,px30-qos syscon             °    ÿU                  !         qos@ff550080              rockchip,px30-qos syscon             °    ÿU €                !         qos@ff550100              rockchip,px30-qos syscon             °    ÿU                 !         qos@ff550180              rockchip,px30-qos syscon             °    ÿU€                !         qos@ff558000              rockchip,px30-qos syscon             °    ÿU€                 !         qos@ff558080              rockchip,px30-qos syscon             °    ÿU€€                !         pinctrl           rockchip,px30-pinctrl           r   +        k   –                     +            x   gpio@ff040000             rockchip,gpio-bank           °    ÿ                 Í                   Â   &                    �            ´        £           !   R      gpio@ff250000             rockchip,gpio-bank           °    ÿ%                 Í                   Â     \                 �            ´        £           !   ¢      gpio@ff260000             rockchip,gpio-bank           °    ÿ&                 Í                   Â     ]                 �            ´        £           !   s      gpio@ff270000             rockchip,gpio-bank           °    ÿ'                 Í                   Â     ^                 �            ´        £         pcfg-pull-up             ›        !   ™      pcfg-pull-down           ¨      pcfg-pull-none           ·        !   ˜      pcfg-pull-none-2ma           ·        Ä         pcfg-pull-up-2ma             ›        Ä         pcfg-pull-up-4ma             ›        Ä           !   š      pcfg-pull-none-4ma           ·        Ä         pcfg-pull-down-4ma           ¨        Ä         pcfg-pull-none-8ma           ·        Ä           !   �      pcfg-pull-up-8ma             ›        Ä           !   ›      pcfg-pull-none-12ma          ·        Ä           !   Ÿ      pcfg-pull-up-12ma            ›        Ä           !   ž      pcfg-pull-none-smt           ·         Ó        !   —      pcfg-output-high             è      pcfg-output-low          ô      pcfg-input-high          ›         ÿ        !   œ      pcfg-input           ÿ      i2c0       i2c0-xfer            	             —       	      —        !   Q         i2c1       i2c1-xfer            	             —             —        !   V         i2c2       i2c2-xfer            	            —            —        !   W         i2c3       i2c3-xfer            	            —            —        !   X         tsadc      tsadc-otp-pin           	              ˜        !   j      tsadc-otp-out           	             ˜        !   k         uart0      uart0-xfer           	       
      ™             ™        !   (      uart0-cts           	             ˜        !   )      uart0-rts           	             ˜        !   *         uart1      uart1-xfer           	            ™            ™        !   D      uart1-cts           	            ˜        !   E      uart1-rts           	            ˜        !   F         uart2-m0       uart2m0-xfer             	            ™            ™         uart2-m1       uart2m1-xfer             	            ™            ™        !   G         uart3-m0       uart3m0-xfer             	             ™             ™      uart3m0-cts         	             ˜      uart3m0-rts         	             ˜         uart3-m1       uart3m1-xfer             	            ™            ™        !   H      uart3m1-cts         	            ˜        !   I      uart3m1-rts         	            ˜        !   J         uart4      uart4-xfer           	            ™            ™        !   K      uart4-cts           	            ˜        !   L      uart4-rts           	            ˜        !   M         uart5      uart5-xfer           	            ™            ™        !   N      uart5-cts           	            ˜        !   O      uart5-rts           	            ˜        !   P         spi0       spi0-clk            	            š        !   Y      spi0-csn            	            š        !   Z      spi0-miso           	            š        !   [      spi0-mosi           	            š        !   \      spi0-clk-hs         	            ›      spi0-miso-hs            	            ›      spi0-mosi-hs            	            ›         spi1       spi1-clk            	            š        !   ]      spi1-csn0           	      	      š        !   ^      spi1-csn1           	      
      š        !   _      spi1-miso           	            š        !   `      spi1-mosi           	            š        !   a      spi1-clk-hs         	            ›      spi1-miso-hs            	            ›      spi1-mosi-hs            	            ›         pdm    pdm-clk0m0          	            ˜      pdm-clk0m1          	            ˜      pdm-clk1            	            ˜      pdm-sdi0m0          	            ˜      pdm-sdi0m1          	            ˜      pdm-sdi1            	            ˜      pdm-sdi2            	            ˜      pdm-sdi3            	            ˜      pdm-clk0m0-sleep            	             œ      pdm-clk0m1-sleep            	             œ      pdm-clk1-sleep          	             œ      pdm-sdi0m0-sleep            	             œ      pdm-sdi0m1-sleep            	             œ      pdm-sdi1-sleep          	             œ      pdm-sdi2-sleep          	             œ      pdm-sdi3-sleep          	             œ         i2s0       i2s0-8ch-mclk           	            ˜      i2s0-8ch-sclktx         	            ˜        !   ,      i2s0-8ch-sclkrx         	            ˜        !   -      i2s0-8ch-lrcktx         	            ˜        !   .      i2s0-8ch-lrckrx         	            ˜        !   /      i2s0-8ch-sdo0           	            ˜        !   0      i2s0-8ch-sdo1           	            ˜        !   2      i2s0-8ch-sdo2           	            ˜        !   4      i2s0-8ch-sdo3           	            ˜        !   6      i2s0-8ch-sdi0           	            ˜        !   1      i2s0-8ch-sdi1           	            ˜        !   3      i2s0-8ch-sdi2           	      	      ˜        !   5      i2s0-8ch-sdi3           	            ˜        !   7         i2s1       i2s1-2ch-mclk           	            ˜      i2s1-2ch-sclk           	            ˜        !   8      i2s1-2ch-lrck           	            ˜        !   9      i2s1-2ch-sdi            	            ˜        !   :      i2s1-2ch-sdo            	            ˜        !   ;         i2s2       i2s2-2ch-mclk           	            ˜      i2s2-2ch-sclk           	            ˜        !   <      i2s2-2ch-lrck           	            ˜        !   =      i2s2-2ch-sdi            	            ˜        !   >      i2s2-2ch-sdo            	            ˜        !   ?         sdmmc      sdmmc-clk           	            �        !   t      sdmmc-cmd           	            ›        !   u      sdmmc-det           	             ›        !   v      sdmmc-bus1          	            ›      sdmmc-bus4        @  	            ›            ›            ›            ›        !   w         sdio       sdio-clk            	            ˜        !   z      sdio-cmd            	            ™        !   y      sdio-bus4         @  	            ™            ™            ™            ™        !   x         emmc       emmc-clk            	      	      �        !   |      emmc-cmd            	      
      ›        !   }      emmc-rstnout            	            ˜      emmc-bus1           	             ›      emmc-bus4         @  	             ›            ›            ›            ›      emmc-bus8         €  	             ›            ›            ›            ›            ›            ›            ›            ›        !   ~         flash      flash-cs0           	            ˜        !   …      flash-rdy           	      	      ˜        !   ‡      flash-dqs           	      
      ˜        !   ‰      flash-ale           	            ˜        !   ‚      flash-cle           	            ˜        !   „      flash-wrn           	            ˜        !   ˆ      flash-csl           	            ˜      flash-rdn           	            ˜        !   †      flash-bus8        €  	             ž            ž            ž            ž            ž            ž            ž            ž        !   ƒ         sfc    sfc-bus4          @  	             ˜            ˜            ˜            ˜        !   �      sfc-bus2             	             ˜            ˜      sfc-cs0         	            ˜        !   €      sfc-clk         	      	      ˜        !            lcdc       lcdc-rgb-dclk-pin           	             Ÿ      lcdc-rgb-m0-hsync-pin           	            Ÿ      lcdc-rgb-m0-vsync-pin           	            Ÿ      lcdc-rgb-m0-den-pin         	            Ÿ      lcdc-rgb888-m0-data-pins         €  	            �            �            �            �            �      
      �      	      �            �            �            �            �            �            �            �            �            �            �            �            �            �            �            �            �            �      lcdc-rgb666-m0-data-pins            	            �            �            �            �            �      
      �      	      �            �            �            �            �            �            �            �            �            �            �            �      lcdc-rgb565-m0-data-pins            	            �            �            �            �            �      
      �      	      �            �            �            �            �            �            �            �            �            �      lcdc-rgb888-m1-data-pins           	            �            �            �      
      �            �            �            �            �            �            �            �            �            �            �            �            �            �      lcdc-rgb666-m1-data-pins          °  	            �            �            �      
      �            �            �            �            �            �            �            �      lcdc-rgb565-m1-data-pins          �  	            �            �            �      
      �            �            �            �            �            �         pwm0       pwm0-pin            	             ˜        !   b         pwm1       pwm1-pin            	             ˜        !   c         pwm2       pwm2-pin            	            ˜        !   d         pwm3       pwm3-pin            	             ˜        !   e         pwm4       pwm4-pin            	            ˜        !   f         pwm5       pwm5-pin            	            ˜        !   g         pwm6       pwm6-pin            	            ˜        !   h         pwm7       pwm7-pin            	            ˜        !   i         gmac       rmii-pins         �  	             Ÿ            Ÿ            Ÿ            ˜            ˜            ˜            ˜            ˜      	      ˜        !   q      mac-refclk-12ma         	      
      Ÿ        !   r      mac-refclk          	      
      ˜         cif-m0     cif-clkout-m0           	            ˜      dvp-d2d9-m0       À  	             ˜            ˜            ˜            ˜            ˜            ˜            ˜            ˜            ˜      	      ˜      
      ˜            ˜      dvp-d0d1-m0          	            ˜            ˜      d10-d11-m0           	            ˜            ˜         cif-m1     cif-clkout-m1           	            ˜      dvp-d2d9-m1       À  	            ˜            ˜            ˜            ˜      	      ˜            ˜            ˜            ˜            ˜            ˜            ˜            ˜      dvp-d0d1-m1          	            ˜            ˜      d10-d11-m1           	            ˜            ˜         isp    isp-prelight            	            ˜         bt     bt-enable-h         	             ˜        !   £         sdio-pwrseq    wifi-enable-h           	             ˜        !   ¡         pmic       pmic_int            	              ™        !   S            vcc5v0-sys            regulator-fixed         çvcc5v0_sys           ö         
         LK@        4 LK@        !   T      sdio-pwrseq           mmc-pwrseq-simple            Â          
  (ext_clock           	   P        Zdefault         h   ¡        	1   ¢              !   {      vcc3v3-btreg              regulator-gpio           	=        Zdefault         h   £        çbtreg-gpio-supply            2Z         4 2Z          ö         á 2Z             	P   ¢             vcc3v3-rf-aux-mod             regulator-fixed         çvcc3v3_rf_aux_mod            2Z         4 2Z          ö         
        	]   T      xin32k            fixed-clock                     ø  €         xin32k          !          chosen          	hserial2:115200n8             	compatible interrupt-parent #address-cells #size-cells model i2c0 i2c1 i2c2 i2c3 serial0 serial1 serial2 serial3 serial4 serial5 spi0 spi1 ethernet0 mmc1 mmc2 mmc0 device_type reg enable-method clocks #cooling-cells cpu-idle-states dynamic-power-coefficient operating-points-v2 cpu-supply phandle entry-method local-timer-stop arm,psci-suspend-param entry-latency-us exit-latency-us min-residency-us opp-shared opp-hz opp-microvolt clock-latency-ns opp-suspend interrupts interrupt-affinity ports status clock-frequency clock-output-names #clock-cells polling-delay-passive polling-delay sustainable-power thermal-sensors temperature hysteresis trip cooling-device contribution #power-domain-cells pm_qos pmuio1-supply pmuio2-supply offset mode-bootloader mode-fastboot mode-loader mode-normal mode-recovery clock-names dmas dma-names reg-shift reg-io-width pinctrl-names pinctrl-0 rockchip,grf resets reset-names #sound-dai-cells #interrupt-cells interrupt-controller vccio1-supply vccio2-supply vccio3-supply vccio4-supply vccio5-supply vccio6-supply phys phy-names rockchip,output remote-endpoint rockchip,system-power-controller wakeup-source vcc1-supply vcc2-supply vcc3-supply vcc4-supply vcc5-supply vcc6-supply vcc7-supply vcc8-supply vcc9-supply regulator-name regulator-always-on regulator-boot-on regulator-min-microvolt regulator-max-microvolt regulator-ramp-delay regulator-on-in-suspend regulator-suspend-microvolt regulator-off-in-suspend num-cs #pwm-cells arm,pl330-periph-burst #dma-cells assigned-clocks assigned-clock-rates rockchip,hw-tshut-temp pinctrl-1 pinctrl-2 #thermal-sensor-cells rockchip,hw-tshut-mode rockchip,hw-tshut-polarity #io-channel-cells bits #reset-cells assigned-clock-parents #phy-cells interrupt-names power-domains dr_mode g-np-tx-fifo-size g-rx-fifo-size g-tx-fifo-size phy-mode clock_in_out phy-supply snps,reset-active-low snps,reset-delays-us snps,reset-gpio bus-width fifo-depth max-frequency cap-sd-highspeed card-detect-delay vmmc-supply vqmmc-supply cap-sdio-irq keep-power-in-suspend mmc-pwrseq non-removable sd-uhs-sdr104 cap-mmc-highspeed mmc-hs200-1_8v iommus #iommu-cells rockchip,disable-mmu-reset rockchip,pmu ranges gpio-controller #gpio-cells bias-pull-up bias-pull-down bias-disable drive-strength input-schmitt-enable output-high output-low input-enable rockchip,pins post-power-on-delay-ms reset-gpios enable-active-high enable-gpios vin-supply stdout-path 