     8     (                                                                    !   sophgo,huashan-pi sophgo,cv1812h             &Huashan Pi     cpus                                       ,}x@   cpu@0            thead,c906 riscv             ?cpu          K             O   @         b            o            |   @                                 riscv,sv39           rv64imafdc           rv64i         (   i m a f d c zicntr zicsr zifencei zihpm    interrupt-controller             riscv,cpu-intc                                               oscillator           fixed-clock         osc_25m         !            .}x@                 soc          simple-bus          >                                     O         _   clock-controller@3002000             K              f           !            sophgo,cv1810-clk                    gpio@3020000             snps,dw-apb-gpio             K                                  gpio-controller@0            snps,dw-apb-gpio-port            m        }                        K                                     <            gpio@3021000             snps,dw-apb-gpio             K                                 gpio-controller@0            snps,dw-apb-gpio-port            m        }                        K                                     =            gpio@3022000             snps,dw-apb-gpio             K                                  gpio-controller@0            snps,dw-apb-gpio-port            m        }                        K                                     >            gpio@3023000             snps,dw-apb-gpio             K0                                 gpio-controller@0            snps,dw-apb-gpio-port            m        }                        K                                     ?            i2c@4000000          snps,designware-i2c          K                                        f      3      5      	  ref pclk               1         	  disabled          i2c@4010000          snps,designware-i2c          K                                       f      3      6      	  ref pclk               2         	  disabled          i2c@4020000          snps,designware-i2c          K                                       f      3      7      	  ref pclk               3         	  disabled          i2c@4030000          snps,designware-i2c          K                                       f      3      8      	  ref pclk               4         	  disabled          i2c@4040000          snps,designware-i2c          K                                       f      3      9      	  ref pclk               5         	  disabled          serial@4140000           snps,dw-apb-uart             K                ,           f      M      N        baudclk apb_pclk                                  okay          serial@4150000           snps,dw-apb-uart             K                -           f      O      P        baudclk apb_pclk                                	  disabled          serial@4160000           snps,dw-apb-uart             K                .           f      Q      R        baudclk apb_pclk                                	  disabled          serial@4170000           snps,dw-apb-uart             K                /           f      S      T        baudclk apb_pclk                                	  disabled          spi@4180000          snps,dw-apb-ssi          K                                       f      =      >        ssi_clk pclk               6         	  disabled          spi@4190000          snps,dw-apb-ssi          K                                       f      =      ?        ssi_clk pclk               7         	  disabled          spi@41a0000          snps,dw-apb-ssi          K                                       f      =      @        ssi_clk pclk               8         	  disabled          spi@41b0000          snps,dw-apb-ssi          K                                       f      =      A        ssi_clk pclk               9         	  disabled          serial@41c0000           snps,dw-apb-uart             K                0           f      U      V        baudclk apb_pclk                                	  disabled          mmc@4310000          sophgo,cv1800b-dwcmshc           K1                $           f                  	  core bus            okay                                                         dma-controller@4330000           snps,axi-dma-1.01a           K3                           f      .      .        core-clk cfgr-clk                                  
                                                                  (           9         	  disabled          interrupt-controller@70000000            Kp              I            	                                            ]   e      $   sophgo,cv1812h-plic thead,c900-plic                  timer@74000000           Kt              I                  &   sophgo,cv1812h-clint thead,c900-clint            memory@80000000          ?memory           K            aliases         h/soc/gpio@3020000           n/soc/gpio@3021000           t/soc/gpio@3022000           z/soc/gpio@3023000           /soc/serial@4140000         /soc/serial@4150000         /soc/serial@4160000         /soc/serial@4170000         /soc/serial@41c0000       chosen          serial0:115200n8          reserved-memory                                   _   region@8fe00000          K                           	#address-cells #size-cells compatible model timebase-frequency device_type reg d-cache-block-size d-cache-sets d-cache-size i-cache-block-size i-cache-sets i-cache-size mmu-type riscv,isa riscv,isa-base riscv,isa-extensions interrupt-controller #interrupt-cells phandle clock-output-names #clock-cells clock-frequency interrupt-parent dma-noncoherent ranges clocks gpio-controller #gpio-cells ngpios interrupts clock-names status reg-shift reg-io-width bus-width no-1-8-v no-mmc no-sdio disable-wp #dma-cells dma-channels snps,block-size snps,priority snps,dma-masters snps,data-width interrupts-extended riscv,ndev gpio0 gpio1 gpio2 gpio3 serial0 serial1 serial2 serial3 serial4 stdout-path no-map 